Data Sheet
FEATURES
3.0 kV RMS/3.75 kV RMS Triple-Channel
Digital Isolators
ADuM130D/ADuM130E/ADuM131D/ADuM131E
FUNCTIONAL BLOCK DIAGRAMS
V
DD1 1
GND
1 2
V
IA 3
V
IB 4
V
IC 5
NIC
6
DISABLE
1 7
GND
1 8
High common-mode transient immunity: 100 kV/μs
High robustness to radiated and conducted noise
Low propagation delay: 13 ns maximum for 5 V operation,
15 ns maximum for 1.8 V operation
150 Mbps maximum guaranteed data rate
Safety and regulatory approvals
(pending)
UL recognition
3000 V rms/3750 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice 5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
V
IORM
= 849 V peak
CQC certification per GB4943.1-2011
Backward compatibility
ADuM130E1/ADuM131E1
pin-compatible with
ADuM1300/ADuM1301
Low dynamic power consumption
1.8 V to 5 V level translation
High temperature operation: 125°C
Fail-safe high or low options
16-lead, RoHS compliant, SOIC package
ADuM130D
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
16
V
DD2
15
GND
2
14
V
OA
13
V
OB
12
V
OC
11
NIC
9
10
NIC
GND
2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 1.
ADuM130D
Functional Block Diagram
V
DD1
GND
1
V
IA
V
IB
V
IC
1
2
3
4
5
ENCODE
ENCODE
ENCODE
DECODE
DECODE
DECODE
ADuM130E
16
V
DD2
15
GND
2
14
V
OA
13
V
OB
12
V
OC
11
NIC
9
GND
2
13348-002
NIC
6
NIC
7
GND
1 8
10
V
E2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 2.
ADuM130E
Functional Block Diagram
V
DD1
GND
1
V
IA
V
IB
V
OC
1
2
3
4
5
ENCODE
ENCODE
DECODE
DECODE
DECODE
ENCODE
ADuM131D
16
V
DD2
15
GND
2
14
V
OA
13
V
OB
12
V
IC
11
NIC
9
GND
2
13348-101
13348-102
APPLICATIONS
General-purpose multichannel isolation
Serial peripheral interface (SPI)/data converter isolation
Industrial field bus isolation
NIC
6
DISABLE
1 7
GND
1 8
10
DISABLE
2
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 3.
ADuM131D
Functional Block Diagram
V
DD1
GND
1
V
IA
V
IB
V
OC
1
2
3
4
5
ENCODE
ENCODE
DECODE
DECODE
DECODE
ENCODE
ADuM131E
16
V
DD2
15
GND
2
14
V
OA
13
V
OB
12
V
IC
11
NIC
10
V
E2
9
GND
2
GENERAL DESCRIPTION
The
ADuM130D/ADuM130E/ADuM131D/ADuM131E
1
are
triple-channel digital isolators based on Analog Devices, Inc.,
iCoupler®
technology. Combining high speed, complementary
metal-oxide semiconductor (CMOS) and monolithic air core
transformer technology, these isolation components provide
outstanding performance characteristics superior to alternatives
such as optocoupler devices and other integrated couplers. The
maximum propagation delay is 13 ns with a pulse width distortion
of less than 3 ns at 5 V operation. Channel matching is tight at
3.0 ns maximum.
The
ADuM130D/ADuM130E/ADuM131D/ADuM131E
data
channels are independent and are available in a variety of config-
urations with a withstand voltage rating of 3.0 kV rms or
3.75 kV rms (see the Ordering Guide). The devices operate with
the supply voltage on either side ranging from 1.8 V to 5 V, prov-
iding compatibility with lower voltage systems as well as enabling
voltage translation functionality across the isolation barrier.
1
NIC
6
V
E1 7
GND
1 8
NIC = NO INTERNAL CONNECTION. LEAVE THIS PIN FLOATING.
Figure 4.
ADuM131E
Functional Block Diagram
Unlike other optocoupler alternatives, dc correctness is ensured
in the absence of input logic transitions. Two different fail-safe
options are available, in which the outputs transition to a pre-
determined state when the input power supply is not applied or
the inputs are disabled. The
ADuM130E1/ADuM131E1
are pin-
compatible with the
ADuM1300/ADuM1301.
Protected by U.S. Patents 5,952,849; 6,873,065; 6,903,578; and 7,075,329. Other patents are pending.
Document Feedback
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
13348-001
ADuM130D/ADuM130E/ADuM131D/ADuM131E
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics—5 V Operation................................ 3
Electrical Characteristics—3.3 V Operation ............................ 4
Electrical Characteristics—2.5 V Operation ............................ 6
Electrical Characteristics—1.8 V Operation ............................ 7
Insulation and Safety Related Specifications ............................ 9
Package Characteristics ............................................................... 9
Regulatory Information ............................................................. 10
DIN V VDE V 0884-10 (VDE V 0884-10) Insulation
Characteristics ............................................................................ 11
Data Sheet
Recommended Operating Conditions .................................... 12
Absolute Maximum Ratings ......................................................... 13
ESD Caution................................................................................ 13
Truth Tables................................................................................. 14
Pin Configurations and Function Descriptions ......................... 15
Typical Performance Characteristics ........................................... 17
Applications Information .............................................................. 18
Overview ..................................................................................... 18
Printed Circuit Board (PCB) Layout ....................................... 18
Propagation Delay Related Parameters ................................... 19
Jitter Measurement ..................................................................... 19
Insulation Lifetime ..................................................................... 19
Outline Dimensions ....................................................................... 21
Ordering Guide .......................................................................... 22
REVISION HISTORY
11/15—Rev. 0 to Rev. A
Added 16-Lead, Narrow Body SOIC Package ................ Universal
Changes to Title, Features Section, and General Description
Section ................................................................................................ 1
Added Table 9; Renumbered Sequentially .................................... 9
Changes to Table 10 and Table 11 .................................................. 9
Added Table 12 ............................................................................... 10
Changes to Table 13 ........................................................................ 10
Changes to Table 15 Title............................................................... 12
Added Figure 5; Renumbered Sequentially ................................ 12
Changes to Table 17 and Table 19 ................................................ 13
Added Table 18 ............................................................................... 13
Updated Outline Dimensions ....................................................... 21
Changes to Ordering Guide .......................................................... 22
7/15—Revision 0: Initial Version
Rev. A | Page 2 of 22
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V OPERATION
ADuM130D/ADuM130E/ADuM131D/ADuM131E
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 5 V. Minimum/maximum specifications apply over the entire recommended
operation range of 4.5 V ≤ V
DD1
≤ 5.5 V, 4.5 V ≤ V
DD2
≤ 5.5 V, and −40°C ≤ T
A
≤ +125°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 1.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
1
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Output Voltage
Logic High
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
Min
6.6
150
4.8
Typ
Max
Unit
ns
Mbps
ns
ns
ps/°C
ns
Test Conditions/Comments
Within pulse width distortion (PWD) limit
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Between any two devices at the same
temperature, voltage, and load
7.2
0.5
1.5
13
3
6.1
t
PSKCD
t
PSKOD
0.5
0.5
630
80
3.0
3.0
ns
ns
ps p-p
ps rms
See the Jitter Measurement section
See the Jitter Measurement section
V
IH
V
IL
V
OH
0.7 × V
DDx
0.3 × V
DDx
V
DDx
− 0.1
V
DDx
− 0.4
V
DDx
V
DDx
−
0.2
0.0
0.2
+0.01
−3
9
+0.01
V
V
V
V
I
Ox 2
= −20 µA, V
Ix
= V
IxH 3
I
Ox2
= −4 mA, V
Ix
= V
IxH3
I
Ox2
= 20 µA, V
Ix
= V
IxL 4
I
Ox2
= 4 mA, V
Ix
= V
IxL4
0 V ≤ V
Ix
≤ V
DDx
V
E2
= 0 V
DISABLE
1
= V
DDx
0 V ≤ V
Ox
≤ V
DDx
Logic Low
Input Current per Channel
V
E2
Enable Input Pull-Up Current
DISABLE
1
Input Pull-Down Current
Tristate Output Current per Channel
Quiescent Supply Current
ADuM130D/ADuM130E
V
OL
I
I
I
PU
I
PD
I
OZ
−10
−10
−10
0.1
0.4
+10
15
+10
V
V
µA
µA
µA
µA
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
ADuM131D/ADuM131E
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDx
Hysteresis
I
DDI (D)
I
DDO (D)
UVLO
V
DDxUV+
V
DDxUV−
V
DDxUVH
1.35
1.73
9.7
1.87
1.62
1.61
7.4
5.34
0.01
0.02
1.6
1.5
0.1
2.6
2.9
15.2
3.0
2.7
2.8
11.4
7.2
mA
mA
mA
mA
mA
mA
mA
mA
mA/Mbps
mA/Mbps
V
V
V
V
I 5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
Rev. A | Page 3 of 22
ADuM130D/ADuM130E/ADuM131D/ADuM131E
Parameter
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient
Immunity
7
Symbol
t
R
/t
F
|CM
H
|
|CM
L
|
1
2
Data Sheet
Max
Unit
ns
kV/µs
kV/µs
Test Conditions/Comments
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
Min
Typ
2.5
100
100
75
75
150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.
I
Ox
is the Channel x output current, where x = A, B, or C.
3
V
IxH
is the input side logic high.
4
V
IxL
is the input side logic low.
5
V
I
is the voltage input.
6
E0 refers to the
ADuM130E0/ADuM131E0
models, D0 refers to the
ADuM130D0/ADuM131D0
models, E1 refers to the
ADuM130E1/ADuM131E1
models, and D1 refers
to the
ADuM130D1/ADuM131D1
models. See the Ordering Guide section.
7
|CM
H
| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (V
O
) > 0.8 V
DDx
. |CM
L
| is the maximum common-
mode voltage slew rate that can be sustained while maintaining V
Ox
> 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode
voltage edges.
Table 2. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM130D/ADuM130E
Supply Current Side 1
Supply Current Side 2
ADuM131D/ADuM131E
Supply Current Side 1
Supply Current Side 2
Symbol
Min
1 Mbps
Typ
Max
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
I
DD1
I
DD2
I
DD1
I
DD2
5.6
1.9
4.6
3.6
9.0
3.7
7.2
5.8
6.3
3.1
5.5
4.6
9.8
4.9
8.3
6.8
9.4
6.8
8.8
8.0
14.3
10
11.9
11.3
mA
mA
mA
mA
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at T
A
= 25°C, V
DD1
= V
DD2
= 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range: 3.0 V ≤ V
DD1
≤ 3.6 V, 3.0 V ≤ V
DD2
≤ 3.6 V, and −40°C ≤ T
A
≤ +125°C, unless otherwise noted. Switching specifications
are tested with C
L
= 15 pF and CMOS signal levels, unless otherwise noted. Supply currents are specified with 50% duty cycle signals.
Table 3.
Parameter
SWITCHING SPECIFICATIONS
Pulse Width
Data Rate
1
Propagation Delay
Pulse Width Distortion
Change vs. Temperature
Propagation Delay Skew
Channel Matching
Codirectional
Opposing Direction
Jitter
DC SPECIFICATIONS
Input Threshold
Logic High
Logic Low
Symbol
PW
t
PHL
, t
PLH
PWD
t
PSK
Min
6.6
150
4.8
Typ
Max
Unit
ns
Mbps
ns
ns
ps/°C
ns
Test Conditions/Comments
Within PWD limit
Within PWD limit
50% input to 50% output
|t
PLH
− t
PHL
|
Between any two devices at the
same temperature, voltage, and
load
6.8
0.7
1.5
14
3
7.5
t
PSKCD
t
PSKOD
0.7
0.7
640
75
3.0
3.0
ns
ns
ps p-p
ps rms
See the Jitter Measurement section
See the Jitter Measurement section
V
IH
V
IL
0.7 × V
DDx
0.3 × V
DDx
V
V
Rev. A | Page 4 of 22
Data Sheet
Parameter
Output Voltage
Logic High
Logic Low
Input Current per Channel
V
E2
Enable Input Pull-Up Current
DISABLE
1
Input Pull-Down Current
Tristate Output Current per Channel
Quiescent Supply Current
ADuM130D/ADuM130E
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
ADuM131D/ADuM131E
I
DD1 (Q)
I
DD2 (Q)
I
DD1 (Q)
I
DD2 (Q)
Dynamic Supply Current
Dynamic Input
Dynamic Output
Undervoltage Lockout
Positive V
DDx
Threshold
Negative V
DDx
Threshold
V
DDx
Hysteresis
AC SPECIFICATIONS
Output Rise/Fall Time
Common-Mode Transient Immunity
7
I
DDI (D)
I
DDO (D)
UVLO
V
DDxUV+
V
DDxUV−
V
DDxUVH
t
R
/t
F
|CM
H
|
|CM
L
|
1
2
ADuM130D/ADuM130E/ADuM131D/ADuM131E
Symbol
V
OH
V
OL
I
I
I
PU
I
PD
I
OZ
−10
−10
−10
Min
V
DDx
− 0.1
V
DDx
− 0.4
Typ
V
DDx
V
DDx
− 0.2
0.0
0.2
+0.01
−3
9
+0.01
Max
Unit
V
V
V
V
µA
µA
µA
µA
Test Conditions/Comments
I
Ox 2
= −20 µA, V
Ix
= V
IxH 3
I
Ox2
= −2 mA, V
Ix
= V
IxH3
I
Ox2
= 20 µA, V
Ix
= V
IxL 4
I
Ox2
= 2 mA, V
Ix
= V
IxL4
0 V ≤ V
Ix
≤ V
DDx
V
E2
= 0 V
DISABLE
1
= V
DDx
0 V ≤ V
Ox
≤ V
DDx
0.1
0.4
+10
15
+10
1.25
1.65
9.57
1.79
1.52
1.52
7.28
5.24
0.01
0.01
1.6
1.5
0.1
2.5
100
100
2.5
2.8
15.0
2.9
2.6
2.6
11.3
7.1
mA
mA
mA
mA
mA
mA
mA
mA
mA/Mbps
mA/Mbps
V
V
V
ns
kV/µs
kV/µs
V
I 5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 0 (E0, D0), 1 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
V
I5
= 1 (E0, D0), 0 (E1, D1)
6
Inputs switching, 50% duty cycle
Inputs switching, 50% duty cycle
75
75
10% to 90%
V
Ix
= V
DDx
, V
CM
= 1000 V,
transient magnitude = 800 V
V
Ix
= 0 V, V
CM
= 1000 V,
transient magnitude = 800 V
150 Mbps is the highest data rate that can be guaranteed, although higher data rates are possible.
I
Ox
is the Channel x output current, where x = A, B, or C.
3
V
IxH
is the input side logic high.
4
V
IxL
is the input side logic low.
5
V
I
is the voltage input.
6
E0 refers to the
ADuM130E0/ADuM131E0
models, D0 refers to the
ADuM130D0/ADuM131D0
models, E1 refers to the
ADuM130E1/ADuM131E1
models, and D1 refers
to the
ADuM130D1/ADuM131D1
models. See the Ordering Guide section.
7
|CM
H
| is the maximum common-mode voltage slew rate that can be sustained while maintaining the voltage output (V
O
) > 0.8 V
DDx
. |CM
L
| is the maximum common-
mode voltage slew rate that can be sustained while maintaining V
Ox
> 0.8 V. The common-mode voltage slew rates apply to both rising and falling common-mode
voltage edges.
Table 4. Total Supply Current vs. Data Throughput
Parameter
SUPPLY CURRENT
ADuM130D/ADuM130E
Supply Current Side 1
Supply Current Side 2
ADuM131D/ADuM131E
Supply Current Side 1
Supply Current Side 2
Symbol
Min
1 Mbps
Typ
Max
Min
25 Mbps
Typ
Max
Min
100 Mbps
Typ
Max
Unit
I
DD1
I
DD2
I
DD1
I
DD2
5.4
1.8
4.4
3.4
8.8
3.6
7.1
5.6
6.0
2.9
5.2
4.3
9.4
4.7
8.0
6.5
8.5
6.2
8.1
7.4
12.7
8.4
10.7
9.5
mA
mA
mA
mA
Rev. A | Page 5 of 22
嵌入式系统
