PD - 94457B
AFL50XXS SERIES
50V Input, Single Output
HYBRID-HIGH RELIABILITY
DC/DC CONVERTER
Description
The AFL Series of DC/DC converters feature high power
density with no derating over the full military temperature
range. This series is offered as part of a complete family
of converters providing single and dual output voltages
and operating from nominal +28V, +50V, +120V or +270V
inputs with output power ranging from 80W to 120W.
For applications requiring higher output power,
individual converters can be operated in parallel. The
internal current sharing circuits assure equal current
distribution among the paralleled converters. This series
incorporates International Rectifier’s proprietary
magnetic pulse feedback technology providing
optimum dynamic line and load regulation response.
This feedback system samples the output voltage at
the pulse width modulator fixed clock frequency,
nominally 550KHz. Multiple converters can be
synchronized to a system clock in the 500KHz to 700
KHz range or to the synchronization output of one
converter. Undervoltage lockout, primary and secondary
referenced inhibit, soft-start and load fault protection
are provided on all models.
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long
term hermeticity in the most harsh environments.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet.
Variations in electrical, mechanical and screening can
be accommodated. Contact IR Santa Clara for special
requirements.
AFL
Features
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30V To 80V Input Range
5V, 8V, 9V, 12V, 15V
and
28
V Outputs Available
High Power Density - up to 84 W/in3
Up To 120W Output Power
Parallel Operation with Stress and Current
Sharing
Low Profile (0.380") Seam Welded Package
Ceramic Feedthru Copper Core Pins
High Efficiency - to 85%
Full Military Temperature Range
Continuous Short Circuit and Overload
Protection
Remote Sensing Terminals
Primary and Secondary Referenced
Inhibit Functions
Line Rejection > 40dB - DC to 50KHz
External Synchronization Port
Fault Tolerant Design
Dual Output Versions Available
Standard Microcircuit Drawings Available
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1
12/15/06
AFL50XXS Series
Specifications
Absolute Maximum Ratings
Input voltage
Soldering temperature
Operating case temperature
Storage case temperature
-0.5V to +100VDC
300°C for 10 seconds
-55°C to +125°C
-65°C to +135°C
Static Characteristics
-55°C < T
CASE
< +125°C, 30V< V
IN
< 80V
unless otherwise specified.
Parameter
INPUT VOLTAGE
OUTPUT VOLTAGE
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
OUTPUT CURRENT
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
OUTPUT POWER
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
MAXIMUM CAPACITIVE LOAD
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
OUTPUT VOLTAGE REGULATION
AFL5028S
Line
All Others
Line
Load
OUTPUT RIPPLE VOLTAGE
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
1, 2, 3
1, 2, 3
1, 2, 3
1,
1,
1,
1,
1,
1,
2,
2,
2,
2,
2,
2,
3
3
3
3
3
3
V IN = 30, 50, 80 Volts, 100% Load,
BW = 10MHz
Note 1
V IN = 50 Volts, 100% Load - Note 1, 6
10,000
-0.015
+0.015
1
1
1
1
1
1
2,
2,
2,
2,
2,
2,
3
3
3
3
3
3
V IN = 30, 50, 80 Volts - Note 6
Group A
Subgroups
Note 6
V IN = 50 Volts, 100% Load
4.95
7.92
8.91
11.88
14.85
27.72
4.90
7.84
8.82
11.76
14.70
27.44
5.00
8.00
9.00
12.00
15.00
28.00
5.05
8.08
9.09
12.12
15.15
28.28
5.10
8.16
9.18
12.24
15.30
28.56
16.0
10.0
10.0
9.0
8.0
4.0
80
80
90
108
120
112
Test Conditions
Min
30
Nom
50
Max
80
Unit
V
V
A
Note 6
W
µF
%/°C
No Load, 50% Load, 100% Load
V IN = 30, 50, 80 Volts
-70.0
-20.0
-1.0
+70.0
+20.0
+1.0
30
40
40
45
50
100
mV
mV
%
mV pp
For Notes to Specifications, refer to page 4
2
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AFL50XXS Series
Static Characteristics
(Continued)
Parameter
INPUT CURRENT
No Load
Inhibit 1
Inhibit 2
INPUT RIPPLE CURRENT
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
CURRENT LIMIT POINT
As a percentage of full rated load
1
2, 3
1, 2, 3
1, 2, 3
1,
1,
1,
1,
1,
1,
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
Group A
Subgroups
Test Conditions
VIN = 50 Volts
IOUT = 0
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
VIN = 50 Volts, 100% Load, BW = 10MHz
Min
Nom
Max
50
60
5.0
5.0
60
60
60
60
60
60
Unit
mA
mApp
1
2
3
1, 2, 3
1,
1,
1,
1,
1,
1,
2,
2,
2,
2,
2,
2,
3
3
3
3
3
3
VOUT = 90% VNOM , VIN = 50 Volts
Note 5
115
105
125
125
115
140
32
%
LOAD FAULT POWER DISSIPATION
Overload or Short Circuit
EFFICIENCY
AFL5005S
AFL5008S
AFL5009S
AFL5012S
AFL5015S
AFL5028S
V
IN
= 50 Volts
V
IN
= 50 Volts, 100% Load
W
78
79
80
81
82
82
-0.5
2.0
500
500
2.0
-0.5
81
82
83
84
85
84
0.8
100
50
100
550
600
700
10
0.8
100
80
%
ENABLE INPUTS
(Inhibit Function)
Converter Off
Sink Current
Converter On
Sink Current
SWITCHING FREQUENCY
SYNCHRONIZATION INPUT
Frequency Range
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Pulse Duty Cycle
ISOLATION
DEVICE WEIGHT
MTBF
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9
Note 1
V
µA
V
µA
KHz
KHz
V
V
ns
%
MΩ
Note 1
Note 1
1
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
Slight Variations with Case Style
MIL-HDBK-217F, AIF @ T C = 40°C
20
100
85
300
g
KHrs
For Notes to Specifications, refer to page 4
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3
AFL50XXS Series
Dynamic Characteristics
-55°C < T
CASE
< +125°C, V
IN
=50V
unless otherwise specified.
Parameter
LOAD TRANSIENT RESPONSE
AFL5005S
Amplitude
Recovery
Amplitude
Recovery
AFL5008S
Amplitude
Recovery
Amplitude
Recovery
AFL5009S
Amplitude
Recovery
Amplitude
Recovery
AFL5012S
Amplitude
Recovery
Amplitude
Recovery
AFL5015S
Amplitude
Recovery
Amplitude
Recovery
AFL5028S
Amplitude
Recovery
Amplitude
Recovery
LINE TRANSIENT RESPONSE
Amplitude
Recovery
TURN-ON CHARACTERISTICS
Overshoot
Delay
LOAD FAULT RECOVERY
LINE REJECTION
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
Group A
Subgroups
Note 2, 8
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
Note 1, 2, 3
VIN Step = 30
⇔
80 Volts
VIN = 30, 50, 80 Volts. Note 4
Enable 1, 2 on. (Pins 4, 12 high or
open)
Same as Turn On Characteristics.
MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
40
50
dB
50
75
250
120
mV
ms
-500
500
500
mV
µs
-450
-450
-500
-500
-600
-600
-750
-750
-750
-750
-1200
-1200
450
200
450
300
500
200
500
300
600
200
600
300
750
200
750
300
750
200
750
300
1200
200
1200
300
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
mV
µs
Test Conditions
Min
Nom
Max
Unit
Notes to Specifications:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Parameters not 100% tested but are guaranteed to the limits specified in the table.
Recovery time is measured from the initiation of the transient to where VOUT has returned to within
±1.0%
of
VOUT at 50% load.
Line transient transition time
≥
100µs.
Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
Parameter verified as part of another test.
All electrical tests are performed with the remote sense leads connected to the output leads at the load.
Load transient transition time
≥
10µs.
Enable inputs internally pulled high. Nominal open circuit voltage
≈
4.0VDC.
4
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AFL50XXS Series
Block Diagram
Figure I. AFL Single Output
+ Input 1
Input
Filter
Primary
Bias Supply
Current
Sense
Sync Output
5
Control
FB
Enable 1 4
Output
Filter
7
10
+Output
+Sense
Sync Input 6
Case
3
Error
Amp
& Ref
Share
Amplifier
Sense
Amplifier
11 Share
12 Enable 2
9
8
Return Sense
Output Return
Input Return 2
Circuit Operation and Application Information
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pin 4 is enabled (at a logical 1 or open) the primary
bias supply will begin generating a regulated housekeeping
voltage bringing the circuitry on the primary side of the
converter to life. A power MOSFET is used to chop the DC
input voltage into a high frequency square wave, applying
this chopped voltage to the power transformer at the nominal
converter switching frequency. Maintaining a DC voltage
within the specified operating range at the input assures
continuous generation of the primary bias voltage.
The switched voltage impressed on the secondary output
transformer winding is rectified and filtered to generate the
converter DC output voltage. An error amplifier on the
secondary side compares the output voltage to a precision
reference and generates an error signal proportional to the
difference. This error signal is magnetically coupled through
the feedback transformer into the controller section of the
converter varying the pulse width of the square wave signal
driving the MOSFET, narrowing the width if the output voltage
is too high and widening it if it is too low, thereby regulating
the output voltage.
of application. When the remote sensing feature is not used,
the sense lead should be connected to their respective
output terminals at the converter. Figure III. illustrates a
typical remotely sensed application.
Inhibiting Converter Output (Enable)
As an alternative to application and removal of the DC voltage
to the input, the user can control the converter output by
providing TTL compatible, positive logic signals to either of
two enable pins (pin 4 or 12). The distinction between these
two signal ports is that enable 1 (pin 4) is referenced to the
input return (pin 2) while enable 2 (pin 12) is referenced to
the output return (pin 8). Thus, the user has access to an
inhibit function on either side of the isolation barrier. Each
port is internally pulled “high” so that when not used, an
open connection on both enable pins permits normal
converter operation. When their use is desired, a logical
“low” on either port will shut the converter down.
Figure II. Enable Input Equivalent Circuit
+5.6 V
100K
Pin 4 or
Pin 12
1N4148
Remote Sensing
Connection of the
+
and
-
sense leads at a remotely located
load permits compensation for excessive resistance
between the converter output and the load when their
physical separation could cause undesirable voltage drop.
This connection allows regulation to the placard voltage at
Pin 2 or
Pin 8
290K
2N3904
180K
Disable
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5
测试/测量
