PD - 94463C
AFL120XXD SERIES
120V Input, Dual Output
HYBRID-HIGH RELIABILITY
DC/DC CONVERTER
Description
The AFL Series of DC/DC converters feature high power
density with no derating over the full military temperature
range. This series is offered as part of a complete family
of converters providing single and dual output voltages
and operating from nominal +28V or +270V inputs with
output power ranging from 80W to 120W. For applications
requiring higher output power, individual converters
can be operated in parallel. The internal current sharing
circuits assure equal current distribution among the
paralleled converters. This series incorporates International
Rectifier’s proprietary magnetic pulse feedback
technology providing optimum dynamic line and load
regulation response. This feedback system samples
the output voltage at the pulse width modulator fixed
clock frequency, nominally 550KHz. Multiple converters
can be synchronized to a system clock in the 500KHz
to 700KHz range or to the synchronization output of
one converter. Undervoltage lockout, primary and
secondary referenced inhibit, soft-start and load fault
protection are provided on all models.
These converters are hermetically packaged in two
enclosure variations, utilizing copper core pins to
minimize resistive DC losses. Three lead styles are
available, each fabricated with International Rectifier’s
rugged ceramic lead-to-package seal assuring long
term hermeticity in the most harsh environments.
Manufactured in a facility fully qualified to MIL-PRF-
38534, these converters are fabricated utilizing DSCC
qualified processes. For available screening options,
refer to device screening table in the data sheet.
Variations in electrical, mechanical and screening can
be accommodated. Contact IR Santa Clara for special
requirements.
AFL
Features
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80V To 160V Input Range
±
5V,
±
12V, and
±
15V Outputs Available
High Power Density - up to 70W/in3
Up To 100W Output Power
Parallel Operation with Power Sharing
Low Profile (0.380") Seam Welded Package
Ceramic Feedthru Copper Core Pins
High Efficiency - to 87%
Full Military Temperature Range
Continuous Short Circuit and Overload
Protection
Output Voltage Trim
Primary and Secondary Referenced
Inhibit Functions
Line Rejection > 50dB - DC to 50KHz
External Synchronization Port
Fault Tolerant Design
Single Output Versions Available
Standard Microcircuit Drawings Available
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1
12/15/06
AFL120XXD Series
Specifications
Absolute Maximum Ratings
Input voltage
Soldering temperature
Operating case temperature
Storage case temperature
-0.5V to +180VDC
300°C for 10 seconds
-55°C to +125°C
-65°C to +135°C
Static Characteristics
-55°C < T
CASE
< +125°C, 80V< V
IN
< 160V
unless otherwise specified.
Parameter
INPUT VOLTAGE
OUTPUT VOLTAGE
AFL12005D
AFL12012D
AFL12015D
AFL12005D
AFL12012D
AFL12015D
OUTPUT CURRENT
AFL12005D
AFL12012D
AFL12015D
OUTPUT POWER
AFL12005D
AFL12012D
AFL12015D
MAXIMUM CAPACITIVE LOAD
OUTPUT VOLTAGE
TEMPERATURE COEFFICIENT
OUTPUT VOLTAGE REGULATION
Line
Load
Cross
AFL12005D
AFL12012D
AFL12015D
1
1
1
1
1
1
2, 3
2, 3
2, 3
2, 3
2, 3
2, 3
Group A
Subgroups
Note 6
VIN = 120 Volts, 100% Load
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
VIN = 80, 120, 160 Volts - Notes 6, 11
Either Output
Either Output
Either Output
Total of Both Outputs. Notes 6,11
Test Conditions
Min
80
4.95
-5.05
11.88
-12.12
14.85
-15.15
4.90
-5.10
11.76
-12.24
14.70
-15.30
Nom
120
5.00
-5.00
12.00
-12.00
15.00
-15.00
Max
160
5.05
-4.95
12.12
-11.88
15.15
-14.85
5.10
-4.90
12.24
-11.76
15.30
-14.70
12.8
6.4
5.3
80
96
100
Each Output Note 1
VIN = 120 Volts, 100% Load - Notes 1, 6
Note 10
No Load, 50% Load, 100% Load
VIN = 80, 120, 160 Volts.
VIN = 80, 120, 160 Volts. Note 12
Positive Output
Negative Output
Positive Output
Negative Output
Positive Output
Negative Output
10,000
-0.015
-0.5
-1.0
+0.015
+0.5
+1.0
µF
%/°C
Unit
V
V
A
W
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-1.0
-8.0
-1.0
-5.0
-1.0
-5.0
+1.0
+8.0
+1.0
+5.0
+1.0
+5.0
%
For Notes to Specifications, refer to page 4
2
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AFL120XXD Series
Static Characteristics
(Continued)
Parameter
OUTPUT RIPPLE VOLTAGE
AFL12005D
AFL12012D
AFL12015D
INPUT CURRENT
No Load
Inhibit 1
Inhibit 2
INPUT RIPPLE CURRENT
AFL12005D
AFL12012D
AFL12015D
CURRENT LIMIT POINT
Expressed as a Percentage
of Full Rated Load
LOAD FAULT POWER DISSIPATION
Overload or Short Circuit
EFFICIENCY
AFL12005D
AFL12012D
AFL12015D
ENABLE INPUTS
(Inhibit Function)
Converter Off
Sink Current
Converter On
Sink Current
SWITCHING FREQUENCY
SYNCHRONIZATION INPUT
Frequency Range
Pulse Amplitude, Hi
Pulse Amplitude, Lo
Pulse Rise Time
Pulse Duty Cycle
ISOLATION
DEVICE WEIGHT
MTBF
1, 2, 3
V
IN
= 120 Volts, 100% Load
1
2
3
1
2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
Group A
Subgroups
1, 2, 3
1, 2, 3
1, 2, 3
Test Conditions
VIN = 80, 120, 160 Volts, 100% Load,
BW = 10MHz
Min
Nom
Max
60
80
80
Unit
mVpp
VIN = 120 Volts
IOUT = 0
Pin 4 Shorted to Pin 2
Pin 12 Shorted to Pin 8
VIN = 120 Volts, 100% Load
20
25
3.0
5.0
60
70
80
mA
mApp
VOUT = 90% VNOM , Current split
equally on positive and negative outputs.
Note 5
115
105
125
125
115
140
%
V
IN
= 120 Volts
32
W
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
78
82
83
-0.5
2.0
500
500
2.0
-0.5
20
100
82
85
87
0.8
100
50
100
550
600
700
10
0.8
100
80
%
Logical Low on Pin 4 or Pin 12
Note 1
Logical High on Pin 4 and Pin 12 - Note 9
Note 1
V
µA
V
µA
KHz
KHz
V
V
ns
%
MΩ
Note 1
Note 1
Input to Output or Any Pin to Case
(except Pin 3). Test @ 500VDC
Slight Variations with Case Style
MIL-HDBK-217F, AIF @ T C = 40°C
1
85
300
g
KHrs
For Notes to Specifications, refer to page 4
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3
AFL120XXD Series
Dynamic Characteristics
-55°C < T
CASE
< +125°C, V
IN
=120V
unless otherwise specified.
Parameter
LOAD TRANSIENT RESPONSE
AFL12005D
Either Output
Amplitude
Recovery
Amplitude
Recovery
AFL12012D
Either Output
Amplitude
Recovery
Amplitude
Recovery
AFL12015D
Either Output
Amplitude
Recovery
Amplitude
Recovery
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
4, 5, 6
Group A
Subgroups
Note 2, 8
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
Load Step 50%
⇔
100%
Load Step 10%
⇔
50%
10%
⇒
50%
50%
⇒
10%
Note 1, 2, 3
VIN Step = 80
⇔
160 Volts
Note 4
4, 5, 6
4, 5, 6
Enable 1, 2 on. (Pins 4, 12 high or
open)
Same as Turn On Characteristics.
MIL-STD-461D, CS101, 30Hz to 50KHz
Note 1
50
60
dB
50
75
250
120
mV
ms
-500
500
500
mV
µs
-450
-450
450
200
450
200
400
750
200
750
200
400
750
200
750
200
400
mV
µs
mV
µs
µs
mV
µs
mV
µs
µs
mV
µs
mV
µs
µs
Test Conditions
Min
Nom
Max
Unit
-750
-750
-750
-750
LINE TRANSIENT RESPONSE
Amplitude
Recovery
TURN-ON CHARACTERISTICS
Overshoot
Delay
LOAD FAULT RECOVERY
LINE REJECTION
Notes to Specifications:
Parameters not 100% tested but are guaranteed to the limits specified in the table.
Recovery time is measured from the initiation of the transient to where Vout has returned to within
±1.0%
of
Vout at 50% load.
3. Line transient transition time
≥
100µs.
4. Turn-on delay is measured with an input voltage rise time of between 100V and 500V per millisecond.
5. Current limit point is that condition of excess load causing output voltage to drop to 90% of nominal.
6. Parameter verified as part of another test.
7. All electrical tests are performed with the remote sense leads connected to the output leads at the load.
8. Load transient transition time
≥
10µs.
9. Enable inputs internally pulled high. Nominal open circuit voltage
≈
4.0VDC.
10. Load current split equally between +Vout and -Vout .
11. Output load must be distributed so that a minimum of 20% of the total output power is being provided by one of
the outputs.
12. Cross regulation measured with load on tested output at 20% of maximum load while changing the load on
other output from 20% to 80%.
1.
2.
4
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AFL120XXD Series
Block Diagram
Figure I. AFL Dual Output
+ INPUT
1
INPUT
FILTER
OUTPUT
FILTER
PRIMARY
BIAS SUPPLY
7
+ OUTPUT
ENABLE 1
4
CURRENT
SENSE
8
OUTPUT RETURN
OUTPUT
FILTER
SYNC OUTPUT
5
CONTROL
SYNC INPUT
6
FB
9
- OUTPUT
SHARE
ERROR
AMP
& REF
AMPLIFIER
11
12
10
SHARE
ENABLE 2
OUTPUT
VOLTAGE TRIM
CASE
3
INPUT RETURN
2
Circuit Operation and Application Information
The AFL series of converters employ a forward switched
mode converter topology. (refer to Figure I.) Operation of
the device is initiated when a DC voltage whose magnitude
is within the specified input limits is applied between pins 1
and 2. If pins 4 and 12 are enabled (at a logical 1 or open)
the primary bias supply will begin generating a regulated
housekeeping voltage bringing the circuitry on the primary
side of the converter to life. Two power MOSFETs used to
chop the DC input voltage into a high frequency square
wave, apply this chopped voltage to the power transformer.
As this switching is initiated, a voltage is impressed on a
second winding of the power transformer which is then
rectified and applied to the primary bias supply. When this
occurs, the input voltage is excluded from the bias voltage
generator and the primary bias voltage becomes internally
generated.
The switched voltage impressed on the secondary output
transformer windings is rectified and filtered to provide the
positive and negative converter output voltages. An error
amplifier on the secondary side compares the positive output
voltage to a precision reference and generates an error
signal proportional to the difference. This error signal is
magnetically coupled through the feedback transformer into
the control section of the converter varying the pulse width
of the square wave signal driving the MOSFETs, narrowing
the pulse width if the output voltage is too high and widening
it if it is too low. These pulse width variations provide the
necessary corrections to regulate the magnitude of output
voltage within its’ specified limits.
Because the primary portion of the circuit is coupled to the
secondary side with magnetic elements, full isolation from
input to output is maintained.
Although incorporating several sophisticated and useful
ancilliary features, basic operation of the AFL120XXDseries
can be initiated by simply applying an input voltage to pins 1
and 2 and connecting the appropriate loads between pins 7,
8, and 9. Of course, operation of any converter with high
power density should not be attempted before secure
attachment to an appropriate heat dissipator. (See
Thermal
Considerations,
page 7)
Inhibiting Converter Output (Enable)
As an alternative to application and removal of the DC voltage
to the input, the user can control the converter output by
providing TTL compatible, positive logic signals to either of
two enable pins (pin 4 or 12). The distinction between these
two signal ports is that enable 1 (pin 4) is referenced to the
input return (pin 2) while enable 2 (pin 12) is referenced to
the output return (pin 8). Thus, the user has access to an
inhibit function on either side of the isolation barrier. Each
port is internally pulled “high” so that when not used, an
open connection on both enable pins permits normal
converter operation. When their use is desired, a logical
“low” on either port will shut the converter down.
Figure II. Enable Input Equivalent Circuit
+5.6V
100K
Pin 4 or
Pin 12
1N4148
290K
2N3904
150K
Pin 2 or
Pin 8
Disable
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5
模拟与混合信号
