[AK2347A]
AK2347A
Two-way Radio Audio & Sub-Audio Processor
Features
• Audio processing
• TX and RX amplifier
• Pre/De-emphasis circuit
• Compressor and Expander with no external components
• Scrambler and De-scrambler in frequency inversion type (3.388kHz or 3.290kHz)
• Limiter with level adjuster
• Splatter filter for wide and narrow band
• Digital controlled amplifier for microphone, modulator and demodulator sensitivity
• Sub-Audio filter with level adjuster for CTCSS and DCS
• Low power supply operation: 2.7 to 3,3V
• Wide range operating for temperature: -40 to 85
°C
• Oscillator circuit for 3.6864MHz and 3.579545MHz crystal
• Serial control interface operation
• Compact plastic packaging, 24-pin QFNJ (4.0x4.0x0.75mm 0.5mm pitch)
Description
AK2347A includes audio filter, limiter, splatter filter, compandor, scrambler, which is highly integrated
two-way radio baseband functions for FRS and LMR.
Audio high-pass filter shows a high attenuation in magnitude response characteristics under 250Hz
that supports to eliminate a subaudio tone clearly.
TX limiter for deviation control has a limiting level adjuster by applying a DC voltage via external
components. Splatter filter has the magnitude response for narrowband(fc=2.55kHz) and
wideband(3.0kHz) to meet various regulatory agencies in the world wide.
Compandor is no adjustment type because it includes all parametric components inside the chip.
Scrambler circuit is composed of frequency inversion circuit by double balanced mixer that has
3.388kHz and 3.290kHz carrier clock.
Sub-Audio filter with level adjuster is available for pre- or post-filter for CTCSS and DCS.
There are four signal level adjusters for microphone, modulator and demodulator sensitivity by digital
controlled amplifier (volume).
• Pin Assignment (Top view)
RSAOUT
TSAOUT
14
RXOUT
DINO
VDD
13
12
11
10
9
8
7
1
TXIN
2
EXTIN
3
EXTINO
4
LIMLV
5
MOD
6
VSS
XOUT
XIN
TEST
CSN
SCLK
SDATA
DIN
16
18
FILTERO
RXINO
RXIN
AGNDIN
AGND
TXINO
19
20
21
22
23
24
17
15
MS0946-E-00
-1-
2008/03
[AK2347A]
Contents
Features........................................................................................................................... 1
Description ....................................................................................................................... 1
Contents........................................................................................................................... 2
Block Diagram.................................................................................................................. 3
Block Functions................................................................................................................ 4
Pin Functions ................................................................................................................... 5
Absolute Maximum Ratings ............................................................................................. 7
Recommended Operating Conditions .............................................................................. 7
Digital DC Characteristics ................................................................................................ 7
Clock Input Characteristics .............................................................................................. 8
Current Consumption ....................................................................................................... 8
Analog Characteristics ..................................................................................................... 9
Level Diagram ................................................................................................................ 15
Digital AC timing............................................................................................................. 16
Register Function Description ........................................................................................ 18
Recommended External Application Circuits.................................................................. 28
Packaging ...................................................................................................................... 33
Important Notice............................................................................................................. 34
MS0946-E-00
-2-
2008/03
[AK2347A]
Block Diagram
EXTINO
EXTIN
2
-
+
TXA2
fc = 300Hz
TX/RX
_HPF
3
TXSW2,1
LIMLV
4
LMT
5
TXINO
24
TC
1
-
+
TXA1
VR1
(HPF)
-6 to +4.5/1.5dB
EM
Pre-
Emphasis
TXIN
RXINO
20
21
RXIN
19
FILTERO
Com-
pressor
Adder
Scrambler/
Descrambler
Limiter
VR2
-9.6 to +3.0
/0.2dB
Splatter
fc = 2.55kHz
/3.0kHz
SMF
MOD
TXRX
-
+
RXA1
RXLPF
HPF
VR3
TXRX
PCONT
De-
Emphasis
Expan-
der
EM
TC
18
VR4
-18,-4.5 to +4.5
/0.25dB
SMF
RXOUT
-4 to +3.5/0.5dB
RXSW
FILSW2,1
3.6864MHz
/ 3.579545MHz
11
XIN
DINO
17
16
-
+
DTA1
Sub-Audio
Programmable
LPF
Power ON
Power ON
at Mode 1,2,3,4 at Mode 2,4
Power ON
at Mode 3,4
Power ON
at Mode 2,3,4
OSC 12
DIN
SASW
-6 to +6/ 0.5dB
VR5
SASW
14 15
RSAOUT
TSAOUT
7
SDATA
Control
Register
13
+
AGND
XOUT
8
9
10
6
AGNDIN
22
+
23
+
TEST
MS0946-E-00
-3-
VSS
2008/03
AGND
SCLK
CSN
VDD
[AK2347A]
Block Functions
Block
TXA1
VR1
(HPF)
Compressor
Pre-emphasis
TX/RX_HPF
Function
Operational amplifier for gain adjustment of transmit audio signal and for the filter for
preventing aliasing noise of the SCF circuit in the subsequent stage. Use external
resistors and capacitors to set the gain to 30dB or less and the cut-off frequency to
around 10kHz.
This circuit controls the volume for adjusting the input level of transmit audio signal.
Setting registers: VR12 to VR10, adjustment range: -6.0dB to +4.5dB in 1.5dB steps
This circuit compresses the amplitude of transmit audio signal by 1/2 in dB scale.
Cross-point: -10dBx. This circuit is turned on and off by the TC register.
This circuit emphasizes the high-frequency component of transmit audio signal to
improve the S/N ratio of the modulation signal.
High-pass filter to eliminate low-frequency components lower than 250Hz which are
included in transmit and receive audio signals. This circuit is turned on and off by the
HPF register.
This circuit inverts the spectrum distribution of transmit and receive audio signals with
respect to the carrier frequency.
The carrier frequency is 3.388kHz or 3.290kHz.
The Scrambler/Descrambler or emphasis circuit can be selected using the EM and
PCONT registers. These circuits cannot be used at the same time.
Operational amplifier for gain adjustment of external tone signal. Use external resistors
and capacitors to set the gain to 0dB or less and the cut-off frequency to around 10kHz.
This circuit adds together the audio signal and external tone input signal. This circuit is
controlled by the TXSW2 and TXSW1 register.
Amplitude limiting circuit to suppress frequency deviation in the modulation signal.
The limit level can be adjusted by applying a DC voltage to the LIMLV pin. When the
pin is left open, the level predetermined within the device is output. This circuit is turned
on and off by the LMT register.
This circuit controls the volume for adjusting the output level on the MOD pin. Setting
registers: VR25 to VR20, adjustment range: -3.2dB to +3.0dB in 0.2dB steps. For
coarse adjustment, switching between -6.4dB and 0dB is possible.
Low-pass filter to eliminate high-frequency components higher than 3kHz which are
included in the limiter output signal. The cut-off frequency can be adjusted with the SPL
register.
Smoothing filter to eliminate the high-frequency and clock components generated in the
SCF circuit.
Operational amplifier for gain adjustment of the receive demodulation signal and for the
filter for preventing aliasing noise in the SCF circuit in the subsequent stage. Use
external resistors and capacitors to set the gain to 20dB or less and the cut-off frequency
to around 40kHz.
This circuit controls the volume for adjusting the input level of the receive demodulation
signal.
Setting registers: VR33 to VR30, adjustment range: -4.0dB to +3.5dB in 0.5dB steps
Low-pass filter to eliminate high-frequency components higher than 3kHz which are
included in the receive demodulation signal.
This circuit restores the original state of the signal of which high-frequency component
has been emphasized by the Pre-emphasis.
This circuit expands the signal compressed twice by the Compressor in dB scale to
restore the original signal state.
Cross-point: -10dBx. The Expander is turned on and off with the TC register.
This circuit controls the volume for adjusting the RX output level.
Setting registers: VR45 to VR40 Adjustment range: -18.0dB, -4.5dB to +4.5dB in
0.25dB steps
Scrambler/
Descrambler
TXA2
Adder
Limiter
VR2
Splatter
SMF
RXA1
VR3
RXLPF
De-emphasis
Expander
VR4
MS0946-E-00
-4-
2008/03
[AK2347A]
Block
DTA1
Sub-Audio
Programmable LPF
VR5
AGND
OSC
Function
Operational amplifier for gain adjustment of the Sub-Audio LPF input signal and for the
filter for preventing aliasing noise in the SCF circuit in the subsequent stage. Use
external resistors and capacitors to set the gain to 0dB or less and the cut-off frequency
to around 10kHz.
Low-pass filter to eliminate components of the DAT1 signal in the transmit operation and
of RXA1 signal in the receive. This circuit is controlled by the SASW register for transmit
or receive and by the SA5 to SA0 for cut-off frequency.
This circuit controls the volume for adjusting the output level from the Sub-Audio LPF
signal.
Setting registers: VR54 to VR50, adjustment range: -6.0dB to +6.0dB in 0.5dB steps
This circuit generates the reference voltage (1/2VDD) for internal analog signals.
This circuit generates a 3.6864MHz or 3.579545MHz reference clock signal from an
external resistor and crystal oscillator. This circuit is controlled by the MCKSL register.
Control registers set the switch status and volume for level adjustment inside the IC
according to the serial input data consisting of 1-bit instruction and 4-bit address and
8-bit data. At power-up, the registers are set to the power-down values by the power-on
reset circuit. This circuit has a software reset named RSTN register.
(See the description of the registers)
Control
Register
Pin Functions
Pin
number
1
Pin name
Pin
type
AI
Power-
down
status
Z
Function
Transmit audio signal input pin
This pin is the inverting input pin of TXA1. This pin, with resistors
and capacitors externally connected, forms a microphone amplifier.
External input pin
This pin is the inverting input pin of TXA2. This pin, with resistors
and capacitors externally connected, forms a amplifier.
An external signal such as a tone signal other than the audio signal
can be input.
Output pin of TXA2 *1)
Limit level adjustment pin
The limit level can be adjusted by applying a DC voltage to this pin.
When this pin is left open, the limit level predetermined within the
device is set.
Modulated transmit signal output pin *2)
Negative power supply pin
Normally, apply 0V.
Serial data input and output control pin
Serial data clock input pin
Serial data chip select input
This signal is active low.
Output pin for testing
This pin is assigned to test pin for pre-delivery inspection in factory.
Do not connect anything in normal operation.
TXIN
2
EXTIN
AI
Z
3
EXTINO
AO
*3)
4
LIMLV
AI
*4)
5
6
7
8
9
10
MOD
VSS
SDATA
SCLK
CSN
TEST
AO
PWR
DB
DI
DI
DO
Z
-
Z
Z
Z
L
MS0946-E-00
-5-
2008/03
微控制器 MCU
