[AKD4686-B]
AKD4686-B
AK4686 Evaluation Board Rev.0
FEATURE
AKD4686-B is an evaluation board for AK4686, a single chip 24bit CODEC that has one stereo ADC and
two stereo DAC. This board has interfaces with AKM’s evaluation boards for A/D converter and D/A
converter and makes easy to evaluate AK4686. Also this board has the digital audio interface and then
achieves the interface with digital audio systems via RCA connector.
Ordering guide
AKD4686-B --- Evaluation Board for AK4686
(Cable for connecting with printer port of IBM-AT compatible PC and control
software are packed with this. This control software does not operate on Windows
NT.)
FUNCTION
On-board clock generators (AK4118 x 2)
Compatible with 2 types of digital audio interface
- RCA (S/PDIF) input/output
- 10pin headers for interfacing with external data source (x2)
RCA connectors for clock input with external clock source
10pin header for register control
GND +5V
Regulator
+3.3V
Control Data
10pin Header
EX2
AK4118
(DIR)
PORT 2
10pin Header
LOUT1/ROUT1
RCA IN
AK4686
LOUT2/ROUT2
PORT 1
10pin Header
RCA OUT
RCA IN
AK4118
(DIT/DIR)
EX1
LIN / RIN
Figure 1. AKD4686-B Block Diagram
(* Circuit diagram and PCB layout are attached at the end of this manual.)
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[AKD4686-B]
EVALUATION BOARD MANUAL
Operating sequence
1. Set up power supply lines.
Name of Color of
Voltage
Jack
Jack
+5V
Red
+4.5∼+5.5V
AVDD1
Orange
+3.0∼+3.6V
Used for
Regulator T2, T5
Comment and attention
Default
+5V
Open
AVDD2
Orange
+3.0∼+3.6V
DVDD
Orange
+3.0∼+3.6V
CVDD
Orange
+3.0∼+3.6V
D3.3V
VSS1
VSS2
VSS3
VSS4
DGND
Orange
Black
Black
Black
Black
Black
+3.0∼+3.6V
0V
0V
0V
0V
0V
Should be always connected
Should be open when JP40
(AVDD1_SEL) is set to REG side.
AVDD1 of AK4686
Should be connected when JP40
(AVDD1_SEL) is set to AVDD1 side.
Should be open when JP41
(AVDD2_SEL) is set to REG side.
AVDD2 of AK4686
Should be connected when JP41
(AVDD2_SEL) is set to AVDD2 side.
Should be open when JP42 (DVDD_SEL)
is set to REG side.
DVDD of AK4686
Should be connected when JP42
(DVDD_SEL) is set to DVDD side.
Should be connected when default.
CVDD of AK4686 Should be open in case of using regulator
T2 when R85 is short and L7 is open.
Should be open when JP45 (D3.3V_SEL)
Power supply of
is set to REG side.
Should be connected when JP45
logic
(D3.3V_SEL) is set to D3.3V side.
Analog Ground
Should be always connected
Analog Ground
Should be always connected
Analog Ground
Should be always connected
Analog Ground
Should be always connected
Digital Ground
Should be always connected
Table 1. Power supply lines
Open
Open
+3.3V
Open
0V
0V
0V
0V
0V
Each supply line should be distributed from the power supply unit.
2. Set up evaluation mode and jumper pins.
(Refer to the following item.)
3. Connect cables.
(Refer to the following item.)
4. Power on.
The AK4686 (U1) should be reset once bringing SW1 (PDN) “L” upon power-up.
Keep “H” during normal operaion.
5. Set up control software registers.
(Refer to the following item.)
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Evaluation modes
(1) DAC with external DIR (Synchronous mode)
1. Connection of connector
For digital (S/PDIF) input, RCA connectors J12 (PORT1 RX0) and J15 (PORT2 RX0) are available.
For analog output, RCA connectors J5 (LOUT1)/JP6 (ROUT1), J7 (LOUT2)/J8 (ROUT2) are available.
2. Setting of jumper pin
Setting of interface signal of PORT1: AK4118 (U4) is as follows.
Jumper
Setting
JP19
XTI1
Open
JP20
MCKO_SEL1
MCKO1
JP21
MCLK1_SEL
Short
JP22
BICK1_SEL
Short
JP23
LRCK1_SEL
Short
JP50
SDTI1
Short
(Default)
Table 2. Setting of interface signal of PORT1: AK4118 (U4) (1/3)
Setting of interface signal of PORT2: AK4118 (U7) is as follows.
Jumper
Setting
JP26
XTI2
Open
JP27
MCKO_SEL2
Don’t care
JP28
MCLK2_SEL
MCDIR1
JP29
BICK2_SEL
BIDIR1
JP30
LRCK2_SEL
LRDIR1
JP31
SDTI2_SEL
SDDIR1
Table 3. Setting of interface signal of PORT2: AK4118 (U7) (1/3)
3. Setting of toggle switch
Switch
Setting
SW2
H
SW5
L
SW6
H
SW7
H
Table 4. Setting of interface signal of PORT1, PORT2: AK4118 (U4,U7) (2/3)
4. Setting of DIP switch
Switch
Setting
SW3
DIF0
H
DIF1
L
DIF2
H
CM0
L
OCKS0
L
OCKS1
H
Table 5. Setting of interface signal of PORT1: AK4118 (U4) (3/3)
Switch
Setting
SW4
DIF0
Don’t care
DIF1
Don’t care
DIF2
Don’t care
CM0
Don’t care
OCKS0
Don’t care
OCKS1
Don’t care
Table 6. Setting of interface signal of PORT2: AK4118 (U7) (3/3)
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(2) DAC with external DIR (Asynchronous mode)
1. Connection of connector
For digital (S/PDIF) input, RCA connectors J12 (PORT1 RX0) and J15 (PORT2 RX0) are available.
For analog output, RCA connectors J5 (LOUT1)/JP6 (ROUT1), J7 (LOUT2)/J8 (ROUT2) are available.
2. Setting of jumper pin
Setting of interface signal of PORT1: AK4118 (U4) is as follows.
Jumper
Setting
JP19
XTI1
Open
JP20
MCKO_SEL1
MCKO1
JP21
MCLK1_SEL
Short
JP22
BICK1_SEL
Short
JP23
LRCK1_SEL
Short
JP50
SDTI1
Short
(Default)
Table 7. Setting of interface signal of PORT1: AK4118 (U4) (1/3)
Setting of interface signal of PORT2: AK4118 (U7) is as follows.
Jumper
Setting
JP26
XTI2
Open
JP27
MCKO_SEL2
MCKO1
JP28
MCLK2_SEL
MCDIR2
JP29
BICK2_SEL
BIDIR2
JP30
LRCK2_SEL
LRDIR2
JP31
SDTI2_SEL
SDDIR2
(Default)
Table 8. Setting of interface signal of PORT2: AK4118 (U7) (1/3)
3. Setting of toggle switch
Switch
Setting
SW2
H
SW5
H
SW6
H
SW7
H
Table 9. Setting of interface signal of PORT1, PORT2: AK4118 (U4, U7) (2/3)
4. Setting of DIP switch
Switch
Setting
SW3
DIF0
H
DIF1
L
DIF2
H
CM0
L
OCKS0
L
OCKS1
H
(Default)
Table 10. Setting of interface signal of PORT1: AK4118 (U4) (3/3)
Switch
Setting
SW4
DIF0
H
DIF1
L
DIF2
H
CM0
L
OCKS0
L
OCKS1
H
(Default)
Table 11. Setting of interface signal of PORT2: AK4118 (U7) (3/3)
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(3) ADC with external DIT
1.
Connection of connector
For analog input, RCA connector JL1(LIN1), JL2(LIN2), JL3(LIN3), JL4(LIN4), JL5(LIN5), JL6(LIN6) and
JR1(RIN1), JR2(RIN2), JR3(RIN3), JR4(RIN4), JR5(RIN5), JR6(RIN6) are available.
For digital (S/PDIF) output, RCA connector J13 (PORT1 TX1) is available.
Setting of jumper pin
Setting of interface signal of PORT1: AK4118 (U4) is as follows.
X1 (24.576MHz) is used as Clock (512fs) .
JP19
XTI1
Open
JP20
MCKO1_SEL
MCKO1
JP21
MCLK1_SEL
Short
JP22
BICK1_SEL
Short
JP23
LRCK1_SEL
Short
JP24
SDTO1_SEL
Short
(Default)
2.
Jumper
Setting
Table 12. Setting of interface signal of PORT1: AK4118 (U4) (1/3)
3. Setting of toggle switch
Switch
Setting
SW2
H
SW5
L
Table 13. Setting of reset of PORT1 AK4118 (U4) (2/3)
4. Setting of DIP switch
Switch
Setting
SW3
CM0
H
DIF0
H
DIF1
L
DIF2
H
OCKS0
L
OCKS1
H
MS1
L
Table 14. Setting of interface signal of PORT1: AK4118 (U4) (3/3)
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嵌入式系统
