QUAD Video Processor
AL700/701/710 Data Sheets
Preliminary
AL700/701/710
Amendments
(Since November 30, 2001)
01.11.30
01.12.07
Preliminary version A1.0
Preliminary version A1.1:
(1) Adds features in paragraph 2
(2) Modifies the function block diagram in paragraph 4
(3) Modifies the pin-out diagrams in paragraph 5
(4) Modifies the pin number assignment in page 11
(5) Modifies Figure 7
(6) Modifies the register description of 15h, 17h, and 58h registers
(7) Updates the mechanical drawing in page 81
Preliminary version B1.0:
(1) Adds AL701 type that does not support analog video outputs, and modifies the
related articles
(2) Modifies the features in paragraph 2
(3) Modifies the function block diagram in paragraph 4
(4) Modifies the pin-out diagrams in paragraph 5
(5) Modifies the pin definition and description in paragraph 6
(6) Modifies contact information in the last page
Preliminary version C1.0:
(1) Removes the Underscan feature
(2) Modifies the pin-out diagrams in paragraph 5
(3) Modifies the blinking bit definition of Font index for one byte mode in figure 15
(4) Modifies the definitions of the BLINKCTRL (#21h) register
Preliminary version C1.1:
(1) Updates the AC timing characteristics
02.01.11
02.04.09
02.05.16
THE INFORMATION CONTAINED HEREIN IS SUBJECT TO CHANGE WIHOUT NOTICE.
©2001,2002-Copyright by AverLogic Technologies, Corp.
Preliminary Version C1.1
2
AL700/701/710
Contents:
1
2
3
4
5
6
7
General Description ...............................................................................................4
Features ..................................................................................................................4
Applications ............................................................................................................5
Function Block Diagram .......................................................................................5
Pin-out Diagram.....................................................................................................6
Pin Definition and Description..............................................................................9
Function Description ...........................................................................................12
7.1 Decoder/ADC Video Input Interface..................................................................................12
7.2 Encoder Video Output Interface ........................................................................................13
7.3 Host Interface .......................................................................................................................15
7.4 Picture Control .....................................................................................................................17
7.5 Video Loss.............................................................................................................................20
7.6 Motion Detection ..................................................................................................................20
7.7 2X Zoom................................................................................................................................21
7.8 Overlay Control....................................................................................................................22
7.9 Memory Interface.................................................................................................................27
7.10 Image Data Upload ..............................................................................................................28
7.11 Interrupt................................................................................................................................28
8
Register Definition ...............................................................................................29
8.1 Register Set ...........................................................................................................................29
8.2 Register Description.............................................................................................................32
9
Electrical Characteristics.....................................................................................74
9.1 Absolute Maximum Ratings................................................................................................74
9.2 Recommended Operating Conditions ................................................................................74
9.3 DC Characteristics ...............................................................................................................74
9.4 AC Characteristics ...............................................................................................................75
10 Timing Diagrams .................................................................................................78
11 Mechanical Drawing-208 PIN PLASTICS PQFP .............................................81
©2001,2002-Copyright by AverLogic Technologies, Corp.
Preliminary Version C1.1
3
AL700/701/710
1 General Description
AL700/701/710 is a 4 channel QUAD-screen video controller that can accept digital video input
sources, provides 2 analog output ports (not for AL701), 2 digital output ports, and memory direct
access mode allowing images to be uploaded onto a PC. AL700/701/710 not only supports 4
channel 8-bit ITU-R-656 4:2:2 interface inputs, dual 8/16-bit digital outputs for successive process
and dual analog (TV encoder embedded, not for AL701) video outputs for TV, Camcorder, VCR,
etc. SDRAM memory is supported via a direct video frame buffer interface. Through I
2
C serial or
proprietary parallel bus, fully programmable register set allows flexibility of control of video
window overlay, OSD display, input channel select or output source select.
OSD (On Screen Display) windows provide overlay of various graphics images such as Pop-up
menu, logo bitmap or message text, etc. Other functions provided by AL700/701/710, such as PIP
(Picture In Picture), 2X zoom with vertical and horizontal interpolation, anti-rolling and motion
detection, can increase the value and power of a security system design. Averlogic’s proprietary
digital and analog signal processing technologies create a high quality tear free, flicker free and anti-
aliasing display. The AL700/701/710 provides a cost-effective solution for all applications of
security related system.
All parts are available in 208-pin PQFP packages.
2 Features
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Accepts NTSC, PAL and SECAM video formats
Supports 4 independent 656/601 8-bit video inputs
Supports multiplexing function for 2 channels using one decoder
Provides 2 independent 656/601 8/16-bit digital outputs
Provides 2 independent S-video/Composite analog video outputs (no need external encoders,
not for AL701)
Picture location selectable
Supports PIP (Picture-In-Picture) function
Supports programmable picture overlay and layer priority
Displays picture at arbitrary channels of 1,2,3 and 4
Provides channel switching without rolling
Freeze individual channel
Provides video loss detection and motion detection
2X zoom with vertical and horizontal interpolation
Provides embedded OSD (On Screen Display) and supports external OSD function
Supports BMP image overlay and Non-fixed font display
Provides fading effects for OSD overlay
Supports various types of video decoder and 1Mx16 or 4Mx16 SDRAM
Supports registers programming via I
2
C serial or proprietary parallel interface
Supports uploading image data onto PC
Provides horizontal image mirroring
Available in 208-pin 28*28mm PQFP
Note: AL710 only supports Black & White video mode
©2001,2002-Copyright by AverLogic Technologies, Corp.
Preliminary Version C1.1
4
AL700/701/710
3 Applications
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Security System: Video Surveillance System
Video Splitting Processor
Car Rear Vision System
4 Function Block Diagram
H_BUS[7:0]
TEST_DAC
XTO_NTSC
XTI_NTSC
SW _A
SW _B
D ecoder
M ultiplexer
Controller
H O ST
IN TERFA CE
C LOCK
XTO_PAL
SP_SEL
H_CLK
H_DENB
H_RDB
H_RDYB
INTR
XTI_PAL
RSTB
TEST
XTO
XTI
V R EF_IN
COM P
R SE T
V C L K _A
H SY N C _A
V SY N C _A
FIEL D _A
V A LID 0_A
V A LID 1_A
D I_A [7:0]
D ecoder
Interface_A
(656/601)
M otion
Detection
Engine
Display Engine
& Encoder
Interface
(656/601)
Picture Control &
Scalar Engine
A _M O N
Video
E ncoders
A _S
A _V C R
V C LK _B
H SY N C _B
V SY N C _B
FIE LD _B
V A L ID 0_B
V A L ID 1_B
D I_B [7:0]
D ecoder
Interface_B
(656/601)
V C LK
V C LK X 2
H R EF
H SY N C
V SY N C
FIEL D
V C LK _C
H SY N C _C
V SY N C _C
FIE LD _C
V A L ID 0_C
V A L ID 1_C
D I_C [7:0]
D ecoder
Interface_C
(656/601)
M O N D O [15:0]
V C R D O [7 :0]
V C L K _D
H SY N C _D
V SY N C _D
FIEL D _D
V A LID 0_D
V A LID 1_D
D I_D [7:0]
D ecoder
Interface_D
(656/601)
SD RAM
Controller
Overlay
Controller
(Bulit-in O SD)
DMCLK_I
DMCLK_O
MA[11:0]
MD[15:0]
BA[1:0]
OSD_COLOR
CKE
CSB
RASB
CASB
WEB
DQMH
DQML
OSD_VBLK
OSD_CLK
MONOSD_EN
Note: Some signals are not available for AL701/710. For detailed information refer to Pin-out
Diagram.
©2001,2002-Copyright by AverLogic Technologies, Corp.
Preliminary Version C1.1
VCROSD_EN
5
MSPM0 MCU
