A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD1706A/ALD1706B
ALD1706/ALD1706G
ULTRA MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
The ALD1706 is a monolithic CMOS ultra micropower high slew-rate, high
performance operational amplifier intended for a broad range of analog
applications using
±1V
to
±6V
dual power supply systems, as well as +2V
to +12V battery operated systems. All device characteristics are specified
for +5V single supply or
±2.5V
dual supply systems. Supply current is 40µA
maximum at 5V supply voltage. It is manufactured with Advanced Linear
Devices' enhanced ACMOS silicon gate CMOS process.
The ALD1706 is designed to offer high performance for a wide range of
applications requiring very low power dissipation. It offers the popular
industry standard single operational amplifier pin configuration.
The ALD1706 has been developed specifically for the +5V single battery
or
±1V
to
±6V
dual battery user. Several important characteristics of the
device make application easier to implement at those voltages. First, the
operational amplifier can operate with rail to rail input and output voltages.
This means the signal input voltage and output voltage can be close to or
equal to the positive and negative supply voltages. This feature allows
numerous analog serial stages and flexibility in input signal bias levels.
Secondly, the device was designed to accommodate mixed applications
where digital and analog circuits may operate off the same power supply
or battery. Thirdly, the output stage can typically drive up to 25pF capacitive
and 20KΩ resistive loads. These features, combined with extremely low
input currents, high open loop voltage gain of 100V/mV, useful bandwidth
of 400KHz, a slew rate of 0.17V/µs, low offset voltage and temperature drift,
make the ALD1706 a versatile, micropower operational amplifier.
The ALD1706, designed and fabricated with silicon gate CMOS techno-
logy, offers 0.1pA typical input bias current. On chip offset voltage trimming
allows the device to be used without nulling in most applications.
FEATURES
• 20µA supply current
• All parameters specified for +5V single
supply or
±
2.5V dual supply systems
• Rail to rail input and output voltage ranges
• No frequency compensation required --
unity gain stable
• Extremely low input bias currents -- 0.1pA
typical (30pA max.)
• Ideal for high source impedance applications
• Dual power supply
±1.0V
to
±6.0V
operation
• Single power supply +2V to +12V operation
• High voltage gain – typically 100V/mV
@
±2.5V
(100dB)
• Drive as low as a 20KΩ load
• Output short circuit protected
• Unity gain bandwidth of 0.4MHz
• Slew rate of 0.17V/µs
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
Voltage amplifier
Voltage follower/buffer
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable
instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
ORDERING INFORMATION
Operating Temperature Range
-55°C to +125°C
0°C to +70°C
0°C to +70°C
8-Pin
CERDIP
Package
ALD1706A DA
ALD1706B DA
ALD1706 DA
8-Pin
Small Outline
Package (SOIC)
ALD1706A SA
ALD1706B SA
ALD1706 SA
8-Pin
Plastic Dip
Package
ALD1706A PA
ALD1706B PA
ALD1706 PA
ALD1706G PA
N/C
-IN
+IN
V-
1
2
3
4
TOP VIEW
DA, PA, SA PACKAGE
8
7
6
5
N/C
V+
OUT
N/C
* Contact factory for industrial temperature range
* N/C Pin is connected internally. Do not connect externally.
© 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
+
Differential input voltage range
Power dissipation
Operating temperature range PA, SA package
DA package
Storage temperature range
Lead temperature, 10 seconds
13.2V
-0.3V to V
+
+0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C V
S
=
±
2.5V unless otherwise specified
Parameter
Supply
Voltage
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Input Voltage
Range
Input
Resistance
Input Offset
Voltage Drift
Symbol Min
V
S
V
+
V
OS
±1.0
2.0
1706A
Typ
Max
±6.0
12.0
0.9
1.7
0.1
25
240
30
300
5.3
2.8
-0.3
-2.8
0.1
Min
±1.0
2.0
1706B
Typ
Max
±6.0
12.0
2.0
2.8
25
240
30
300
5.3
2.8
-0.3
-2.8
0.1
Min
±1.0
2.0
1706
Typ Max
±6.0
12.0
4.5
5.3
25
240
30
300
5.3
2.8
-0.3
-2.8
0.1
Min
±1.0
2.0
1706G
Typ
Max
±6.0
12.0
10.0
11.0
30
450
50
600
5.3
2.8
Unit
V
V
mV
mV
pA
pA
pA
pA
V
V
Ω
µV/°C
dB
dB
dB
dB
R
S
≤
100KΩ
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
Test
Conditions
Dual Supply
Single Supply
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
V
+
= +5V
V
S
=
±2.5V
I
OS
I
B
0.1
0.1
0.1
0.1
V
IR
-0.3
-2.8
R
IN
10
12
10
12
10
12
10
12
TCV
OS
70
70
70
70
7
80
80
83
83
65
65
65
65
7
80
80
83
83
65
65
65
65
7
80
80
83
83
60
60
60
60
10
80
80
83
83
Power Supply PSRR
Rejection Ratio
Common Mode CMRR
Rejection Ratio
Large Signal
Voltage Gain
A
V
32
20
100
32
20
100
32
20
100
20
10
80
V/ mV
V/ mV
R
L
= 1MΩ
R
L
= 1MΩ
0°C
≤
T
A
≤
+70°C
RL =1MΩ
Output
Voltage
Range
Output Short
Circuit Current
V
O
low
V
O
high 4.99
V
O
low
V
O
high 2.30
I
SC
0.001
4.999
-2.40
2.40
200
20
0.01
4.99
-2.30
2.30
0.001 0.01
4.999
-2.40 -2.30
2.40
200
4.99
2.30
0.001 0.01
4.999
-2.40 -2.30
2.40
200
4.99
2.30
0.001 0.01
4.999
-2.40 -2.30
2.40
200
V
V
V
V
µA
0°C
≤
T
A
≤
+70°C
R
L
=100KΩ
0°C
≤
T
A
≤
+70°C
Supply Current I
S
Power
Dissipation
40
20
40
20
40
20
50
µA
V
IN
= 0V
No Load
V
S
=
±2.5V
P
D
200
200
200
250
µW
ALD1706A/ALD1706B
ALD1706/ALD1706G
Advanced Linear Devices
2
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
°
C V
S
=
±
2.5V unless otherwise specified
Parameter
Input
Capacitance
Bandwidth
Slew Rate
Symbol
C
IN
B
W
S
R
Min
1706A
Typ
Max
1
400
0.17
Min
1706B
Typ
Max
1
400
0.17
Min
1706
Typ
1
400
0.17
Max
1706G
Min
Typ Max
1
400
0.17
Unit
pF
KHz
V/µs
A
V
= +1
R
L
= 1MΩ
R
L
= 1MΩ
R
L
=1MΩ
C
L
= 25pF
0.1%
A
V
= -1 R
L
=1MΩ
C
L
=25pF
Test
Condition
Rise time
Overshoot
Factor
Settling Time
t
r
1.0
20
1.0
20
1.0
20
1.0
20
µs
%
t
s
10.0
10.0
10.0
10.0
µs
T
A
= 25
°
C V
S
=
±
1.0V unless otherwise specified
Parameter
Power Supply
Rejectio Ratio
Symbol
PSRR
Min
1706A
Typ
Max
70
Min
1706B
Typ
Max
70
Min
1706
Typ
70
Max
Min
1706G
Typ Max
70
Unit
dB
Test
Condition
R
S
≤
1MΩ
Common Mode
Rejection Ratio
CMRR
70
70
70
70
dB
R
S
≤
1MΩ
Large Signal
Voltage Gain
Output
Voltage
Range
A
V
V
O
low
V
O
high
B
W
S
R
50
-0.95
0.95
0.3
0.17
-0.9
0.9
50
-0.95
0.95
0.3
0.17
-0.9
0.9
50
-0.95
0.95
0.3
0.17
-0.9
0.9
50
-0.95
0.95
0.3
0.17
-0.9
V/ mV
V
V
MHz
V/µs
R
L
=1MΩ
R
L
=1MΩ
0.9
Bandwidth
Slew Rate
A
V
= +1
C
L
= 25pF
V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
1706B DA
Parameter
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Range
CMRR
60
83
60
83
dB
R
S
≤
1MΩ
I
B
PSRR
60
75
10.0
60
75
10.0
nA
dB
R
S
≤
1MΩ
Symbol
V
OS
I
OS
Min
Typ
Max
3.0
8.0
Min
1706 DA
Typ
Max
6.5
8.0
Unit
mV
nA
Test
Conditions
R
S
≤
100KΩ
A
V
V
O
low
V
O
high
15
2.30
50
-2.40
2.40
-2.30
15
2.30
50
-2.40
2.40
-2.30
V/ mV
V
V
R
L
= 1MΩ
R
L
= 1MΩ
ALD1706A/ALD1706B
ALD1706/ALD1706G
Advanced Linear Devices
3
Design & Operating Notes:
1. The ALD1706 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme
to achieve large voltage gain, high output driving capability, and
better frequency stability. In a conventional CMOS operational
amplifier design, compensation is achieved with a pole splitting
capacitor together with a nulling resistor. This method is, however,
very bias dependent and thus cannot accommodate the large
range of supply voltage operation as is required from a stand
alone CMOS operational amplifier. The ALD1706 is internally
compensated for unity gain stability using a novel scheme that
does not use a nulling resistor. This scheme produces a clean
single pole roll off in the gain characteristics while providing for
more than 70 degrees of phase margin at the unity gain frequency.
2. The ALD1706 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail-to-rail
input common mode voltage range. This means that with the
ranges of common mode input voltage close to the power supplies,
one of the two differential stages is switched off internally. To
maintain compatibility with other operational amplifiers, this
switching point has been selected to be about 1.5V below the
positive supply voltage. Since offset voltage trimming on the
ALD1706 is made when the input voltage is symmetrical to the
supply voltages, this internal switching does not affect a large
variety of applications such as an inverting amplifier or non-
inverting amplifier with a gain larger than 2.5 (5V operation),
where the common mode voltage does not make excursions
above this switching point. The user should however, be aware
that this switching does take place if the operational amplifier is
connected as a unity gain buffer and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than
1pA at room temperature. This low input bias current assures that
the analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
12
Ω
would not be a problem as the source impedance
would limit the node impedance. However, for applications where
source impedance is very high, it may be necessary to limit noise
and hum pickup through proper shielding.
4. The output stage consists of class AB complementary output
drivers, capable of driving a low resistance load. The output
voltage swing is limited by the drain to source on-resistance of the
output transistors as determined by the bias circuitry, and the
value of the load resistor. When connected in the voltage follower
configuration, the oscillation resistant feature, combined with the
rail to rail input and output feature, makes an effective analog
signal buffer for medium to high source impedance sensors,
transducers, and other circuit networks.
5. The ALD1706 operational amplifier has been designed to provide
full static discharge protection. Internally, the design has been
carefully implemented to minimize latch up. However, care must
be exercised when handling the device to avoid strong static fields
that may degrade a diode junction, causing increased input
leakage currents. In using the operational amplifier, the user is
advised to power up the circuit before, or simultaneously with, any
input voltages applied and to limit input voltages to not exceed
0.3V of the power supply voltage levels.
6. The ALD1706, with its micropower operation, offers numerous
benefits in reduced power supply requirements, less noise coupling
and current spikes, less thermally induced drift, better overall
reliability due to lower self heating, and lower input bias current.
It requires practically no warm up time as the chip junction heats
less than 0.1°C above ambient temperature under most operating
conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
100
INPUTS GROUNDED
OUTPUT UNLOADED
80
T
A
= -55°C
60
40
20
+70°C
0
0
±1
±2
±3
±4
±5
±6
SUPPLY VOLTAGE (V)
+125°C
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
±7
±6
±5
±4
±3
±2
±1
0
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
T
A
= 25°C
-25°C +25°C
SUPPLY CURRENT (µA)
OPEN LOOP VOLTAGE GAIN AS AFUNCTION
OF LOAD RESISTANCE
1000
10000
COMMON MODE INPUT
VOLTAGE RANGE (V)
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
INPUT BIAS CURRENT (pA)
OPEN LOOP VOLTAGE
GAIN (V/mV)
1000
100
V
S
=
±2.5V
100
10
10
V
S
=
±2.5V
T
A
= 25°C
1
10K
100K
1M
10M
1.0
0.1
-50
-25
0
25
50
75
100
125
LOAD RESISTANCE (Ω)
AMBIENT TEMPERATURE (°C)
ALD1706A/ALD1706B
ALD1706/ALD1706G
Advanced Linear Devices
4
TYPICAL PERFORMANCE CHARACTERISTICS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
OUTPUT VOLTAGE SWING (V)
1000
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
±6
±5
±4
±3
±2
±1
±25°C ≤
T
A
≤
+125°C
R
L
= 100KΩ
OPEN LOOP VOLTAGE
GAIN (V/mV)
100
10
±55°C ≤
T
A
≤
+125°C
R
L
= 100KΩ
1
0
±2
±4
SUPPLY VOLTAGE (V)
±6
±8
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
INPUT OFFSET VOLTAGE (mV)
+5
+4
+3
+2
+1
0
-1
-2
-3
-4
-5
-50
-25
0
+25
+50
+75
+100 +125
OPEN LOOP VOLTAGE GAIN AS
A FUNCTION OF FREQUENCY
120
100
80
60
40
20
0
-20
1
10
0
45
90
135
180
100
1K
10K 100K
FREQUENCY (Hz)
1M
10M
V
S
=
±2.5V
T
A
= 25°C
OPEN LOOP VOLTAGE
GAIN (dB)
V
S
=
±2.5V
PHASE SHIFT IN DEGREES
AMBIENT TEMPERATURE (°C)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE (mV)
15
10
5
0
-5
-10
V
S
=
±2.5V
T
A
= 25°C
LARGE - SIGNAL TRANSIENT
RESPONSE
2V/div
V
S
=
±1.0V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
500mV/div
10µs/div
-15
-2
-1
0
+1
+2
+3
COMMON MODE INPUT VOLTAGE (V)
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 25pF
2V/div
10µs/div
50mV/div
10µs/div
ALD1706A/ALD1706B
ALD1706/ALD1706G
Advanced Linear Devices
5
