A
DVANCED
L
INEAR
D
EVICES,
I
NC.
TM
ALD1722/ALD1722G
e
®
EPAD
D
LE
AB
E
N
PRECISION LOW POWER CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
The ALD1722/ALD1722G is a monolithic precision low power CMOS
operational amplifier intended for a broad range of precision applications
requiring exremely low input signal power. Input signal power is the product
of input offset voltage and input bias current, which represents the mini-
mum required power draw from the signal source in order to drive the input
of the operational amplifier. Input signal power is also a figure of merit in
source loading and its associated error, and is a measure of the basic signal
resolution possible through the operational amplifier for a given signal
source. For certain types of signal sources, signal loading directly trans-
lates into a significant distortion or "interface noise equivalent " term.
The ALD1722/ALD1722G is designed to set a new standard in low input
signal power requirements. The typical input loading at its input is 0.03 mV
offset voltage and 0.01 pA input bias current at 25C, resulting in 0.0003 fW
input signal power draw. This input characteristic virtually eliminates any
loading effects on most types of signal sources, offering unparalled
accuracy and signal integrity and fidelity. Obviously, for capacitive and high
sensitivity, high impedance signal sources, the ALD1722/ALD1722G is
ideally suited. It is readily suited for +5V single supply (or
±2V
to
±5V)
systems, with low operating power dissipation, a traditional strength of
CMOS technology. It is offered with industry standard pin configuration of
µA741
and ICL7611 types.
The ALD1722/ALD1722G can operate with rail to rail large signal input and
output voltages with relatively high slew rate. The input voltage can be
equal to or exceed the positive and negative supply voltages while the
output voltage can swing close to these supply voltage rails. This feature
significantly reduces the supply overhead voltage required to operate the
operational amplifier and allows numerous analog serial stages to operate
in a low power supply environment. circuits may operate off the same power
supply or battery. This device also features rail-to-rail input and output
voltage ranges, tolerance to over-voltage input spikes of 300mV beyond
supply rails, high open loop voltage gain, useful bandwidth of 1.5 MHz, slew
rate of 2.1 V/µs, and low supply current of 0.8mA. Finally, the output stage
can typically drive up to 400pF capacitive loads in the unity gain mode and
up to 4000 pF capacitive load at a gain of 5.
These features make the ALD1722/ALD1722G a versatile, high precision
operational amplifier that is user friendly and easy to use with virtually no
source loading and zero input-loading induced source errors. Additionally,
robust design and rigorous screening make this device especially suitable
for operation in temperature-extreme environments and rugged condi-
tions.
ORDERING INFORMATION
(“L” suffix denotes lead-free (RoHS))
-IN
2
3
4
TOP
VIEW
TOP
VIEW
SAL, PAL, DA PACKAGES
* N/C pins are internally connected. Do not connect externally.
FEATURES & BENEFITS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Lead Free - RoHS compatible
Robust high-temperature operation
Industry standard pinout
Rail-to-rail input/output
Exremely low input signal power
Input bias current of 0.01pA and
input offset voltage of 25µV
No external components
No internal chopper clocking noise
No chopper dynamic power dissipation
Simple and cost effective
Small package size
Drive up to 4000pF load capacitance
Low power
Suitable for rugged, temperature-extreme
environments
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Precision cable driver
Sensor interface circuits
Unity gain buffer amplifier
Precision analog cable driver
Transducer biasing circuits
Capacitive and charge integration circuits
Biochemical probe interface
Signal conditioning
Portable instruments
High source impedance electrode
amplifiers
Precision Sample and Hold amplifiers
Precision current to voltage converter
Error correction circuits
Sensor compensation circuits
Precision gain amplifiers
System output level shifter
PIN CONFIGURATION
N/C
1
2
8
7
6
5
N/C
V+
OUT
N/C
0°C to +70°C
8-Pin
Small Outline
Package (SOIC)
ALD1722SAL
ALD1722GSAL
Operating Temperature Range
0°C to +70°C
-55°C to +125°C
8-Pin
Plastic Dip
Package
ALD1722PAL
ALD1722GPAL
8-Pin
CERDIP
Package
ALD1722DA
ALD1722GDA
+IN
V-
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.1 ©2011 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V
+
Differential input voltage range
Power dissipation
Operating temperature range SAL, PAL packages
DA package
Storage temperature range
Lead temperature, 10 seconds
CAUTION:
ESD Sensitive Device. Use static control procedures in ESD controlled environment.
10.6V
-0.3V to
V
+
+0.3V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
o
C V
S
=
±
2.5V unless otherwise specified
Parameter
Supply Voltage
Symbol
VS
V+
VOS
IOS
Min
±2.0
4.0
1722
Typ
Max
±5.0
10.0
Min
±2.0
4.0
1722G
Typ
Max
±5.0
10.0
Unit
V
V
µV
pA
pA
pA
pA
V
V
Ω
µV/°C
dB
dB
V/mV
V/mV
Test Conditions
Single Supply
RS
≤
100KΩ
TA = 25°C
0°C
≤
TA
≤
+70°C
TA = 25°C
0°C
≤
TA
≤
+70°C
V+ = +5V
VS =
±2.5V
Input Offset Voltage
Input Offset Current
25
0.01
90
10
280
10
280
80
0.01
400
10
280
10
280
Input Bias Current
IB
0.01
0.01
Input Voltage Range
VIR
-0.3
-2.8
+5.3
+2.8
1014
4
85
97
-0.3
-2.8
1014
7
85
97
50
250
500
0.002
4.998
-2.44
2.44
8
+5.3
+2.8
Input Resistance
Input Offset Voltage Drift
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Large Signal Voltage Gain
RIN
TCVOS
PSRR
CMRR
AV
50
RS
≤
100KΩ
RS
≤
100KΩ
RS
≤
100KΩ
RL =10KΩ
RL
≥
1MΩ
RL =1MΩ V+ = 5V
0°C
≤
TA
≤
+70°C
RL =10KΩ
0°C
≤
TA
≤
+70°C
250
500
0.002
4.998
-2.44
2.44
8
0.8
1.5
0.01
Output Voltage Range
VO low
VO high
VO low
VO high
0.01
-2.35
4.99
2.35
4.99
-2.35
2.35
V
V
V
V
mA
Output Short Circuit Current
Supply Current
ISC
IS
0.8
1.5
mA
VIN = 0V
No Load
VS =
±2.5V
Power Dissipation
Input Capacitance
Maximum Load Capacitance
PD
CIN
CL
4.0
1
400
4000
26
0.6
7.5
4.0
1
400
4000
26
0.6
7.5
mW
pF
pF
pF
nV/√ Hz
fA/√ Hz
Gain = 1
Gain = 5
f = 1KHz
f =10Hz
Input Noise Voltage
Input Current Noise
en
in
ALD1722/ALD1722G
Advanced Linear Devices
2 of 9
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
°
C V
S
=
±
2.5V unless otherwise specified (cont'd)
1722
Parameter
Bandwidth
Slew Rate
Symbol
BW
SR
Min
1.0
1.4
Typ
1.5
2.1
Max
Min
1.0
1.4
1722G
Typ
1.5
2.1
Max
Unit
MHz
V/µs
AV = +1
RL = 10KΩ
RL = 10KΩ
RL = 10KΩ,
CL = 100pF
0.01%
0.1%
AV = -1, RL= 5KΩ
CL = 50pF
Test Conditions
Rise time
Overshoot Factor
tr
0.2
10
0.2
10
µs
%
Settling Time
ts
8.0
3.0
8.0
3.0
µs
µs
T
A
= 25
°
C V
S
=
±
5.0V unless otherwise specified
1722
Parameter
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Large Signal Voltage Gain
Output Voltage Range
Symbol
PSRR
CMRR
A
V
V
O
low
V
O
high
B
W
S
R
Min
Typ
85
97
250
-4.90
4.93
1.7
2.8
-4.80
4.80
Max
Min
1722G
Typ
85
97
250
-4.90
4.93
1.7
2.8
-4.80
Max
Unit
dB
dB
V/mV
V
Test Conditions
R
S
≤
100KΩ
R
S
≤
100KΩ
R
L
= 10KΩ
R
L
= 10KΩ
4.80
Bandwidth
Slew Rate
MHz
V/µs
A
V
= +1, C
L
= 50pF
V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
1722
Parameter
Input Offset Voltage
Input Offset Current
Input Bias Current
Power Supply Rejection Ratio
Common Mode Rejection Ratio
Large Signal Voltage Gain
Output Voltage Range
Symbol
VOS
IOS
IB
PSRR
CMRR
AV
VO low
VO high
10
85
97
25
-2.40
2.40
-2.30
2.30
10
Min
Typ
0.5
Max
2.0
2.0
2.0
85
97
25
-2.40
2.40
-2.30
Min
1722G
Typ
0.7
Max
3.5
2.0
2.0
Unit
mV
nA
nA
dB
dB
V/mV
V
V
RS
≤
100KΩ
RS
≤
100KΩ
RL
≤
10KΩ
RL
≤
10KΩ
Test Conditions
RS
≤
100KΩ
2.30
ALD1722/ALD1722G
Advanced Linear Devices
3 of 9
Design & Operating Notes:
1. The ALD1722/ALD1722G CMOS operational amplifier uses a 3 gain
stage architecture and an improved frequency compensation scheme
to achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD1722/ALD1722G is internally compensated for
unity gain stability using a novel scheme that does not use a nulling
resistor. This scheme produces a clean single pole roll off in the gain
characteristics while providing for more than 70 degrees of phase
margin at the unity gain frequency. A unity gain buffer using the
ALD1722/ALD1722G will typically drive 400pF of external load ca-
pacitance without stability problems. In the inverting unity gain con-
figuration, it can drive up to 800pF of load capacitance. Compared to
other CMOS operational amplifiers, the ALD1722/ALD1722G has
shown itself to be more resistant to parasitic oscillations.
2. The ALD1722/ALD1722G has complementary p-channel and n-
channel input differential stages connected in parallel to accomplish
rail to rail input common mode voltage range. This means that with the
ranges of common mode input voltage close to the power supplies,
one of the two differential stages is switched off internally. To maintain
compatibility with other operational amplifiers, this switching point has
been selected to be about 1.5V above the negative supply voltage.
Since offset voltage trimming on the ALD1722/ALD1722G is made
when the input voltage is symmetrical to the supply voltages, this
internal switching does not affect a large variety of applications such
as an inverting amplifier or non-inverting amplifier with a gain larger
than 2.5 (5V operation), where the common mode voltage does not
make excursions below this switching point. The user should how-
ever, be aware that this switching does take place if the operational
amplifier is connected as a unity gain buffer and should make
provision in his design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
14
Ω
would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors
as determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
5. ALD1722/ALD1722G operational amplifier has been designed to
provide full static discharge protection. Internally, the design has been
carefully implemented to minimize latch up. However, care must be
exercised when handling the device to avoid strong static fields that
may degrade a diode junction, causing increased input leakage
currents. In using the operational amplifier, the user is advised to
power up the circuit before, or simultaneously with, any input voltages
applied and to limit input voltages to not exceed 0.3V of the power
supply voltage levels.
6. The ALD1722/ALD1722G has an internal design architecture that
provides robust high temperature operation. Contact factory for
custom screening versions.
TYPICAL PERFORMANCE CHARACTERISTICS
0
S
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
±7
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
1000
COMMON MODE INPUT
VOLTAGE RANGE (V)
±5
±4
±3
±2
±1
0
0
±1
±2
±3
±4
±5
±6
±7
OPEN LOOP VOLTAGE
GAIN (V/mV)
±6
T
A
= 25°C
}
-55°C
}
+25°C
100
}
+125°C
10
R
L
= 10KΩ
R
L
= 5KΩ
1
0
±2
±4
SUPPLY VOLTAGE (V)
±6
±8
SUPPLY VOLTAGE (V)
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
1000
2.5
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
INPUTS GROUNDED
OUTPUT UNLOADED
INPUT BIAS CURRENT (pA)
SUPPLY CURRENT (mA)
100
10
V
S
=
±2.5V
2.0
1.5
1.0
0.5
0
T
A
= -55ºC
-25°C
+25°C
+80°C
+125°C
1.0
0.1
0.01
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
0
±1
±2
±3
±4
±5
±6
SUPPLY VOLTAGE (V)
ALD1722/ALD1722G
Advanced Linear Devices
4 of 9
TYPICAL PERFORMANCE CHARACTERISTICS (cont'd)
±7
OUTPUT VOLTAGE SWING AS A
FUNCTION OF SUPPLY VOLTAGE
120
OPEN LOOP VOLTAGE
GAIN (dB)
OPEN LOOP VOLTAGE AS A
FUNCTION OF FREQUENCY
100
80
60
40
20
0
V
S
=
±2.5V
T
A
= 25°C
0
45
90
135
180
1
10
100
1K
10K
100K
1M
10M
OUTPUT VOLTAGE SWING (V)
±6
±5
±4
±3
±2
0
-55°C
≤
T
A
≤
125°C
RL = 10KΩ
PHASE SHIFT IN DEGREES
R
L
= 10KΩ
R
L
= 2KΩ
-20
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
1000
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
OPEN LOOP VOLTAGE
GAIN (V/mV)
100
V
S
=
±2.5V
T
A
= 25°C
V
S
=
±2.5V
T
A
= 25°C
R
L
= 10KΩ
C
L
= 50pF
10
1
1K
10K
100K
1000K
1V/div
LOAD RESISTANCE (Ω)
2µs/div
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 10KΩ
C
L
= 50pF
20mV/div
2µs/div
ALD1722/ALD1722G
Advanced Linear Devices
5 of 9
电源技术
