A
DVANCED
L
INEAR
D
EVICES,
I
NC.
ALD4701A/ALD4701B
ALD4701
QUAD MICROPOWER RAIL-TO-RAIL CMOS OPERATIONAL AMPLIFIER
GENERAL DESCRIPTION
The ALD4701 is a quad monolithic CMOS micropower high slew rate
operational amplifier intended for a broad range of analog applications
using
±1V
to
±6V
dual power supply systems, as well as +2V to +12V
battery operated systems. All device characteristics are specified for +5V
single supply or
±2.5V
dual supply systems. Total supply current for all four
operational amplifiers is 1mA maximum at 5V supply voltage. It is
manufactured with Advanced Linear Devices' enhanced ACMOS silicon
gate CMOS process.
The ALD4701 is designed to offer a trade-off of performance parameters
providing a wide range of desired specifications. It offers the popular
industry standard pin configuration of LM324 types and ICL 7641 types.
The ALD4701 has been developed specifically for the +5V single supply or
±1V
to
±6V
dual supply user. Several important characteristics of the
device make application easier to implement at these voltages.
First, each operational amplifier can operate with rail to rail input and output
voltages. This means the signal input voltage and output voltage can be
equal to or near to the positive and negative supply voltages. This feature
allows numerous analog serial stages and flexibility in input signal bias
levels. Secondly, each device was designed to accommodate mixed
applications where digital and analog circuits may operate off the same
power supply or battery. Thirdly, the output stage can typically drive up to
50pF capacitive and 10KΩ resistive loads.
These features, combined with extremely low input currents, high open
loop voltage gain of 100V/mV, useful bandwidth of 700KHz, a slew rate of
0.7V/µs, low power dissipation of 5mW, low offset voltage and temperature
drift, make the ALD4701 a versatile, micropower quad operational amplifier.
The ALD4701, designed and fabricated with silicon gate CMOS technology,
offers 1pA typical input bias current. Due to low voltage and low power
operation, reliability and operating characteristics, such as input bias
currents and warm up time, are greatly improved.
FEATURES
• All parameters specified for +5V single
supply or
±2.5V
dual supply systems
• Rail-to-rail input and output voltage ranges
• Unity gain stable
• Extremely low input bias currents -- 1.0pA
• High source impedance applications
• Dual power supply
±1.0V
to
±6.0V
• Single power supply +2V to +12V
• High voltage gain
• Output short circuit protected
• Unity gain bandwidth of 0.7MHz
• Slew rate of 0.7V/µs
• Low power dissipation
• Symmetrical output drive
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
Voltage follower/buffer/amplifier
Charge integrator
Photodiode amplifier
Data acquisition systems
High performance portable instruments
Signal conditioning circuits
Sensor and transducer amplifiers
Low leakage amplifiers
Active filters
Sample/Hold amplifier
Picoammeter
Current to voltage converter
PIN CONFIGURATION
OUT
A
IN -
A
1
14
OUT
D
IN -
D
IN +
D
V-
IN +
C
IN -
C
OUT
C
2
13
ORDERING INFORMATION
Operating Temperature Range*
-55°C to +125°C
0°C to +70°C
0°C to +70°C
14-Pin
CERDIP
Package
ALD4701A DB
ALD4701B DB
ALD4701 DB
14-Pin
Small Outline
Package (SOIC)
ALD4701A SB
ALD4701B SB
ALD4701 SB
14-Pin
Plastic Dip
Package
ALD4701A PB
ALD4701B PB
ALD4701 PB
IN +
A
V+
IN +
B
IN -
B
OUT
B
3
4
12
11
5
10
6
9
7
8
DB, PB, SB PACKAGE
* Contact factory for industrial temperature range
© 1998 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
ABSOLUTE MAXIMUM RATINGS
Supply voltage, V+
Differential input voltage range
Power dissipation
Operating temperature range PB,SB package
DB package
Storage temperature range
Lead temperature, 10 seconds
13.2V
+ +0.3V
-0.3V to V
600 mW
0°C to +70°C
-55°C to +125°C
-65°C to +150°C
+260°C
OPERATING ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C V
+
= 5.0V ( V
S
=
±
2.5V in dual supply operation ) unless otherwise specified
Parameter
Supply
Voltage
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Input Voltage
Range
Input
Resistance
Input Offset
Voltage Drift
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Symbol
V
S
V
+
V
OS
I
OS
I
B
V
IR
R
IN
TCV
OS
PSRR
65
65
65
65
-0.3
-2.8
10
12
1.0
1.0
Min
±1.0
2.0
4701A
Typ
Max
±6.0
12.0
2.0
2.8
25
240
30
300
5.3
2.8
-0.3
-2.8
10
12
1.0
1.0
Min
±1.0
2.0
4701B
Typ Max
Min
4701
Typ
Max
±6.0
12.0
10.0
11.0
1.0
1.0
-0.3
-2.8
10
12
25
240
30
300
5.3
2.8
Unit
V
V
mV
mV
pA
pA
pA
pA
V
V
Ω
µV/°C
dB
dB
dB
dB
R
S
≤
100KΩ
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
R
L
= 100KΩ
R
L
≥
1MΩ
R
L
= 100KΩ
0°C
≤
T
A
≤
+70°C
R
L
= 1MΩ V
+
= 5V
0°C
≤
T
A
≤
+70°C
R
L
= 100KΩ V
S
=
±2.5V
0°C
≤
T
A
≤
+70°C
Test
Conditions
Dual Supply
Single Supply
R
S
≤
100KΩ
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
T
A
= 25°C
0°C
≤
T
A
≤
+70°C
V
+
= +5V
V
S
=
±2.5V
±6.0 ±1.0
12.0 2.0
5.0
5.8
25
240
30
300
5.3
2.8
5
80
80
83
83
65
65
65
65
5
80
80
83
83
60
60
60
60
7
80
80
83
83
CMRR
Large Signal
Voltage Gain
A
V
15
10
100
300
15
10
100
300
10
7
80
300
V/mV
V/mV
V/mV
Output
Voltage
Range
V
O
low
V
O
high
V
O
low
V
O
high
4.99
0.001
4.999
0.01
0.001
4.99 4.999
0.01
0.001
4.99 4.999
-2.48
2.48
1
0.01
V
V
V
V
mA
2.40
-2.48 -2.40
2.48
1
2.40
-2.48 -2.40
2.48
2.40
1
-2.40
Output Short
Circuit Current
Supply
Current
Power
Dissipation
I
SC
I
S
480 1000
480 1000
480
1000
µA
V
IN
= 0V
No Load
All amplifiers
V
S
=
±2.5V
P
D
5.0
5.0
5.0
mW
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
2
OPERATING ELECTRICAL CHARACTERISTICS (cont'd)
T
A
= 25
°
C V
S
=
±
2.5V unless otherwise specified
Parameter
Input
Capacitance
Bandwidth
Slew Rate
Symbol
C
IN
4701A
Min
Typ
1
Max
4701B
Min Typ
1
Max
Min
4701
Typ
1
Max
Unit
pF
Test
Conditions
B
W
S
R
t
r
700
0.7
700
0.7
700
0.7
KHz
V/µs
µs
%
µs
A
V
= +1
R
L
= 100KΩ
R
L
= 100KΩ
R
L
= 100KΩ
C
L
= 50pF
0.1% A
V
= -1
C
L
= 50pF R
L
= 100KΩ
A
V
= 100
Rise time
Overshoot
Factor
Settling
Time
Channel
Separation
0.2
20
0.2
20
10.0
0.2
20
10.0
t
s
10.0
C
S
120
120
120
dB
T
A
= 25
°
C V
S
=
±
5.0V unless otherwise specified
4701A
Parameter
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Range
Bandwidth
Slew Rate
Symbol
PSRR
Min
Typ
83
Max
Min
4701B
Typ
83
Max
Min
4701
Typ
83
Max
Unit
dB
Test
Conditions
R
S
≤
100KΩ
CMRR
83
83
83
dB
R
S
≤
100KΩ
A
V
V
O
low
V
O
high
B
W
S
R
4.90
250
-4.98
4.98
1.0
1.0
-4.90
4.90
250
-4.98 -4.90
4.98
1.0
1.0
4.90
250
-4.98
4.98
1.0
1.0
-4.90
V/mV
V
V
MHz
V/µs
R
L
= 100KΩ
R
L
= 100KΩ
A
V
= +1
C
L
= 50pF
V
S
=
±
2.5V -55
°
C
≤
T
A
≤
+125
°
C unless otherwise specified
Parameter
Input Offset
Voltage
Input Offset
Current
Input Bias
Current
Power Supply
Rejection Ratio
Common Mode
Rejection Ratio
Large Signal
Voltage Gain
Output Voltage
Range
Symbol
V
OS
I
OS
I
B
PSRR
CMRR
A
V
V
O
low
V
O
high
60
60
10
75
83
50
-2.47
2.45
-2.40
2.35
4701A DB
Min
Typ Max
3.0
4701B DB
Min Typ Max
6.0
Min
4701 DB
Typ
Max
15.0
Unit
mV
Test
Conditions
R
S
≤
100KΩ
8.0
10.0
60
60
10
75
83
50
-2.47
2.45
8.0
10.0
60
60
7
-2.40
2.35
75
83
50
-2.47
2.45
8.0
10.0
nA
nA
dB
dB
V/mV
R
S
≤
100KΩ
R
S
≤
100KΩ
R
L
= 100KΩ
-2.40
2.35
V
V
R
L
= 100KΩ
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
3
Design & Operating Notes:
1. The ALD4701 CMOS operational amplifier uses a 3 gain stage
architecture and an improved frequency compensation scheme to
achieve large voltage gain, high output driving capability, and better
frequency stability. In a conventional CMOS operational amplifier
design, compensation is achieved with a pole splitting capacitor
together with a nulling resistor. This method is, however, very bias
dependent and thus cannot accommodate the large range of supply
voltage operation as is required from a stand alone CMOS operational
amplifier. The ALD4701 is internally compensated for unity gain
stability using a novel scheme that does not use a nulling resistor. This
scheme produces a clean single pole roll off in the gain characteristics
while providing for more than 70 degrees of phase margin at the unity
gain frequency.
2. The ALD4701 has complementary p-channel and n-channel input
differential stages connected in parallel to accomplish rail-to-rail input
common mode voltage range. This means that with the ranges of
common mode input voltage close to the power supplies, one of the
two differential stages is switched off internally. To maintain compat-
ibility with other operational amplifiers, this switching point has been
selected to be about 1.5V below the positive supply voltage. Since
offset voltage trimming on the ALD4701 is made when the input
voltage is symmetrical to the supply voltages, this internal switching
does not affect a large variety of applications such as an inverting
amplifier or non-inverting amplifier with a gain larger than 2.5 (5V
operation), where the common mode voltage does not make excur-
sions above this switching point. The user should however, be aware
that this switching does take place if the operational amplifier is
connected as a unity gain buffer and should make provision in his
design to allow for input offset voltage variations.
3. The input bias and offset currents are essentially input protection
diode reverse bias leakage currents, and are typically less than 1pA
at room temperature. This low input bias current assures that the
analog signal from the source will not be distorted by input bias
currents. Normally, this extremely high input impedance of greater
than 10
12
Ω
would not be a problem as the source impedance would
limit the node impedance. However, for applications where source
impedance is very high, it may be necessary to limit noise and hum
pickup through proper shielding.
4. The output stage consists of class AB complementary output drivers,
capable of driving a low resistance load. The output voltage swing is
limited by the drain to source on-resistance of the output transistors as
determined by the bias circuitry, and the value of the load resistor.
When connected in the voltage follower configuration, the oscillation
resistant feature, combined with the rail to rail input and output feature,
makes an effective analog signal buffer for medium to high source
impedance sensors, transducers, and other circuit networks.
5. The ALD4701 operational amplifier has been designed to provide full
static discharge protection. Internally, the design has been carefully
implemented to minimize latch up. However, care must be exercised
when handling the device to avoid strong static fields that may
degrade a diode junction, causing increased input leakage currents.
In using the operational amplifier, the user is advised to power up the
circuit before, or simultaneously with, any input voltages applied and
to limit input voltages not to exceed 0.3V of the power supply voltage
levels.
6. The ALD4701, with its micropower operation, offers numerous ben-
efits in reduced power supply requirements, less noise coupling and
current spikes, less thermally induced drift, better overall reliability due
to lower self heating, and lower input bias current. It requires
practically no warm up time as the chip junction heats up to only 0.4°C
above ambient temperature under most operating conditions.
TYPICAL PERFORMANCE CHARACTERISTICS
SUPPLY CURRENT AS A FUNCTION
OF SUPPLY VOLTAGE
1000
INPUTS GROUNDED
OUTPUT UNLOADED
T
A
= -55°C
1200
800
+70°C
400
0
0
±1
±2
±3
±4
±5
±6
SUPPLY VOLTAGE (V)
+125°C
+25°C
-25°C
OPEN LOOP VOLTAGE GAIN AS A
FUNCTION OF LOAD RESISTANCE
SUPPLY CURRENT (µA)
OPEN LOOP VOLTAGE
GAIN (V/mV)
1600
100
10
V
S
=
±2.5V
T
A
= 25°C
1
10K
100K
1M
10M
LOAD RESISTANCE (Ω)
COMMON MODE INPUT VOLTAGE RANGE
AS A FUNCTION OF SUPPLY VOLTAGE
±7
±6
T
A
= 25°C
INPUT BIAS CURRENT AS A FUNCTION
OF AMBIENT TEMPERATURE
10000
INPUT BIAS CURRENT (pA)
COMMON MODE INPUT
VOLTAGE RANGE (V)
1000
100
V
S
=
±2.5V
±5
±4
±3
±2
±1
0
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
10
1.0
0.1
-50
-25
0
25
50
75
100
125
AMBIENT TEMPERATURE (°C)
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
4
TYPICAL PERFORMANCE CHARACTERISTICS
OPEN LOOP VOLTAGE GAIN AS A FUNCTION
OF SUPPLY VOLTAGE AND TEMPERATURE
OUTPUT VOLTAGE SWING (V)
1000
OUTPUT VOLTAGE SWING AS A FUNCTION
OF SUPPLY VOLTAGE
±6
±5
±4
±3
±2
±1
-55°C
≤
T
A
≤
+125°C
R
L
= 100KΩ
OPEN LOOP VOLTAGE
GAIN (V/mV)
100
10
-55°C
≤
T
A
≤
+125°C
R
L
= 100KΩ
1
0
±2
±4
SUPPLY VOLTAGE (V)
±6
±8
0
±1
±2
±3
±4
±5
±6
±7
SUPPLY VOLTAGE (V)
INPUT OFFSET VOLTAGE AS A FUNCTION
OF AMBIENT TEMPERATURE
REPRESENTATIVE UNITS
INPUT OFFSET VOLTAGE (mV)
+5
+4
+3
+2
+1
0
-1
-2
-3
-4
-5
-50
-25
0
+25
+50
+75
+100 +125
AMBIENT TEMPERATURE (°C)
OPEN LOOP VOLTAGE GAIN
AS A FUNCTION OF FREQUENCY
120
100
80
60
40
20
0
-20
1
10
100
1K
10K 100K
FREQUENCY (Hz)
1M
0
45
90
135
180
10M
V
S
=
±2.5V
T
A
= 25°C
OPEN LOOP VOLTAGE
GAIN (dB)
V
S
=
±2.5V
PHASE SHIFT IN DEGREES
INPUT OFFSET VOLTAGE AS A FUNCTION
OF COMMON MODE INPUT VOLTAGE
INPUT OFFSET VOLTAGE (mV)
LARGE - SIGNAL TRANSIENT
RESPONSE
2V/div
V
S
=
±1.0V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 50pF
15
10
5
0
-5
-10
500mV/div
5µs/div
V
S
=
±2.5V
T
A
= 25°C
-15
-2
-1
0
+1
+2
+3
COMMON MODE INPUT VOLTAGE (V)
LARGE - SIGNAL TRANSIENT
RESPONSE
5V/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 50pF
SMALL - SIGNAL TRANSIENT
RESPONSE
100mV/div
V
S
=
±2.5V
T
A
= 25°C
R
L
= 100KΩ
C
L
= 50pF
2V/div
5µs/div
20mV/div
2µs/div
ALD4701A/ALD4701B
ALD4701
Advanced Linear Devices
5
PCB设计
