Am186ER/Am188ER
AMD continues 16-bit innovation
Systems in Silicon
386-Class Performance, Enhanced System
Integration,
and
Built-in SRAM
AMD Embedded Processor Division, Am186ER Technical Overview
Am186ER and Am188ER
Systems in Silicon
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AMD Embedded Processor Division, Am186ER Technical Overview
Am186 System Evolution
Systems in Silicon
80C186 Based
3.37 MIP System
Am186EM Based
5.35 MIP System
Am186ER Based
6.6 MIP System
CPU
Internal
Basic
System
Logic
Advanced
System
Logic
CPU
Basic
System
Logic
Advanced
System
Logic
CPU
Basic
System
Logic
Advanced
System
Logic
External
External
RAM
FLASH
RAM
FLASH
RAM
FLASH
AMD Embedded Processor Division, Am186ER Technical Overview
Typical 80C186 Design
Systems in Silicon
+5V
Buffered clocks
÷ 2 Input
Frequency
Oscillator
+5V
X1
Interrupt input
expansion
Int 0
-PCS1
-PCS2
-PCS3
-PCS4
-PCS5
Chip selects for peripheral s with 256 registers
80C186
-WR
Control/Status
ALE
Byte Write Enables
Parallel
-BHE
Address
Latch
CLK
Address
I/O
A0
D Q
-WE
Flash/
16
SRAM
Serial
Port
Address/Data
32 PIOs
32
Mux’ed A/D
EPROM
Latch
Application
Specific
q
Potential system cost savings
I/O
AMD Embedded Processor Division, Am186ER Technical Overview
Typical 80C186EM Design
(Glueless System Bus)
Systems in Silicon
1X or ÷ 2 Input Frequency Crystal
CLKOUTA
X1
X2
CLKOUTB
-PCS1
-PCS2
Buffered clocks
Chip selects for peripherals with 256 registers
Interrupt input
expansion
Int 0
Int 4
-PCS3
Am186EM
ALE
Control/Status
Address
Flash/
EPROM
Application
SRAM
Specific
I/O
Address/Data
Serial Port
TXD
RXD
Paralllel I/O*
PIO(0:31)
q
New or Enhanced Features
*16 bit reset configuration latch and up to
32 general purpose programmable I/Os
AMD Embedded Processor Division, Am186ER Technical Overview