AMIS-42665
High-Speed Low Power
CAN Transceiver
Description
The AMIS−42665 CAN transceiver is the interface between a
controller area network (CAN) protocol controller and the physical
bus and may be used in both 12 V and 24 V systems. The transceiver
provides differential transmit capability to the bus and differential
receive capability to the CAN controller.
Due to the wide common−mode voltage range of the receiver inputs,
the AMIS−42665 is able to reach outstanding levels of
electromagnetic susceptibility (EMS). Similarly, extremely low
electromagnetic emission (EME) is achieved by the excellent
matching of the output signals.
The AMIS−42665 is a new addition to the CAN high−speed
transceiver family and offers the following additional features:
Features
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MARKING
DIAGRAM
8
8
1
XXXXX
A
L
Y
W
G
SOIC−8
CASE 751
1
XXXXX
ALYW
G
•
Wake−up (WU) Over Bus
•
Voltage Source via V
SPLIT
Pin for Stabilizing the Recessive Bus
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
Level (Further EMC Improvement)
Ideal Passive Behavior when Supply Voltage is Removed
Extremely Low Current Standby Mode
Compatible with the ISO 11898 Standard (ISO 11898−2, ISO
11898−5 and SAE J2284)
High Speed (up to 1 Mbps)
Ideally Suited for 12 V and 24 V Industrial and Automotive
Applications
Extremely Low Current Standby Mode with Wake−up via the Bus
Low EME Common−Mode Choke is No Longer Required
Differential Receiver with Wide Common−Mode Range ($35 V) for
High EMS
Transmit Data (TxD) Dominant Time−out Function
Thermal Protection
Bus Pins Protected against Transients in an Automotive Environment
Power Down Mode in which the Transmitter is Disabled
Bus and V
SPLIT
Pins Short Circuit Proof to Supply Voltage and
Ground
Logic Level Inputs Compatible with 3.3 V Devices
These are Pb−Free Devices
PIN ASSIGNMENT
TxD
GND
V
CC
RxD
1
2
3
4
8
7
6
5
STB
CANH
CANL
V
SPLIT
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
AMIS−
42665
PC20040829.1
©
Semiconductor Components Industries, LLC, 2013
January, 2013
−
Rev. 10
1
Publication Order Number:
AMIS−42665/D
AMIS−42665
Table 1. TECHNICAL CHARACTERISTICS
Symbol
V
CC
V
STB
V
TxD
V
RxD
V
CANH
V
CANL
V
SPLIT
V
O(dif)(bus_dom)
CM−range
V
CM−peak
C
load
t
pd(rec−dom)
t
pd(dom−rec)
T
J
Parameter
Power Supply Voltage
DC Voltage at Pin STB
DC Voltage at Pin TxD
DC Voltage at Pin RxD
DC Voltage at Pin CANH
DC Voltage at Pin CANL
DC Voltage at Pin V
SPLIT
Differential Bus Output Voltage in
Dominant State
Input Common−Mode Range for
Comparator
Common−Mode Peak
Load Capacitance on IC Outputs
Propagation Delay TxD to RxD
Propagation Delay TxD to RxD
Junction Temperature
VCC
3
VCC
AMIS−42665
POR
7
1
TxD
VCC
Timer
Thermal
Shutdown
VCC
VSPLIT
5
VSPLIT
CANH
Conditions
Min
4.75
−0.3
−0.3
−0.3
Max
5.25
V
CC
V
CC
V
CC
+35
+35
+35
3
+35
500
10
Unit
V
V
V
V
V
V
V
V
V
mV
pF
ns
ns
°C
0 < V
CC
< 5.25 V; No Time Limit
0 < V
CC
< 5.25 V; No Time Limit
0 < V
CC
< 5.25 V; No Time Limit
42.5
W
< R
LT
< 60
W
Guaranteed Differential Receiver Threshold
and Leakage Current
See Figures 11 and 12
−35
−35
−35
1.5
−35
−500
See Figure 7
See Figure 7
90
90
−40
230
245
150
8
STB
Mode &
Wake−up
Control
Driver
Control
6
CANL
4
RxD
Wake−up
Filter
+
COMP
−
+
COMP
−
GND
2
Figure 1. Block Diagram
PC20050211.1
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2
AMIS−42665
TYPICAL APPLICATION
VBAT
IN
5V−reg
OUT
VCC
STB
8
3
7
CANH
VCC
R
LT
= 60
W
CAN
Controller
RxD
4
AMIS−
42665
VSPLIT
5
C
LT
= 47 nF
CAN
BUS
TxD
1
2
GND
PC20040829.3
GND
6
CANL
R
Figure 2. Application Diagram
Table 2. PIN LIST AND DESCRIPTIONS
Pin
1
2
3
4
5
6
7
8
Name
TxD
GND
V
CC
RxD
V
SPLIT
CANL
CANH
STB
Description
Transmit Data Input; Low Input
→
Dominant Driver; Internal Pullup Current
Ground
Supply Voltage
Receive Data Output; Dominant transmitter
→
Low Output
Common−Mode Stabilization Output
Low−Level CAN Bus Line (Low in Dominant Mode)
High−Level CAN Bus Line (High in Dominant Mode)
Standby Mode Control Input
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AMIS−42665
Table 3. ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
CANH
V
CANL
V
SPLIT
V
TxD
V
RxD
V
STB
V
tran(CANH)
V
tran(CANL)
V
tran(VSPLIT)
V
esd(CANL/
CANH/VSPLIT)
Parameter
Supply Voltage
DC Voltage at Pin CANH
DC Voltage at Pin CANL
DC Voltage at Pin V
SPLIT
DC Voltage at Pin TxD
DC Voltage at Pin RxD
DC Voltage at Pin STB
Transient Voltage at Pin CANH
Transient voltage at Pin CANL
Transient Voltage at Pin V
SPLIT
Electrostatic Discharge Voltage at CANH and
CANL Pin
Electrostatic Discharge Voltage at All Other Pins
Static Latch−up at all Pins
Storage Temperature
Ambient Temperature
Maximum Junction Temperature
Note 1
Note 1
Note 1
Note 2
Note 4
Note 2
Note 4
Note 3
Conditions
Min.
−0.3
Max.
+7
+50
+50
+50
V
CC
+ 0.3
V
CC
+ 0.3
V
CC
+ 0.3
+300
+300
+300
+8
+500
+5
+500
120
Unit
V
V
V
V
V
V
V
V
V
V
kV
V
kV
V
mA
°C
°C
°C
0 < V
CC
< 5.25 V; No Time Limit
0 < V
CC
< 5.25 V; No Time Limit
0 < V
CC
< 5.25 V; No Time Limit
−50
−50
−50
−0.3
−0.3
−0.3
−300
−300
−300
−8
−500
−5
−500
V
esd
Latch−up
T
stg
T
amb
T
J
−55
−40
−40
+150
+125
+170
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Applied transient waveforms in accordance with ISO 7637 part 3, test pulses 1, 2, 3a, and 3b (see Figure 5).
2. Standardized human body model electrostatic discharge (ESD) pulses in accordance to MIL883 method 3015.7.
3. Static latch−up immunity: Static latch−up protection level when tested according to EIA/JESD78.
4. Standardized charged device model ESD pulses when tested according to EOS/ESD DS5.3−1993.
Table 4. THERMAL CHARACTERISTICS
Symbol
R
th(vj−a)
R
th(vj−s)
Parameter
Thermal Resistance from Junction−to−Ambient in SOIC−8 Package
Thermal Resistance from Junction−to−Substrate of Bare Die
Conditions
In free air
In free air
Value
145
45
Unit
K/W
K/W
FUNCTIONAL DESCRIPTION
AMIS−42665 provides two modes of operation as illustrated in Table 5. These modes are selectable through pin STB.
Table 5. OPERATING MODES
Pin RXD
Mode
Normal
Standby
Pin STB
Low
High
Low
Bus Dominant
Wake−up Request Detected
High
Bus Recessive
No Wake−up Request Detected
Normal Mode
Standby Mode
In the normal mode, the transceiver is able to
communicate via the bus lines. The signals are transmitted
and received to the CAN controller via the pins TxD and
RxD. The slopes on the bus lines outputs are optimized to
give extremely low EME.
In standby mode both the transmitter and receiver are
disabled and a very low−power differential receiver
monitors the bus lines for CAN bus activity. The bus lines
are terminated to ground and supply current is reduced to a
minimum, typically 10
mA.
When a wake−up request is
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4
AMIS−42665
detected by the low−power differential receiver, the signal
is first filtered and then verified as a valid wake signal after
a time period of t
dbus
, the RxD pin is driven low by the
transceiver to inform the controller of the wake−up request.
Split Circuit
Overtemperature Detection
The V
SPLIT
Pin is operational only in normal mode. In
standby mode this pin is floating. The V
SPLIT
is connected
as shown in Figure 2 and its purpose is to provide a stabilized
DC voltage of 0.5 x V
CC
to the bus avoiding possible steps
in the common−mode signal therefore reducing EME. These
unwanted steps could be caused by an unpowered node on
the network with excessive leakage current from the bus that
shifts the recessive voltage from its nominal 0.5 x V
CC
voltage.
Wake−up
A thermal protection circuit protects the IC from damage
by switching off the transmitter if the junction temperature
exceeds a value of approximately 160°C. Because the
transmitter dissipates most of the power, the power
dissipation and temperature of the IC are reduced. All other
IC functions continue to operate. The transmitter off−state
resets when Pin TxD goes high. The thermal protection
circuit is particularly needed when a bus line short circuits.
TxD Dominant Time−out Function
When a valid wake−up (dominant state longer than t
dbus
)
is received during the standby mode the RxD pin is driven
low. Wake−up behavior in case of a permanent dominant –
due to, for example, a bus short – represents the only
difference between the circuit sub−versions listed in the
Ordering Information table. It is depicted in Figures 3 and 4.
When the standby mode is entered while a dominant is
present on the bus, the “unconditioned bus wake−up”
versions will signal a bus−wakeup immediately after the
state transition (seen as a High−level glitch on RxD). The
other version (differing purely by a metal−level
modification in the digital part) will signal bus−wakeup only
after the initial dominant is released. In this way it’s ensured,
that a CAN bus can be put to a low−power mode even if the
nodes have a level sensitivity to RxD pin and a permanent
dominant is present on the bus.
A TxD dominant time−out timer circuit prevents the bus
lines being driven to a permanent dominant state (blocking
all network communication) if Pin TxD is forced
permanently low by a hardware and/or software application
failure. The timer is triggered by a negative edge on pin TxD.
If the duration of the low−level on Pin TxD exceeds the
internal timer value t
dom(TxD)
, the transmitter is disabled,
driving the bus into a recessive state. The timer is reset by a
positive edge on Pin TxD. See Figure 10.
This TxD dominant time−out time (t
dom(TxD)
) defines the
minimum possible bit rate to 40 kbps.
Fail Safe Features
A current−limiting circuit protects the transmitter output
stage from damage caused by accidental short circuit to
either positive or negative supply voltage, although power
dissipation increases during this fault condition.
The pins CANH and CANL are protected from
automotive electrical transients (according to ISO 7637; see
Figure 5). Pins TxD and STB are pulled high internally
should the input become disconnected. Pins TxD, STB and
RxD will be floating, preventing reverse supply should the
V
CC
supply be removed.
t
dbus
t
dbus
CANH
CANL
STB
RxD
unconditioned WU
Normal
Standby*
time
*Even if bus dominant signals longer than tdbus are echoed on RxD, the transceiver
stays in standby mode until STB is released.
Figure 3. AMIS42665TJAA1/3 Wake−up Behavior
CANH
CANL
t
dbus
STB
RxD
Normal
Standby*
time
*On this derivative, bus dominant signals longer than t
dbus
are echoed on RxD after the bus passed through
a recessive time following the trigger of STB. The transceiver stays in standby mode until STB is released.
Figure 4. AMIS42665TJAA6 Wake−up Behavior
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