Datasheet
AS1369
2 0 0 m A U l t r a - C o m pa c t L o w D r o p o u t R e g u l a t o r
1 General Description
The AS1369 is an ultra compact high-performance low-
dropout 200mA voltage regulator designed for use with
very-low ESR output capacitors. The device can deliver
superior performance in all specifications critical to
battery-powered designs, and is perfectly suited for
mobile phones, PDAs, MP3 players, and other battery
powered devices.
The AS1369 is working with small input and output
capacitor of only 0.47µF offering PSRR of 72dB typical
and a noise level of 30µV
RMS
.
Typical quiescent current is around 25µA while in
shutdown the AS1369 requires less than 0.1µA
quiescent current.
Regulation performance is excellent even under low
dropout conditions, when the power transistor has to
operate in linear mode.
The AS1369 offers excellent low-noise performance
requiring no external bypass capacitance.
Multiple output voltage options between 1.2 and 5.0V in
100mV steps are available and the the minimum input
voltage is as low as 2.0V (depending on the output
voltage version), so the component can be used with the
coming new battery technologies.
The AS1369 is available in a 4-bump WL-CSP package.
2 Key Features
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Low Dropout Voltage: typ. 40mV @ 100mA
200mA High Maximum Load Current
2.0V to 5.5V Input Voltage
1.2V to 5.0V Output Voltage (in 100mV steps)
High Accuracy: ±2% Over Temperature
Thermal and Over Current Protection
25µA Quiescent Current
<0.1µA Standby Current
High PSRR: 72dB @ 1kHz
No Noise Bypass Capacitor Required
Low Noise: 30µV
RMS
Enable Pin
Package: 4-bump WL-CSP 0.5mm pitch
3 Applications
The device is ideal for mobile communication, battery
powered systems and any electronic equipment.
Figure 1. AS1369 - Block Diagram
V
IN
AS1369
V
OUT
C
IN
V
REF
_
+
C
OUT
A2
EN
B2
V
IN
B1
V
OUT
On/Off
Control
Thermal &
Over Current
Protection
A1
GND
EN
GND
(WLP; Top Through View)
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AS1369
Datasheet - P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
A2
EN
B2
V
IN
A1
GND
B1
V
OUT
AS1369
(WLP; Top Through View)
Pin Descriptions
Table 1. Pin Descriptions
Name
GND
WLP
A1
Ground
Logic-High Enable Input.
V
IH
≥
1.2V: V
OUT
is enabled.
V
IH
≤
0.4V: V
OUT
is disabled.
Note:
This pin is internally pulled down and must not float.
Regulated Output Voltage
Input Voltage
Description
EN
A2
V
OUT
V
IN
B1
B2
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AS1369
Datasheet - A b s o l u t e M a x i m u m R a t i n g s
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 2
may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in
Electrical Character-
istics on page 4
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 2. Absolute Maximum Ratings
Parameter
Input Supply Voltage
Shutdown Input Voltage
Output Voltage
I
OUT
Input/Output Voltage
Power Dissipation
1
Min
-0.3
-0.3
-0.3
Max
+7
+7
+7
Units
V
V
V
Comments
Short-circuit protected.
-0.3
+7
360
-40
-65
+125
+150
2
500
-100
+100
V
mW
ºC
ºC
kV
V
mA
HBM MIL-Std. 883E 3015.7
methods
CDM JESD22-C101C
methods
JEDEC 78
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/
JEDEC J-STD-020C “Moisture/Reflow Sensitivity
Classification for Non-Hermetic Solid State
Surface Mount Devices”.
The lead finish for Pb-free leaded packages is
matte tin (100% Sn).
Internally limited. Mounted on PCB.
2
Operating Junction Temperature
Storage Temperature Range
ESD
Latch-Up
Package Body Temperature
+260
ºC
1. The output PNP structure contains a diode between pins V
IN
and V
OUT
that is normally reverse-biased. revers-
ing the polarity of pins V
IN
and V
OUT
will activate this diode.
2. The maximum allowable power dissipation is a function of the maximum junction temperature (T
J(MAX
), the
junction-to-ambient thermal resistance (Θ
JA
), and the ambient temperature (T
AMB
). The maximum allowable
power dissipation at any ambient temperature is calculated as:
P
(MAX)
= (T
J(MAX)
- (T
AMB
))/
Θ
JA
Where:
The value of
Θ
JA
for the WLP package is 345°C/W.
Note:
Exceeding the maximum allowable dissipation will cause excessive device temperature and the
regulator will go into thermal shutdown.
(EQ 1)
The AS1369 uses an internal protective structure against light influence. However, exposing the WLP package to
direct light could cause device malfunction.
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AS1369
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
6 Electrical Characteristics
T
AMB
=
-40 to 85ºC
, V
IN
= V
OUT(NOM)
+ 0.5V, C
OUT
= C
IN
= 0.47µF, I
OUT
= 1mA, V
IH
= 1.2V (unless otherwise specified)
Table 3. Electrical Characteristics
Symbol
Parameter
Operational Voltage
Range
Input Undervoltage
Lockout
Accuracy
Condition
Min
2.0
1.8
Over full V
IN
, V
OUT
, T
AMB
=
25ºC
including line and load regulation
Over full V
IN
, V
OUT
and temperature
including line and load regulation
I
OUT
= 50mA
I
OUT
= 100mA
I
OUT
= 150mA
I
OUT
= 200mA
V
IN
= V
OUT(NOM)
+ 0.5V to 5.5V, V
OUT
≥
2.5V
V
IN
= V
OUT(NOM)
+ 0.5V to 5.5V, V
OUT
<
2.5V
I
OUT
= 5 to 100mA
I
OUT
= 5 to 200mA
I
OUT
= 5mA
Maximum output current
I
LOAD
= 0mA
I
LOAD
= 200mA
In Shutdown
210
25
35
5
30
I
out
= 10mA, f = 1kHz, V
OUT
= 1.5V
PSRR
I
out
= 10mA, f = 100kHz, V
OUT
= 1.5V
I
out
= 10mA, f = 1kHz, V
OUT
= 2.8V
I
out
= 10mA, f = 100kHz, V
OUT
= 2.8V
Load transient resp.
eN
I
EN
V
EN
I
IN(start)
I
SC
T
OFF
Output Noise Voltage
Enable Input Current
Enable Input Logic Low
Enable Input Logic High
Startup Peak Current
Short Circuit Current
Temperature Shutdown
1 to 150mA, T
rise
= T
fall
= 1µs,
C
out
= C
in
= 1µF, ESR load capacitor = 0
BW = 400Hz to 80kHz, C
OUT
= 1µF,
I
OUT
= 30mA
V
EN
= 0.4V, V
IN
= 5.5V
V
IN
= 2.0 to 5.5V, T
AMB
= -40 to 85ºC
I
OUT
= 0mA
V
OUT
= 0V
Temperature rising
Hysteresis
1.2
210
340
350
160
20
72
55
80
56
±65
30
±1
0.4
50
60
500
-0.7
-2
+0.7
%
+2
20
50
40
100
60
150
80
200
0.02
0.1
0.02
0.2
0.001 0.003
0.001 0.003
50
Typ
Max
5.5
Unit
V
V
V
DROP
Dropout Voltage
1
mV
Line Regulation
ΔV
OUT
Load Regulation
ΔV
OUT
/
ΔT
AMB
Output voltage/
temperature
Output current
Quiescent current
Standby current
Turn On Time
2
%/V
%/mA
ppm/
°C
mA
µA
µA
nA
µs
dB
dB
dB
dB
mV
µV
RMS
µA
V
mA
mA
ºC
I
Q
I
SHDN
t
ON
1. Dropout voltage is the input-to-output voltage difference at which the output voltage is 100mV below its nominal
value (does not apply to input voltages below 2.0V).
2. Turn on time is time measured between the enable input just exceeding the V
EN
high value and the output volt-
age just reaching 95% of its nominal value.
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AS1369
Datasheet - E l e c t r i c a l C h a r a c t e r i s t i c s
Figure 3. AC Line Regulation Input Voltage Test Signal
V
IN
=V
OUT(NOM)
+2V
10µs
600µs
10µs
600mV
620µs
Figure 4. SVR Input Voltage Test Signal
V
IN
500mV
V
OUT(NOM)
+ 1V
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