AS1504, AS1505
O c ta l 8 - B i t P r o g r a m m a b l e L o w - P o w e r D A C s w i t h
S h u td o w n a n d M i d - S c a l e R e s e t
D a ta S he e t
1 General Description
The AS1504/AS1505 are low-power (5µA @ 5V) individ-
ually programmable 8-channel, 8-bit resolution digital-to-
analog converters. All eight DACs share a common ref-
erence-voltage input making them ideal for applications
where adjustments start at a nominal voltage.
Table 1. Standard Products
Model
AS1504
AS1505
Functionality
Mid-Scale Reset Pin
Separate V
REFL
Range Settings
2 Key Features
!
!
!
!
!
!
!
!
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8 Individually-Controlled DACs
Replaces 8 Potentiometers
Standard 3-Wire Serial Interface
Single-Supply Operation: +3 to +5V
Mid-Scale Reset Pin (AS1504)
Separate V
REFL
Range Setting (AS1505)
Shutdown Mode:
≤25µW
(I
DD
and I
REF
)
Power-On Reset
16-pin SOIC-150 Package
The devices feature a low-power shutdown reference
input current (5µA) that enables the devices to maintain
individual DAC latch settings during shutdown until nor-
mal operation is resumed.
The devices are controlled via a standard 3-wire serial
interface. Data is shifted into the DACs via the internal
serial-to-parallel shift register.
The AS1504/AS1505 are available in a 16-pin SOIC-150
package.
3 Applications
The devices are ideal for video amplifier gain control,
video equipment voltage-controlled frequencies and
bandwidths, CRT display geometric corrections and
automatic adjustments, or any other space-limited DAC
application with low power-consumption requirements.
Figure 1. Block Diagram
V
REFH
V
REFH
DAC1 V
OUT
V
REFL
V
REFL
AS1505 Only
8-Bit
Latch
CK RSN
DAC 1
Select
8
Address
3
11-Bit
Serial Latch 8
D
CK
RSN
OUT1
8
V
DD
GND
SDI
CLK
CSN
8-Bit
Latch
CK RSN
AS1504/
AS1505
RSN
AS1504 Only
V
REFH
DAC8 V
OUT
V
REFL
8
OUT8
SHDNN
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Revision 1.0
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AS1504/AS1505
Data Sheet
- P i n o u t
4 Pinout
Pin Assignments
Figure 2. Pin Assignments (Top View)
V
REFH
OUT1
OUT2
OUT3
OUT4
SHDNN
CSN
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
RSN
OUT8
OUT7
OUT6
OUT5
SDI
CLK
V
REFH
OUT1
OUT2
OUT3
OUT4
SHDNN
CSN
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
DD
OUT8
OUT7
OUT6
OUT5
SDI
CLK
V
REFL
AS1504
AS1505
Pin Descriptions
Table 2. Pin Descriptions
Pin Number
Pin Name
CLK
CSN
GND
OUT1
OUT2
OUT3
OUT4
OUT5
(see Figure 2)
OUT6
OUT7
OUT8
RSN
SDI
SHDNN
V
DD
V
REFH
V
REFL
Description
Serial Clock Input.
Positive-edge triggered.
Chip Select.
When this active-low pin goes high, the serial input register data is
decoded based on the address bits and loaded into the target DAC register.
Ground
DAC 1 Output.
DAC 1 address = 000
2
.
DAC 2 Output.
DAC 1 address = 001
2
.
DAC 3 Output.
DAC 1 address = 010
2
.
DAC 4 Output.
DAC 1 address = 011
2
.
DAC 5 Output.
DAC 1 address = 100
2
.
DAC 6 Output.
DAC 1 address = 101
2
.
DAC 7 Output.
DAC 1 address = 110
2
.
DAC 8 Output.
DAC 1 address = 111
2
.
Reset
(AS1504 Only). Active-low asynchronous reset to mid-scale output setting.
Loads all DAC latches with 80
h
.
Serial Data Input
Shutdown.
Active-low reference input open-circuit. All DAC outputs open-circuit.
Note:
DAC latch settings are maintained during shutdown.
Positive Supply Voltage.
+3 to +5V.
Common High-Side DAC Reference Input
Common Low-Side DAC Reference Input
(AS1505 Only).
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Revision 1.0
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AS1504/AS1505
Data Sheet
- A b s o l u t e
Maximum Ratings
5 Absolute Maximum Ratings
Stresses beyond those listed in
Table 3
may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in
Electrical Character-
istics on page 4
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Table 3. Absolute Maximum Ratings
Parameter
V
DD
to GND
V
REFH
and V
REFH
to GND
OUTx to GND
Digital Input Voltage to GND
Package Power Dissipation
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature (T
J
Max)
Thermal Resistance (θ
JA
)
Electro-Static Discharge
-40
-65
+85
+150
+150
60
<1
ºC
ºC
ºC
ºC/W
kV
The reflow peak soldering temperature (body
temperature) specified is in compliance with
IPC/JEDEC J-STD-020C “Moisture/ Reflow
Sensitivity Classification for Non-Hermetic
Solid State Surface Mount Devices”.
Min
-0.3
0
0
0
Max
+7
V
DD
V
DD
V
DD
Units
V
V
V
V
T
J
Max - T
AMB
/θ
JA
Comments
Package Body Temperature
+260
ºC
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Revision 1.0
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AS1504/AS1505
Data Sheet
- E l e c t r i c a l
Characteristics
6 Electrical Characteristics
V
DD
= +3.0V ±10% or +5.0V ±10%, V
REFH
= V
DD
, V
REFL
= 0V, -40ºC
≤
T
AMB
≤
+85ºC (unless otherwise specified).
Table 4. Electrical Characteristics
Symbol
N
INL
DNL
G
FSE
V
ZSE
R
OUT
ΔR/R
OUT
Parameter
Resolution
Integral Non-Linearity Error
Differential Non-Linerarity
Full-Scale Error
Zero-Code Error
DAC Output Resistance
Output Resistance Match
High Voltage
2
Input Range
Low Voltage Input Range
3
(AS1505 Only)
Input Resistance
4
1
Conditions
Min
8
-0.75
Typ
Max
Unit
Bit
Static Accuracy
(specifications apply to all DACs)
±0.15 +0.75
±0.1
±0.2
±0.1
5
1
+0.5
+1
+0.5
8
LSB
LSB
LSB
LSB
kΩ
%
Guaranteed Monotonic
-0.5
-1
-0.5
3
Reference Input
V
REFH
V
REFL
R
IN
C
REFH
C
REFL
Digital Inputs
V
IH
V
IL
I
IL
C
IL
Logic High
Logic Low
Input Current
Input Capacitance
6
5
0
0
Digital Inputs = 55h, V
REFH
≈
V
DD
Digital Inputs = All 0s
Digital Inputs = All 1s
625
60
60
V
DD
V
DD
V
V
Ω
pF
pF
High Reference Input
5
Capacitance
Low Reference Input
5
Capacitance
V
DD
= +5V
V
DD
= +3V
V
DD
= +5V
V
DD
= +3V
V
IN
= 0 or +5V
2.4
2.1
0.8
0.6
±1
5
V
V
µA
pF
Power Supplies
V
DDRANGE
Power Supply Range
Supply Current
(CMOS)
Supply Current
(TTL)
Shutdown Current
Power Dissipation
Power Supply Rejection
Ratio
5
2.7
V
IH
= V
DD
or V
IL
= 0V
V
IH
= 2.4V or V
IL
= 0.8V, V
DD
= +5.5V
SHDNN = 0V
V
IH
= V
DD
or V
IL
= 0V, V
DD
= +5.5V
V
DD
= +5V ±10%, V
REFH
= +4.5V
V
DD
= +3V ±10%, V
REFH
= +2.7V
0.01
0.01
1
0.01
5.5
5
4
5
27.5
0.001 0.002
V
µA
mA
µA
µW
%/%
I
DD
I
REFH
P
DISS
PSRR
Dynamic Performance
t
S
CT
Positive or Negative V
OUT
Settling Time
Crosstalk
7
±0.5 LSB Error Band
0.5
90
µs
dB
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AS1504/AS1505
Data Sheet
- E l e c t r i c a l
Characteristics
Table 4. Electrical Characteristics (Continued)
Symbol
Parameter
5, 8
Conditions
Min
Typ
1
Max
Unit
Switching Characteristics
t
CH
t
CL
t
DS
t
DH
t
CSS
t
CSW
t
RS
t
CSH
t
CS1
Input Clock Pulse Width
Data Setup Time
Data Hold Time
CSN Setup Time
CSN High Pulse Width
Reset Pulse Width
CLK-Rise to CSN-Rise
Hold Time
CSN-Rise to Next Rising
Clock Time
High Clock Level
Low Clock Level
15
15
5
5
10
10
60
15
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
1. Typ values are average readings at +25ºC.
2. V
REFH
can be any value between V
DD
and GND.
3. V
REFL
can be any value between V
DD
and GND.
4. With all DACs set to code 0x55h. Typical input resistance per DAC is 5kOhm with code 0x55h.
5. Guaranteed by design; not subject to production test.
6. V
IN
= 0V or V
DD
(CMOS); DAC outputs unloaded. P
DISS
is calculated as I
DD
x V
DD
.
7. Measured at an OUTx pin where an adjacent OUTx pin is making a full-scale voltage change.
8. See
Figure 13 on page 9
for location of measured values. All input control voltages are specified with t
R
= t
F
=
2ns.
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