SRAM
AS8SLC128K32
128K x 32 SRAM
SRAM MEMORY ARRAY
AVAILABLE AS MILITARY
SPECIFICATIONS
• MIL-STD-883
PIN ASSIGNMENT
(Top View)
68 Lead CQFP (Q)
NC
A0
A1
A2
A3
A4
A5
CS3\
GND
CS4\
WE1\
A6
A7
A8
A9
A10
Vcc
FEATURES
•
•
•
•
•
•
Fast Access Times of 10 to 25ns
Overall Configuration: 128K x 32
4 Low Power CMOS 128K x 8 SRAMs in one MCM
+3.3V power supply
Internal Decoupling Capacitors
Low Operating Power, 1/2 Previous Generation
OPTIONS
•
Operating Temperature Ranges
Military (-55
o
C to +125
o
C)
Industrial (-40
o
C to +85
o
C)
•
Timing
10ns
12ns
15ns
17ns
20ns
25ns
• Package
Ceramic Quad Flatpack
Pin Grid Array
• Low Power Data Retention Mode
MARKINGS
XT
IT
-10
-12
-15
-17
-20
-25
CS
CS2\
Vcc
A11
A12
A13
A14
A15
A16
CS1\
OE\
CS2\
NC
WE2\
WE3\
WE4\
NC
NC
NC
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
9
8
7
6
5
4
3
2
1
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
66 Lead PGA (P)
\
CS
CS4\
\
\
NC
Q
P
L
\
NC
CS
CS1\
CS
CS3\
\
GENERAL DESCRIPTION
The AS8SLC128K32 is a high speed, 4MB CMOS SRAM
multichip module (MCM) designed for full temperature range, 3.3V
power supply, military, space, or high reliability mass memory and
fast cache applications.
The device input and output TTL compatible. Writing is executed
when the write enable (WE\) and chip enable (CS\) inputs are low.
Reading is accomplished when WE\ is high and CS\ and output enable
(OE\) are both low. Access time grades of 10ns, 12ns, 15ns, 17ns,
20ns and 25ns maximum are standard.
The products are designed for operation over the temperature
range of -55°C to +125°C and screened under the full military
environment.
FUNCTIONAL BLOCK DIAGRAM
For more products and information
please visit our web site at
www.micross.com
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
1
SRAM
AS8SLC128K32
ABSOLUTE MAXIMUM RATINGS*
Voltage of Vcc Supply Relative to Vss...........-0.5V to +4.6V
Storage Temperature.....................................-65°C to +150°C
Short Circuit Output Current(per I/O)............................20mA
Voltage on Any Pin Relative to Vss............-.5V to Vcc+4.6V
Maximum Junction Temperature**.............................+150°C
*Stresses greater than those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
**Junction temperature depends upon package type, cycle
time, loading, ambient temperature and airflow. See the Ap-
plication Information section at the end of this datasheet for
more
information.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55
o
C < T
A
< 125
o
C and -40
o
C to +85
o
C; Vcc = 3.3V ±0.3V)
DESCRIPTION
CONDITIONS
CS\<V
IL
; V
CC
= MAX
SYMBOL
-10
280
-12
240
MAX
-15
220
-17
180
-20
160
UNITS NOTES
High Speed
f = MAX = 1/ t
RC
(MIN)
Power Supply
Current: Operating Outputs Open, OE\ = V
IH
Low Power (L)
Low Speed
Power Supply
Current: Operating
CS\<V
IL
; V
CC
= MAX
f = 1 MHz, OE\ = V
IH
Low Power (L)
CS\>V
IH
; V
CC
= MAX
Power Supply
Current: Standby
f = MAX = 1/ t
RC
(MIN)
Outputs Open, OE\=V
IH
Low Power (L)
V
IN
= V
CC
- 0.2V, or V
SS
+0.2V
V
CC
=Max; f = 0Hz
Low Power (L)
AS8SLC128K32
Rev. 0.8 01/10
I
CC1
mA
2, 3,13
240
---
80
210
---
60
200
---
60
180
---
60
160
---
60
I
CC3
mA
2
I
SBT1
100
80
70
50
2
80
60
60
36
80
60
60
36
80
60
60
36
80
60
60
36
mA
3, 13
CMOS Standby
I
SBT2
mA
Micross Components reserves the right to change products or specifications without notice.
SRAM
AS8SLC128K32
CAPACITANCE
(V
IN
= 0V, f = 1MHz, T
A
= 25
o
C)*
SYMBOL
C
ADD
C
OE
C
WE,
C
CS
C
IO
PARAMETER
A0 - A16 Capacitance
OE\ Capacitance
WEx\ and CSx\ Capacitance
I/O 0- I/O 31 Capacitance
MAX
40
40
12
15
UNITS
pF
pF
pF
pF
NOTE:
*This parameter is sampled.
AC TEST CONDITIONS
TEST SPECIFICATIONS
Input pulse levels...........................................V
SS
to 3V
Input rise and fall times...........................................1ns/V
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..........................................See Figure 1, 2
3.3V
R
L
= 50Ω
Q
Z
O
= 50Ω
30 pF
V
L
= 1.5V
Q
333Ω
5 pF
319Ω
FIGURE 1
FIGURE 2
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
3
SRAM
AS8SLC128K32
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55
o
C<T
A
< 125
o
C and -40
o
C to +85
o
C; V
CC
= 3.3V ±0.3V)
DESCRIPTION
READ CYCLE
READ cycle time
Address access time
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
WRITE cycle time
Chip select to end of write
Address valid to end of write
Address setup time
Address hold from end of write
WRITE pulse width, CS\ controlled
WRITE pulse width, WE\ controlled
Data setup time
Data hold time
Write disable to output in Low-z
Write enable to output in High-Z
SYMBOL
RC
AA
t
ACS
t
OH
t
LZCS
t
HZCS
t
AOE
t
LZOE
t
HZOE
t
t
-10
MIN MAX
10
10
10
1
1
0
0
5.5
5.5
5.5
10
9
9
0
0
9
9
5
1
2
5
-12
MIN MAX
12
12
12
2
2
0
0
6
6
6
12
10
10
0
0
10
10
6
1
2
5
-15
MIN MAX
15
15
15
2
2
0
0
7
7
-17
MIN MAX
17
17
17
2
2
7.5
7.5
0
7.5
17
11
11
0
0
14
14
7.5
1
2
6.5
-20
UNITS NOTES
MIN MAX
20
20
20
2
2
0
0
8
8
8
20
12
12
0
0
15
15
8
1
2
7
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
4,6,7
4,6,7
4,6
4,6
7
15
10
10
0
0
12
12
7
1
2
6
WC
CW
t
AW
t
AS
t
AH
t
WP1
t
WP2
t
DS
t
DH
t
LZWE
t
HZWE
t
t
4,6,7
4,6,7
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
4
SRAM
AS8SLC128K32
LOW POWER CHARACTERISTICS (L Version Only)
LOW V
CC
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
CC
4.5V
V
DR
> 2V
t
4.5V
CDR
t
R
CS\ 1-4
V
DR
NOTES
1. All voltages referenced to V
SS
(GND).
2. Worst case address switching.
3. I
CC
is dependent on output loading and cycle rates.
unloaded, and f=
1
t RC(MIN) H
Z.
7. At any given temperature and voltage condition,
t
HZCS
, is less than t
LZCS
, and t
HZWE
is less than t
LZWE
.
8. WE\ is HIGH for READ cycle.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
10. Address valid prior to or coincident with latest occur-
ring chip enable.
11. t
RC
= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate
and terminate a WRITE cycle.
13. I
CC
is for full 32 bit mode.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 & 2 unless otherwise noted.
6. t
HZCS
, t
HZOE
and t
HZWE
are specified with C
L
= 5pF as in
Fig. 2. Transition is measured +/- 200 mV typical from
steady state voltage, allowing for actual tester RC time
constant.
AS8SLC128K32
Rev. 0.8 01/10
Micross Components reserves the right to change products or specifications without notice.
5
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