ASM1233D, ASM1233D-L,
ASM1233M
Low Power, 5 V/3.3 V,
mP
Reset, Active LOW,
Open-Drain Output
Description
http://onsemi.com
ASM1233M
The ASM1233D−L/1233D/1233M are voltage supervisors with
low−power, 5/3.3 V
mP
Reset, with an active LOW, open−drain output.
Maximum supply current over temperature is 15
mA
for 3.3 V devices
and 20
mA
for 5 V devices.
The ASM1233D−L/1233D/1233M generates an active LOW reset
signal whenever the monitored supply is out of tolerance. A precision
reference and comparator circuit monitors power supply (V
CC
) level.
The tolerances are 5%, 10% and 15%. When an out−of−tolerance
condition is detected, an internal power−fail signal is generated which
forces an active LOW reset signal. After V
CC
returns to an
in−tolerance condition, the reset signal remains active for 350 ms to
allow the power supply and system microprocessor to stabilize.
The ASM1233D−L/1233D/1233M is designed with an open drain
output stage and operates over the extended industrial temperature
range. These devices are available in compact SOT−223, SO−8 and
TO−92 packages.
Other low power products in this family include ASM1810/11/12/
15/16/17.
Features
SOIC−8
8 LEAD
CASE 751BD
SOT−223
4 LEAD
CASE 318E
TO−92
3 LEAD
CASE 29−11
PIN CONFIGURATIONS
1
RESET
V
CC
NC
GND
2
3
4
8
7
6
5
NC
NC
NC
NC
RESET
GND
V
CC
4
3
ASM1233D−L
ASM1233D
•
•
•
•
•
•
Low Supply Current
15
mA
Maximum (≤ 3.6 V), 20
mA
Maximum (5.5 V)
Automatically Restarts a Microprocessor after Power Failure
350 ms Reset Delay after V
CC
Returns to an In−tolerance Condition
Active LOW Power−up Reset, 5 kW Internal Pull−up
Precision Temperature−compensated Voltage Reference and
Comparator
•
Eliminates External Components
•
Low−cost SOT−223/SO−8/TO−92 Packages
•
Operating Temperature:
−40°C
to +85°C
Applications
SO−8
(Top View)
2
1
GND
SOT−223
(Top View)
1 2 3
GND
RESET
V
CC
1 2 3
1 2 3
RESET
V
CC
GND
TO−92
ASM1233M
•
•
•
•
•
•
•
Set−top Boxes
Cellular Phones
PDAs
Energy Management Systems
Embedded Control Systems
Printers
Single Board Computers
(Top View)
TO−92
ASM1233D−L
ASM1233D
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
©
Semiconductor Components Industries, LLC, 2011
August, 2011
−
Rev. 3
1
Publication Order Number:
ASM1233D/D
ASM1233D, ASM1233D−L, ASM1233M
Figure 1. Typical Operating Circuit
Figure 2. Block Diagram
http://onsemi.com
2
ASM1233D, ASM1233D−L, ASM1233M
Table 1. PIN DESCRIPTION
Pin #
TO−92
ASM1233D−L
ASM1233D
1
2
3
TO−92
ASM1233M
3
1
2
SO−8
4
1
2
3, 5, 6, 7 & 8
SOT−223
1,4
2
3
Pin Name
GND
RESET
V
CC
NC
Description
Ground.
Active LOW reset output.
Power supply input.
No connection.
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on V
CC
(Note 1)
Voltage on RESET (Note 1)
Operating Temperature Range
Soldering Temperature (for 10 sec)
Storage Temperature
ESD rating
HBM
MM
−55
Min
−0.5
−0.5
−40
Max
7
V
CC
+ 0.5
+85
+260
+125
2
200
Unit
V
V
°C
°C
°C
KV
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Voltages are measured with respect to ground.
http://onsemi.com
3
ASM1233D, ASM1233D−L, ASM1233M
Table 3. DC ELECTRICAL CHARACTERISTICS
(Unless otherwise noted, V
CC
= 5 V
±10%
and specifications are over the
operating temperature range of
−40°C
to +85°C. All voltages are referenced to ground.) (Note 2)
Parameter
Supply Voltage
Output Voltage
Symbol
V
CC
V
OL
V
OH
Output Current
Operating Current
I
OL
I
CC
V
CCTP
RESET asserted
I
OUT
< 500
mA
Output = 0.4 V
V
CC
< 5.5 V, RESET output open
V
CC
≤
3.6 V, RESET output open
V
CC
Trip Point
ASM1233D−LZ−5
ASM1233D−LZ−10
ASM1233D−LZ−15
ASM1233DZ−5
ASM1233DZ−10
ASM1233DZ−15
ASM1233M−5
ASM1233M−55
ASM1233M−3
Voltage High Trip Level
V
HTL
ASM1233D, ASM1233MS−5,
ASM1233MS−55
ASM1233MS−3
ASM1233D−L
Voltage Low Trip Level
V
LTL
ASM1233D, ASM1233MS−5,
ASM1233MS−55
ASM1233MS−3
ASM1233D−L
Internal Pull−up Resistor
Output Capacitance
V
CC
Detect to
RESET Low
V
CC
Detect to
RESET High
V
CC
Slew Rate
(V
HTL
−
V
LTL
)
V
CC
Slew Rate
(V
LTL
−
V
HTL
)
R
P
C
OUT
t
RPD
t
RPU
t
F
t
R
ASM1233D−L, ASM1233M
ASM1233D
200
250
300
0
2
350
350
3.5
5.0
2.98
2.8
2.64
4.5
4.25
4.0
4.25
4.5
2.64
V
CC
−0.5
V
8
8
6
3.06
2.88
2.72
4.625
4.375
4.125
4.375
4.625
2.72
20
15
3.15
2.97
2.8
4.74
4.49
4.24
4.49
4.75
2.8
4.75
3.14
3.06
4.00
2.48
2.3
7.5
10
10
500
450
ms
ns
kW
pF
ms
ms
V
V
V
V
CC
−0.1
V
mA
mA
Conditions
Min
1.2
Typ
Max
5.5
0.4
Unit
V
V
2. A 1 kW resistor may be required in some applications for proper operation of the microprocessor reset control circuit.
http://onsemi.com
4
ASM1233D, ASM1233D−L, ASM1233M
Table 4. FAMILY SELECTION GUIDE
Part #
ASM1810
ASM1811
ASM1812
ASM1815
ASM1816
ASM1817
ASM1233D
ASM1233M
ASM1233D−L
RESET Voltage (V)
4.620, 4.370, 4.120
4.620, 4.350, 4.130
4.620, 4.350, 4.130
3.060, 2.880, 2.550
3.060, 2.880, 2.550
3.060, 2.880, 2.550
4.625, 4.375, 4.125
4.625, 4.375, 2.720
3.060, 2.880, 2.720
RESET Time (ms)
150
150
150
150
150
150
350
350
350
Output Stage
Push−Pull
Open−Drain
Push−Pull
Push−Pull
Open−Drain
Push−Pull
Open−Drain
Open−Drain
Open−Drain
RESET Polarity
LOW
LOW
HIGH
LOW
LOW
HIGH
LOW
LOW
LOW
Application Information
Operation
−
Power Monitor
The ASM1233D−L/1233D/1233M detects out−of−
tolerance Power supply conditions. It resets a processor
during powerup, Power−down and generates a reset to the
system Processor when the monitored power supply voltage
is below the reset threshold. When an out−of−tolerance V
CC
voltage is detected, the RESET signal is asserted. On
power−up, RESET is kept active (LOW) for approximately
350 ms after the power supply voltage has reached the
selected tolerance. This allows the power supply and
microprocessor to stabilize before RESET is released.
Figure 3. Timing Diagram: Power−Up
Figure 4. Timing Diagram: Power−Down
http://onsemi.com
5
