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ASM3P622S00EG-16-ST

Clock Generator, 20MHz, CMOS, PDSO16, 0.150 INCH, GREEN, SOIC-16

器件类别:微控制器和处理器    时钟发生器   

厂商名称:PulseCore Semiconductor Corporation

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器件参数
参数名称
属性值
厂商名称
PulseCore Semiconductor Corporation
包装说明
0.150 INCH, GREEN, SOIC-16
Reach Compliance Code
unknown
Is Samacsys
N
JESD-30 代码
R-PDSO-G16
长度
9.905 mm
端子数量
16
最高工作温度
70 °C
最低工作温度
最大输出时钟频率
20 MHz
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
主时钟/晶体标称频率
20 MHz
认证状态
Not Qualified
座面最大高度
1.75 mm
最大供电电压
3.6 V
最小供电电压
3 V
标称供电电压
3.3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
宽度
3.9 mm
uPs/uCs/外围集成电路类型
CLOCK GENERATOR, OTHER
Base Number Matches
1
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ASM3P622S00B/E
Low Frequency Timing-Safe™
Peak EMI Reduction IC
General Features
Low Frequency Clock distribution with Timing-Safe™
Peak EMI Reduction
Input frequency range: 4MHz - 20MHz
2 different Spread Selection options
Spread Spectrum can be turned ON/OFF
External Input-Output Delay Control option
Supply Voltage: 3.3V±0.3V
Commercial and Industrial temperature range
Packaging Information:
ASM3P622S00B: 8 pin SOIC, and TSSOP
ASM3P622S00E:16 pin SOIC, and TSSOP
The First True Drop-in Solution
ASM3P622S00B/E operates from a 3.3V supply and is
available in two different packages, as shown in the
ordering information table, over commercial and Industrial
temperature range.
one reference input and drives out eight low-skew Timing-
Safe™ clocks.
ASM3P622S00B/E has an SS% that selects 2 different
Deviation and associated Input-Output Skew (TSKEW).
Refer to
Spread Spectrum Control
and
Input-Output Skew
table for details.
ASM3P622S00E has a CLKOUT for adjusting the Input-
Output clock delay, depending upon the value of capacitor
connected at this pin to GND.
Functional Description
ASM3P622S00B/E is a versatile, 3.3V Zero-delay buffer
designed to distribute low frequency Timing-Safe™ clocks
with Peak EMI reduction. ASM3P622S00B is an eight-pin
version, accepts one reference input and drives out one
low-skew Timing-Safe™ clock. ASM3P622S00E accepts
Application
ASM3P622S00B/E is targeted for use in Displays and
memory interface systems.
General Block Diagram
DLY_CTRL
VDD
SS%
CLKIN
PLL
CLKOUT(s)*
(Timing-Safe™)
*For
ASM3P622S00E -
8 CLKOUTS
SSON
GND
©2010 SCILLC. All rights reserved.
JANUARY 2010 – Rev. 1
Publication Order Number:
ASM3P622S00/D
ASM3P622S00B/E
Spread Spectrum Frequency Generation
The clocks in digital systems are typically square waves
with a 50% duty cycle and as frequencies increase the
edge rates also get faster. Analysis shows that a square
wave is composed of fundamental frequency and
harmonics. The fundamental frequency and harmonics
generate the energy peaks that become the source of
EMI. Regulatory agencies test electronic equipment by
measuring the amount of peak energy radiated from the
equipment. In fact, the peak level allowed decreases as
the frequency increases. The standard methods of
reducing EMI are to use shielding, filtering, multi-layer
PCBs, etc. These methods are expensive. Spread
spectrum clocking reduces the peak energy by reducing
the Q factor of the clock. This is done by slowly
modulating the clock frequency. The ASM3P622S00B/E
uses the center modulation spread spectrum technique in
which the modulated output frequency varies above and
below the reference frequency with a specified
modulation rate. With center modulation, the average
frequency is the same as the unmodulated frequency and
there is no performance degradation.
Zero Delay and Skew Control
All outputs should be uniformly loaded to achieve Zero
Delay between input and output. Since the CLKOUT pin
is the internal feedback to the PLL, its relative loading
can adjust the input-output delay.
For applications requiring zero input-output delay, all
outputs, including CLKOUT, must be equally loaded.
Even if CLKOUT is not used, it must have a capacitive
load equal to that on other outputs, for obtaining zero
input-output delay.
Timing-Safe™ technology
Timing-Safe™ technology is the ability to modulate a
clock source with Spread Spectrum technology and
maintain synchronization with any associated data path.
Rev. 1 | Page 2 of 15 | www.onsemi.com
ASM3P622S00B/E
Pin Configuration for ASM3P622S00B
CLKIN
NC
1
8
NC
VDD
CLKOUT
SSON
2
7
ASM3P622S00B
SS%
GND
3
6
4
5
Pin Description for ASM3P622S00B
Pin #
1
2
3
4
Pin Name
CLKIN
NC
SS%
3
1
Type
I
No Connect
I
P
Description
External reference Clock input , 5V tolerant input
Spread Spectrum Selection. Has an internal pull up resistor
Ground
Spread Spectrum enable and disable option. When SSON is HIGH, the spread
GND
3
5
6
7
8
SSON
I
2
spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal
pull up resistor.
Buffered clock output
3.3V supply
No Connect
4
CLKOUT
VDD
NC
O
P
Notes: 1. Weak pull down
2. Weak pull-down on all outputs
3. Weak pull-up on these Inputs
4.
Buffered clock output is Timing-Safe™
Rev. 1 | Page 3 of 15 | www.onsemi.com
ASM3P622S00B/E
Pin Configuration for ASM3P622S00E
CLKIN
CLKOUT1
VDD
SS%
GND
CLKOUT2
CLKOUT3
1
2
3
4
16
15
14
13
CLKOUT
CLKOUT7
CLKOUT6
VDD
GND
CLKOUT5
CLKOUT4
SSON
ASM3P622S00E
5
6
7
12
11
10
9
DLY_CTRL
8
Pin Description for ASM3P622S00E
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
CLKIN
1
2
Type
I
O
P
Buffered clock output
3.3V supply
4
Description
External reference Clock input, 5V tolerant input
CLKOUT1
V
DD
SS%
3
I
P
2
2
Spread Spectrum Selection. Refer to
Spread Spectrum Control
and
Input-Output
Skew
Table. Has an internal pull up resistor.
GND
CLKOUT2
CLKOUT3
Ground
Buffered clock output
Buffered clock output
4
4
O
O
O
I
DLY_CTRL
SSON
3
External Input-Output Delay control.
Spread Spectrum enable and disable option. When SSON is HIGH, the spread
spectrum is enabled and when LOW, it turns off the spread spectrum. Has an internal
pull up resistor.
Buffered clock output
Buffered clock output
Ground
3.3V supply
Buffered clock output
Buffered clock output
Buffered clock output
4
4
4
4
4
CLKOUT4
CLKOUT5
GND
V
DD
CLKOUT6
CLKOUT7
CLKOUT
2
2
O
O
P
P
2
2
O
O
O
2
Notes: 1. Weak pull down
2. Weak pull-down on all outputs
3. Weak pull-up on these Inputs
4.
Buffered clock output is Timing-Safe™
Rev. 1 | Page 4 of 15 | www.onsemi.com
ASM3P622S00B/E
Spread Spectrum Control and Input-Output Skew Table
Device
ASM3P622S00B/E
Input Frequency
12MHz
SS %
0
1
Deviation
±0.25 %
±0.50 %
Input-Output Skew (±T
SKEW
)
0.0625
0.125
Note: T
SKEW
is measured in units of the Clock Period
Absolute Maximum Ratings
Symbol
VDD
VIN
T
STG
T
s
T
J
T
DV
DC Input Voltage (CLKIN)
Storage temperature
Parameter
Rating
-0.5 to +4.6
-0.5 to +7
-65 to +125
260
150
2
Unit
V
°C
°C
°C
KV
Supply Voltage to Ground Potential
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage (As per JEDEC STD22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
Operating Conditions
Parameter
VDD
T
A
C
L
C
IN
Supply Voltage
Operating Temperature (Ambient Temperature)
Load Capacitance
Input Capacitance
Description
Min
3.0
-40
Max
3.6
+85
30
7
Unit
V
°C
pF
pF
Electrical Characteristics
Parameter
V
IL
V
IH
I
IL
I
IH
V
OL
V
OH
I
DD
Z
o
Note:
Description
Input LOW Voltage
5
5
Test Conditions
Min
2.0
Typ
Max
0.8
Unit
V
V
Input HIGH Voltage
Input LOW Current
Input HIGH Current
V
IN
= 0V
V
IN
= VDD
6
6
50
100
0.4
2.4
18
23
µA
µA
V
V
mA
Output LOW Voltage
I
OL
= 8mA
I
OH
= -8mA
Unloaded outputs
Output HIGH Voltage
Supply Current
Output Impedance
5. CLKIN input has a threshold voltage of VDD/2
6. Parameter is guaranteed by design and characterization. Not 100% tested in production
Rev. 1 | Page 5 of 15 | www.onsemi.com
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