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AT27BV256-70TC

256K 32K x 8 Unregulated Battery-Voltage High Speed OTP CMOS EPROM

器件类别:存储    存储   

厂商名称:Atmel (Microchip)

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Atmel (Microchip)
零件包装代码
TSOP
包装说明
TSOP1, TSSOP28,.53,22
针数
28
Reach Compliance Code
compli
ECCN代码
EAR99
最长访问时间
70 ns
其他特性
CAN ALSO BE OPERATED AT 4.5V TO 5.5V RANGE
I/O 类型
COMMON
JESD-30 代码
R-PDSO-G28
JESD-609代码
e0
长度
11.8 mm
内存密度
262144 bi
内存集成电路类型
OTP ROM
内存宽度
8
湿度敏感等级
3
功能数量
1
端子数量
28
字数
32768 words
字数代码
32000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
32KX8
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
TSOP1
封装等效代码
TSSOP28,.53,22
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE
并行/串行
PARALLEL
峰值回流温度(摄氏度)
240
电源
3/5 V
编程电压
13 V
认证状态
Not Qualified
座面最大高度
1.2 mm
最大待机电流
0.00002 A
最大压摆率
0.02 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
GULL WING
端子节距
0.55 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
30
宽度
8 mm
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AT27BV256
Features
Fast Read Access Time - 70 ns
Dual Voltage Range Operation
Unregulated Battery Power Supply Range, 2.7V to 3.6V
or Standard 5V
±
10% Supply Range
Pin Compatible with JEDEC Standard AT27C256
Low Power CMOS Operation
20
µA
max. (less than 1
µA
typical) Standby for V
CC
= 3.6V
29 mW max. Active at 5 MHz for V
CC
= 3.6V
JEDEC Standard Surface Mount Packages
32-Lead PLCC
28-Lead 330-mil SOIC
28-Lead TSOP
High Reliability CMOS Technology
2,000V ESD Protection
200 mA Latchup Immunity
Rapid
Programming Algorithm - 100
µs/byte
(typical)
CMOS and TTL Compatible Inputs and Outputs
JEDEC Standard for LVTTL and LVBO
Integrated Product Identification Code
Commercial and Industrial Temperature Ranges
Description
The AT27BV256 is a high performance, low power, low voltage 262,144 bit one-time
programmable read only memory (OTP EPROM) organized as 32K by 8 bits. It re-
quires only one supply in the range of 2.7V to 3.6V in normal read mode operation,
making it ideal for fast, portable systems using either regulated or unregulated battery
power.
256K (32K x 8)
Unregulated
Battery-Voltage
High Speed
OTP
CMOS EPROM
Atmel’s innovative design techniques provide fast speeds that rival 5V parts while
keeping the low power consumption of a 3V supply. At V
CC
= 2.7V, any word can be
accessed in less than 70 ns. With a typical power dissipation of only 18 mW at 5 MHz
and V
CC
= 3V, the AT27BV256 consumes less than one fifth the power of a standard
5V EPROM.
(continued)
AT27BV256
Pin Configurations
Pin Name
A0 - A14
O0 - O7
CE
OE
NC
Function
Addresses
Outputs
Chip Enable
Output Enable
No Connect
SOIC Top View
PLCC Top View
TSOP Top View
Type 1
Note: PLCC Package Pins 1
and 17 are DON’T CONNECT.
0601A
3-3
Description
(Continued)
Standby mode supply current is typically less than 1
µA
at
3V. The AT27BV256 simplifies system design and
stretches battery lifetime even further by eliminating the
need for power supply regulation.
The AT27BV256 is available in industry standard JEDEC-
approved one-time programmable (OTP) plastic PLCC,
SOIC and TSOP packages. All devices feature two-line
control (CE, OE) to give designers the flexibility to prevent
bus contention.
The AT27BV256 operating with V
CC
at 3.0V produces TTL
level outputs that are compatible with standard TTL logic
devices operating at V
CC
= 5.0V. At V
CC
= 2.7V, the part
is compatible with JEDEC approved low voltage battery
operation (LVBO) interface specifications. The device is
also capable of standard 5-volt operation making it ideally
suited for dual supply range systems or card products that
are pluggable in both 3-volt and 5-volt hosts.
Atmel’s AT27BV256 has additional features to ensure
high quality and efficient production use. The Rapid
Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 100
µs/byte.
The Integrated
Product Identification Code electronically identifies the de-
vice and manufacturer. This feature is used by industry
standard programming equipment to select the proper
programming algorithms and voltages. The AT27BV256
programs exactly the same way as a standard 5V
AT27C256R and uses the same programming equipment.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excur-
sions. Unless accommodated by the system design, these
transients may exceed data sheet limits, resulting in de-
vice non-conformance. At a minimum, a 0.1
µF
high fre-
quency, low inherent inductance, ceramic capacitor
should be utilized for each device. This capacitor should
be connected between the V
CC
and Ground terminals of
the device, as close to the device as possible. Additionally,
to stabilize the supply voltage level on printed circuit
boards with large EPROM arrays, a 4.7
µF
bulk electrolytic
capacitor should be utilized, again connected between the
V
CC
and Ground terminals. This capacitor should be posi-
tioned as close as possible to the point where the power
supply is connected to the array.
3-4
AT27BV256
AT27BV256
Block Diagram
Absolute Maximum Ratings*
Temperature Under Bias .................. -40°C to +85°C
Storage Temperature...................... -65°C to +125°C
Voltage on Any Pin with
Respect to Ground......................... -2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ...................... -2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground....................... -2.0V to +14.0V
(1)
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Note:
1. Minimum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out-
put pin voltage is V
CC
+ 0.75V dc which may be ex-
ceeded if certain precautions are observed (consult
application notes) and which may overshoot to
+7.0V for pulses of less than 20 ns.
Operating Modes
Mode \ Pin
Read
(2)
Output Disable
(2)
Standby
(2)
Rapid Program
(3)
PGM Verify
(3)
Optional PGM Verify
(3)
PGM Inhibit
(3)
Product Identification
(3, 5)
CE
V
IL
V
IL
V
IH
V
IL
X
V
IL
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
V
IL
V
IH
V
IL
Ai
Ai
X
(1)
X
Ai
Ai
Ai
X
A9 = V
H (4)
A0 = V
IH
or V
IL
A1 - A14 = V
IL
V
PP
V
CC
V
CC
V
CC
V
PP
V
PP
V
CC
V
PP
V
CC
V
CC
V
CC (2)
V
CC (2)
V
CC (2)
V
CC (3)
V
CC (3)
V
CC (3)
V
CC
(3)
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
D
OUT
High Z
Identification
Code
V
CC (3)
Notes: 1. X can be V
IL
or V
IH
.
2. Read, output disable, and standby modes require,
2.7V
V
CC
3.6V, or 4.5V
V
CC
5.5V.
3. Refer to Programming Characteristics. Programming
modes require V
CC
= 6.5V
.
4. V
H
= 12.0
±
0.5V.
5. Two identifier bytes may be selected. All Ai inputs
are held low (V
IL
), except A9 which is set to V
H
and A0
which is toggled low (V
IL
) to select the Manufacturer’s Identi-
fication byte and high (V
IH
) to select the Device Code byte.
3-5
DC and AC Operating Conditions for Read Operation
AT27BV256
Operating Temperature (Case)
V
CC
Power Supply
Com.
Ind.
-70
0°C - 70°C
-40°C - 85°C
2.7V to 3.6V
5V
±
10%
-90
0°C - 70°C
-40°C - 85°C
2.7V to 3.6V
5V
±
10%
-12
0°C - 70°C
-40°C - 85°C
2.7V to 3.6V
5V
±
10%
-15
0°C - 70°C
-40°C - 85°C
2.7V to 3.6V
5V
±
10%
DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP1
(2)
I
SB
I
CC
V
IL
V
IH
Parameter
Input Load Current
Output Leakage Current
V
PP
(1)
Read/Standby Current
V
CC
(1)
Standby Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Condition
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
, V
CC
= 3.6V
V
CC
= 3.0 to 3.6V
V
CC
= 2.7 to 3.6V
V
CC
= 3.0 to 3.6V
V
CC
= 2.7 to 3.6V
I
OL
= 2.0 mA
V
OL
Output Low Voltage
I
OL
= 100
µA
I
OL
= 20
µA
I
OH
= -2.0 mA
V
OH
Output High Voltage
I
OH
= -100
µA
I
OH
= -20
µA
2.4
V
CC
- 0.2
V
CC
- 0.1
±1
±5
10
100
1
20
-0.6
2.0
I
OL
= 2.1 mA
I
OH
= -400
µA
2.4
0.8
V
CC
+ 0.5
0.4
-0.6
-0.6
2.0
Min
Max
±1
±5
10
20
100
8
0.8
0.2 x V
CC
V
CC
+ 0.5
0.4
0.2
0.1
Units
µA
µA
µA
µA
µA
mA
V
V
V
V
V
V
V
V
V
V
µA
µA
µA
µA
mA
mA
V
V
V
V
V
CC
= 2.7V to 3.6V
0.7 x V
CC
V
CC
+ 0.5
V
CC
= 4.5V to 5.5V
I
LI
I
LO
I
PP1
(2)
I
SB
I
CC
V
IL
V
IH
V
OL
V
OH
Input Load Current
Output Leakage Current
V
PP
(1)
Read/Standby Current
V
CC (1)
Standby Current
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS), CE = V
CC
±
0.3V
I
SB2
(TTL), CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
Notes: 1. V
CC
must be applied simultaneously with or before
V
PP
, and removed simultaneously with or after
V
PP
.
2. V
PP
may be connected directly to V
CC
, except during pro-
gramming. The supply current would then be the sum of I
CC
and I
PP
.
3-6
AT27BV256
AT27BV256
AC Characteristics for Read Operation
(V
CC
= 2.7V to 3.6V and 4.5V to 5.5V)
AT27BV256
-70
Symbol
t
ACC (3)
t
CE (2)
t
OE (2, 3)
t
DF (4, 5)
t
OH
Notes:
-90
Min
Max
-12
Min
Max
-15
Min
Max
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
OE or CE High to Output Float,
whichever occurred first
Output Hold from Address, CE or OE,
whichever occurred first
Condition
CE = OE = V
IL
OE = V
IL
CE = V
IL
Min
Max
Units
ns
ns
ns
ns
ns
70
70
50
40
0
0
90
90
50
40
0
120
120
50
40
0
150
150
60
50
2, 3, 4, 5. - see AC Waveforms for Read Operation.
(1)
AC Waveforms for Read Operation
Notes: 1. Timing measurement references are 0.8V and 2.0V.
Input AC drive levels are 0.45V and 2.4V, unless oth-
erwise specified.
2. OE may be delayed up to t
CE
-t
OE
after the falling
edge of CE without impact on t
CE
.
3. OE may be delayed up to t
ACC
-t
OE
after the address
is valid without impact on t
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer
driven.
6. When reading a 27BV256, a 0.1
µF
capacitor is required
across V
CC
and ground to supress spurious voltage tran-
sients.
3-7
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