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AT27C2048-55JJ

OTP ROM, 128KX16, 55ns, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44

器件类别:存储    存储   

厂商名称:Atmel (Microchip)

器件标准:

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
Atmel (Microchip)
零件包装代码
LPCC
包装说明
QCCJ,
针数
44
Reach Compliance Code
compliant
ECCN代码
EAR99
最长访问时间
55 ns
JESD-30 代码
S-PQCC-J44
JESD-609代码
e3
长度
16.5862 mm
内存密度
2097152 bit
内存集成电路类型
OTP ROM
内存宽度
16
湿度敏感等级
2
功能数量
1
端子数量
44
字数
131072 words
字数代码
128000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
128KX16
封装主体材料
PLASTIC/EPOXY
封装代码
QCCJ
封装形状
SQUARE
封装形式
CHIP CARRIER
并行/串行
PARALLEL
峰值回流温度(摄氏度)
245
认证状态
Not Qualified
座面最大高度
4.572 mm
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
MATTE TIN
端子形式
J BEND
端子节距
1.27 mm
端子位置
QUAD
处于峰值回流温度下的最长时间
40
宽度
16.5862 mm
Base Number Matches
1
文档预览
Features
Fast Read Access Time – 55 ns
Low Power CMOS Operation
– 100 µA Maximum Standby
– 35 mA Maximum Active at 5 MHz
JEDEC Standard Packages
– 40-lead PDIP
– 44-lead PLCC
– 40-lead VSOP
Direct Upgrade from 512-Kbit and 1-Mbit (AT27C516 and AT27C1024) EPROMs
5V
±
10% Power Supply
High Reliability CMOS Technology
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Rapid Programming Algorithm – 50 µs/Word (Typical)
CMOS and TTL Compatible Inputs and Outputs
Integrated Product Identification Code
Industrial Temperature Range
2-Megabit
(128K x 16)
OTP EPROM
AT27C2048
1. Description
The AT27C2048 is a low-power, high-performance 2,097,152-bit one-time program-
mable read-only memory (OTP EPROM) organized 128K by 16 bits. It requires a
single 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16 and 32 bit microprocessor
systems.
In read mode, the AT27C2048 typically consumes 15 mA. Standby mode supply cur-
rent is typically less than 10 µA.
The AT27C2048 is available in industry-standard JEDEC-approved one-time pro-
grammable (OTP) plastic PDIP, PLCC, and VSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in high-speed systems.
With high density 128K word storage capability, the AT27C2048 allows firmware to be
stored reliably and to be accessed by the system without the delays of mass storage
media.
Atmel’s AT27C2048 has additional features that ensure high quality and efficient pro-
duction use. The Rapid Programming Algorithm reduces the time required to program
the part and guarantees reliable programming. Programming time is typically only
50 µs/word. The Integrated Product Identification Code electronically identifies the
device and manufacturer. This feature is used by industry-standard programming
equipment to select the proper programming algorithms and voltages.
0632F–EPROM–12/07
2. Pin Configurations
Pin Name
A0 - A16
O0 - O15
CE
OE
PGM
NC
DC
Note:
Function
Addresses
Outputs
Chip Enable
Output Enable
Program Strobe
No Connect
Don’t Connect
Both GND pins must be connected.
A9
A10
A11
A12
A13
A14
A15
A16
PGM
VCC
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
OE
O0
O1
O2
O3
O4
O5
O6
O7
GND
2.2
40-lead VSOP (Type 1) Top View
2.1
40-lead PDIP Top View
VPP
CE
O15
O14
O13
O12
O11
O10
O9
O8
GND
O7
O6
O5
O4
O3
O2
O1
O0
OE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
VCC
PGM
A16
A15
A14
A13
A12
A11
A10
A9
GND
A8
A7
A6
A5
A4
A3
A2
A1
A0
2.3
44-lead PLCC Top View
O13
O14
O15
CE
VPP
DC
VCC
PGM
A16
A15
A14
Note:
Note: PLCC package pins 1 and 23 are Don’t Connect.
2
AT27C2048
0632F–EPROM–12/07
O3
O2
O1
O0
OE
DC
A0
A1
A2
A3
A4
18
19
20
21
22
23
24
25
26
27
28
O12
O11
O10
O9
O8
GND
NC
O7
O6
O5
O4
7
8
9
10
11
12
13
14
15
16
17
6
5
4
3
2
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
A13
A12
A11
A10
A9
GND
NC
A8
A7
A6
A5
AT27C2048
3. System Considerations
Switching between active and standby conditions via the Chip Enable pin may produce transient
voltage excursions. Unless accommodated by the system design, these transients may exceed
datasheet limits, resulting in device non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be utilized for each device. This capacitor
should be connected between the V
CC
and Ground terminals of the device, as close to the
device as possible. Additionally, to stabilize the supply voltage level on printed circuit boards
with large EPROM arrays, a 4.7 µF bulk electrolytic capacitor should be utilized, again con-
nected between the V
CC
and Ground terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected to the array.
4. Block Diagram
VCC
GND
VPP
OE
CE
A0 - A17
ADDRESS
INPUTS
OE, CE AND
PROGRAM LOGIC
Y DECODER
X DECODER
IDENTIFICATION
DATA OUTPUTS
O0 - O15
OUTPUT
BUFFERS
Y-GATING
CELL MATRIX
5. Absolute Maximum Ratings*
Temperature Under Bias............................... -55° C to +125° C
Storage Temperature .................................... -65° C to +150° C
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V
(1)
Voltage on A9 with
Respect to Ground ......................................-2.0V to +14.0V
(1)
V
PP
Supply Voltage with
Respect to Ground .......................................-2.0V to +14.0V
(1)
Note:
1. Maximum voltage is -0.6V DC which may undershoot to -2.0V for pulses of less than 20 ns. Maximum output pin voltage is
V
CC
+ 0.75V DC which may overshoot to +7.0V for pulses of less than 20 ns.
*NOTICE:
Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional
operation of the device at these or any other condi-
tions beyond those indicated in the operational sec-
tions of this specification is not implied. Exposure to
absolute maximum rating conditions for extended
periods may affect device reliability.
3
0632F–EPROM–12/07
6. Operating Modes
Mode/Pin
Read
Output Disable
Standby
Rapid Program
(2)
PGM Verify
PGM Inhibit
Product Identification
(4)
Notes:
1. X can be V
IL
or V
IH
.
2. Refer to the Programming characteristics.
3. V
H
= 12.0
±
0.5V.
4. Two identifier words may be selected. All Ai inputs are held low (V
IL
), except A9, which is set to V
H
, and A0, which is toggled
low (V
IL
) to select the Manufacturer’s Identification word and high (V
IH
) to select the Device Code word.
5. Standby V
CC
current (I
SB
) is specified with V
PP
= V
CC
. V
CC
> V
PP
will cause a slight increase in I
SB
.
CE
V
IL
X
V
IH
V
IL
V
IL
V
IH
V
IL
OE
V
IL
V
IH
X
V
IH
V
IL
X
V
IL
PGM
X
(1)
X
X
V
IL
V
IH
X
X
Ai
Ai
X
X
Ai
Ai
X
A9 = V
H(3)
A0 = V
IH
or V
IL
A1 - A16 = V
IL
V
PP
X
(1)
X
X
(5)
V
PP
V
PP
V
PP
V
CC
Outputs
D
OUT
High Z
High Z
D
IN
D
OUT
High Z
Identification Code
7. DC and AC Operating Conditions for Read Operation
AT27C2048
-55
Industrial Operating Temperature (Case)
V
CC
Power Supply
-40° C - 85° C
5V
±
10%
-90
-40° C - 85° C
5V
±
10%
8. DC and Operating Characteristics for Read Operation
Symbol
I
LI
I
LO
I
PP1(2)
Parameter
Input Load Current
Output Leakage Current
V
PP(1)
Read/Standby Current
Condition
V
IN
= 0V to V
CC
V
OUT
= 0V to V
CC
V
PP
= V
CC
I
SB1
(CMOS)
CE = V
CC
± 0.3V
I
SB2
(TTL)
CE = 2.0 to V
CC
+ 0.5V
f = 5 MHz, I
OUT
= 0 mA, CE = V
IL
-0.6
2.0
I
OL
= 2.1 mA
I
OH
= -400 µA
2.4
Min
Max
±
1
±
5
10
100
1
35
0.8
V
CC
+ 0.5
0.4
Units
µA
µA
µA
µA
mA
mA
V
V
V
V
I
SB
V
CC(1)
Standby Current
I
CC
V
IL
V
IH
V
OL
V
OH
Notes:
V
CC
Active Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. V
PP
may be connected directly to V
CC
, except during programming. The supply current would then be the sum of I
CC
and I
PP
.
4
AT27C2048
0632F–EPROM–12/07
AT27C2048
9. AC Characteristics for Read Operation
AT27C2048
-55
Symbol
t
ACC(3)
t
CE(2)
t
OE(2)(3)
t
DF(4)(5)
t
OH(4)
Note:
Parameter
Address to Output Delay
CE to Output Delay
OE to Output Delay
Condition
CE = OE
= V
IL
OE = V
IL
CE = V
IL
Min
Max
55
55
20
20
7
0
Min
-90
Max
90
90
35
20
Units
ns
ns
ns
ns
ns
OE or CE High to Output Float, Whichever Occurred First
Output Hold from Address, CE or OE, Whichever
Occurred First
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
10. AC Waveforms for Read Operation
(1)
Notes:
1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to t
CE
- t
OE
after the falling edge of CE without impact on t
CE
.
3. OE may be delayed up to t
ACC
- t
OE
after the address is valid without impact on t
ACC
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
5
0632F–EPROM–12/07
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参数对比
与AT27C2048-55JJ相近的元器件有:AT27C2048-55PJ、AT27C2048-90VJ、AT27C2048-90JJ、AT27C2048-90PJ、AT27C2048-55VJ。描述及对比如下:
型号 AT27C2048-55JJ AT27C2048-55PJ AT27C2048-90VJ AT27C2048-90JJ AT27C2048-90PJ AT27C2048-55VJ
描述 OTP ROM, 128KX16, 55ns, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44 OTP ROM, 128KX16, 55ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, MS-011AC, DIP-40 OTP ROM, 128KX16, 90ns, CMOS, PDSO40, 10 X 14 MM, PLASTIC, MO-142CA, VSOP-40 OTP ROM, 128KX16, 90ns, CMOS, PQCC44, PLASTIC, MS-018AC, LCC-44 OTP ROM, 128KX16, 90ns, CMOS, PDIP40, 0.600 INCH, PLASTIC, MS-011AC, DIP-40 OTP ROM, 128KX16, 55ns, CMOS, PDSO40, 10 X 14 MM, PLASTIC, MO-142CA, VSOP-40
是否无铅 不含铅 不含铅 不含铅 不含铅 不含铅 不含铅
是否Rohs认证 符合 符合 符合 符合 符合 符合
零件包装代码 LPCC DIP TSOP1 LPCC DIP TSOP1
包装说明 QCCJ, DIP, TSSOP, QCCJ, DIP, TSSOP,
针数 44 40 40 44 40 40
Reach Compliance Code compliant compliant compliant compliant compliant compliant
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
最长访问时间 55 ns 55 ns 90 ns 90 ns 90 ns 55 ns
JESD-30 代码 S-PQCC-J44 R-PDIP-T40 R-PDSO-G40 S-PQCC-J44 R-PDIP-T40 R-PDSO-G40
JESD-609代码 e3 e3 e3 e3 e3 e3
长度 16.5862 mm 52.324 mm 12.4 mm 16.5862 mm 52.324 mm 12.4 mm
内存密度 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit 2097152 bit
内存集成电路类型 OTP ROM OTP ROM OTP ROM OTP ROM OTP ROM OTP ROM
内存宽度 16 16 16 16 16 16
湿度敏感等级 2 1 3 2 1 3
功能数量 1 1 1 1 1 1
端子数量 44 40 40 44 40 40
字数 131072 words 131072 words 131072 words 131072 words 131072 words 131072 words
字数代码 128000 128000 128000 128000 128000 128000
工作模式 ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
最高工作温度 85 °C 85 °C 85 °C 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
组织 128KX16 128KX16 128KX16 128KX16 128KX16 128KX16
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 QCCJ DIP TSSOP QCCJ DIP TSSOP
封装形状 SQUARE RECTANGULAR RECTANGULAR SQUARE RECTANGULAR RECTANGULAR
封装形式 CHIP CARRIER IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
并行/串行 PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
峰值回流温度(摄氏度) 245 245 260 245 245 260
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 4.572 mm 4.826 mm 1.2 mm 4.572 mm 4.826 mm 1.2 mm
最大供电电压 (Vsup) 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V 5.5 V
最小供电电压 (Vsup) 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V 4.5 V
标称供电电压 (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES NO YES YES NO YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 MATTE TIN MATTE TIN MATTE TIN MATTE TIN MATTE TIN MATTE TIN
端子形式 J BEND THROUGH-HOLE GULL WING J BEND THROUGH-HOLE GULL WING
端子节距 1.27 mm 2.54 mm 0.5 mm 1.27 mm 2.54 mm 0.5 mm
端子位置 QUAD DUAL DUAL QUAD DUAL DUAL
处于峰值回流温度下的最长时间 40 NOT SPECIFIED 40 40 NOT SPECIFIED 40
宽度 16.5862 mm 15.24 mm 10 mm 16.5862 mm 15.24 mm 10 mm
Base Number Matches 1 1 1 1 1 -
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器件捷径:
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ
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