AT29C512-90JU,AT29C512-90JU pdf中文资料,AT29C512-90JU引脚图,AT29C512-90JU电路-Datasheet-电子工程世界

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Features

•

Fast Read Access Time – 70 ns

•

5-volt Only Reprogramming

•

Sector Program Operation

– Single Cycle Reprogram (Erase and Program)

– 512 Sectors (128 Bytes/Sector)

– Internal Address and Data Latches for 128 Bytes

Internal Program Control and Timer

Hardware and Software Data Protection

Fast Sector Program Cycle Time – 10 ms

DATA Polling for End of Program Detection

Low Power Dissipation

– 50 mA Active Current

– 100

µA

CMOS Standby Current

Typical Endurance > 10,000 Cycles

Single 5V

10% Supply

CMOS and TTL Compatible Inputs and Outputs

Commercial and Industrial Temperature Ranges

•

512K (64K x 8)

5-volt Only

Flash Memory

AT29C512

Description

The AT29C512 is a 5-volt only in-system Flash programmable and erasable read only

memory (PEROM). Its 512K of memory is organized as 65,536 words by 8 bits. Man-

ufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers

access times to 70 ns with power dissipation of just 275 mW over the commercial tem-

perature range. When the device is deselected, the CMOS standby current is less

than 100

µA.

The device endurance is such that any sector can typically be written to

in excess of 10,000 times.

Pin Configurations

Pin Name

A0 - A15

I/O0 - I

Function

Addresses

Chip Enable

Output Enable

Write Enable

Data Inputs/Outputs

No Connect

DIP Top View

A15

A12

I/O0

I/O1

I/O2

GND

VCC

A14

A13

A11

A10

I/O7

I/O6

I/O5

I/O4

I/O3

TSOP Top View

Type 1

A11

A13

A14

VCC

A15

A12

A10

I/O7

I/O6

I/O5

I/O4

I/O3

GND

I/O2

I/O1

I/O0

PLCC Top View

A12

A15

VCC

I/O1

I/O2

GND

I/O3

I/O4

I/O5

I/O6

I/O0

A14

A13

A11

A10

I/O7

Rev. 0456F–FLASH–12/02

To allow for simple in-system reprogrammability, the AT29C512 does not require high input

voltages for programming. Five-volt-only commands determine the operation of the device.

Reading data out of the device is similar to reading from an EPROM. Reprogramming the

AT29C512 is performed on a sector basis; 128 bytes of data are loaded into the device and

then simultaneously programmed.

During a reprogram cycle, the address locations and 128 bytes of data are internally latched,

freeing the address and data bus for other operations. Following the initiation of a program

cycle, the device will automatically erase the sector and then program the latched data using

an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7.

Once the end of a program cycle has been detected, a new access for a read or program can

begin.

Block Diagram

Device

Operation

READ:

The AT29C512 is accessed like an EPROM. When CE and OE are low and WE is

high, the data stored at the memory location determined by the address pins is asserted on

the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This

dual-line control gives designers flexibility in preventing bus contention.

BYTE LOAD:

Byte loads are used to enter the 128 bytes of a sector to be programmed or

the software codes for data protection. A byte load is performed by applying a low pulse on the

WE or CE input with CE or WE low (respectively) and OE high. The address is latched on the

falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of

CE or WE.

PROGRAM:

The device is reprogrammed on a sector basis. If a byte of data within a sector

is to be changed, data for the entire sector must be loaded into the device. Any byte that is not

loaded during the programming of its sector will be indeterminate. Once the bytes of a sector

are loaded into the device, they are simultaneously programmed during the internal program-

ming period. After the first data byte has been loaded into the device, successive bytes are

entered in the same manner. Each new byte to be programmed must have its high-to-low tran-

sition on WE (or CE) within 150

µs

of the low-to-high transition of WE (or CE) of the preceding

byte. If a high-to-low transition is not detected within 150

µs

of the last low-to-high transition,

the load period will end and the internal programming period will start. A7 to A15 specify the

sector address. The sector address must be valid during each high-to-low transition of WE (or

CE). A0 to A6 specify the byte address within the sector. The bytes may be loaded in any

order; sequential loading is not required. Once a programming operation has been initiated,

and for the duration of t

, a read operation will effectively be a polling operation.

AT29C512

0456F–FLASH–12/02

AT29C512

SOFTWARE DATA PROTECTION:

A software controlled data protection feature is avail-

able on the AT29C512. Once the software protection is enabled a software algorithm must be

issued to the device before a program may be performed. The software protection feature may

be enabled or disabled by the user; when shipped from Atmel, the software data protection

feature is disabled. To enable the software data protection, a series of three program com-

mands to specific addresses with specific data must be performed. After the software data

protection is enabled the same three program commands must begin each program cycle in

order for the programs to occur. All software program commands must obey the sector pro-

gram timing specifications. Once set, the software data protection feature remains active

unless its disable command is issued. Power transitions will not reset the software data pro-

tection feature; however, the software feature will guard against inadvertent program cycles

during power transitions.

Once set, software data protection will remain active unless the disable command sequence is

issued.

After setting SDP, any attempt to write to the device without the 3-byte command sequence

will start the internal write timers. No data will be written to the device; however, for the dura-

tion of t

, a read operation will effectively be a polling operation.

After the software data protection’s 3-byte command code is given, a byte load is performed

by applying a low pulse on the WE or CE input with CE or WE low (respectively) and OE high.

The address is latched on the falling edge of CE or WE, whichever occurs last. The data is

latched by the first rising edge of CE or WE. The 128 bytes of data must be loaded into each

sector by the same procedure as outlined in the program section under device operation.

HARDWARE DATA PROTECTION:

Hardware features protect against inadvertent pro-

grams to the AT29C512 in the following ways: (a) V

sense – if V

is below 3.8V (typical),

the program function is inhibited; (b) V

power on delay – once V

has reached the V

sense level, the device will automatically time out 5 ms (typical) before programming; (c) Pro-

gram inhibit – holding any one of OE low, CE high or WE high inhibits program cycles; and (d)

Noise filter – pulses of less than 15 ns (typical) on the WE or CE inputs will not initiate a pro-

gram cycle.

PRODUCT IDENTIFICATION:

The product identification mode identifies the device and

manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware

operation mode can be used by an external programmer to identify the correct programming

algorithm for the Atmel product. In addition, users may wish to use the software product identi-

fication mode to identify the part (i.e., using the device code), and have the system software

use the appropriate sector size for program operations. In this manner, the user can have a

common board design for 256K to 4-megabit densities and, with each density’s sector size in

a memory map, have the system software apply the appropriate sector size.

For details, see Operating Modes (for hardware operation) or Software Product Identification.

The manufacturer and device code is the same for both modes.

0456F–FLASH–12/02

DATA POLLING:

The AT29C512 features DATA polling to indicate the end of a program

cycle. During a program cycle an attempted read of the last byte loaded will result in the com-

plement of the loaded data on I/O7. Once the program cycle has been completed, true data is

valid on all outputs and the next cycle may begin. DATA polling may begin at any time during

the program cycle.

TOGGLE BIT:

In addition to DATA polling the AT29C512 provides another method for deter-

mining the end of a program or erase cycle. During a program or erase operation, successive

attempts to read data from the device will result in I/O6 toggling between one and zero. Once

the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examin-

ing the toggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODE:

The entire device can be erased by using a 6-byte soft-

ware code. Please see Software Chip Erase application note for details.

Absolute Maximum Ratings*

Temperature Under Bias................................ -55°C to +125°C

Storage Temperature ..................................... -65°C to +150°C

All Input Voltages

(including NC Pins)

with Respect to Ground ...................................-0.6V to +6.25V

All Output Voltages

with Respect to Ground .............................-0.6V to V

+ 0.6V

Voltage on OE

with Respect to Ground ...................................-0.6V to +13.5V

*NOTICE:

Stresses beyond those listed under “Absolute

Maximum Ratings” may cause permanent dam-

age to the device. This is a stress rating only and

functional operation of the device at these or any

other conditions beyond those indicated in the

operational sections of this specification is not

implied. Exposure to absolute maximum rating

conditions for extended periods may affect

device reliability.

AT29C512

0456F–FLASH–12/02

AT29C512

DC and AC Operating Range

AT29C512-70

Operating

Temperature (Case)

Power Supply

Note:

Com.

Ind.

0°C - 70°C

-40°C - 85°C

Not recommended for New Designs.

AT29C512-90

0°C - 70°C

-40°C - 85°C

10%

AT29C512-12

0°C - 70°C

-40°C - 85°C

10%

AT29C512-15

0°C - 70°C

-40°C - 85°C

10%

Operating Modes

Mode

Read

Program

(2)

5V Chip Erase

Standby/Write Inhibit

Program Inhibit

Output Disable

Product Identification

Hardware

A1 - A15 = V

, A9 = V

(3)

A0 = V

A1-A15 = V

, A9 = V

(3)

A0 = V

Software

(5)

A0 = V

Notes:

X can be V

or V

Refer to AC Programming Waveforms.

= 12.0V

0.5V.

Manufacturer Code: 1F, Device Code: 5D.

See details under Software Product Identification Entry/Exit.

Manufacturer Code

(4)

Device Code

(4)

Manufacturer Code

(4)

Device Code

(4)

(1)

High Z

I/O

OUT

DC Characteristics

Symbol

SB1

Parameter

Input Load Current

Output Leakage Current

Standby Current CMOS

Condition

= 0V to V

I/O

= 0V to V

CE = V

- 0.3V to V

Com.

Ind.

SB2

OH1

OH2

Standby Current TTL

Active Current

Input Low Voltage

Input High Voltage

Output Low Voltage

Output High Voltage

Output High Voltage CMOS

= 2.1 mA

= -400

µA

= -100

µA;

= 4.5V

2.4

4.2

2.0

0.45

CE = 2.0V to V

f = 5 MHz; I

OUT

= 0 mA

Min

Max

100

300

0.8

Units

µA

0456F–FLASH–12/02

参数对比

与AT29C512-90JU相近的元器件有：AT29C512-90JI、AT29C512-70TC、AT29C512-70JI、AT29C512-12TC、AT29C512-12PI、AT29C512-15JC、AT29C512-90TU、AT29C512-12JI、AT29C512-90PI。描述及对比如下：

型号	AT29C512-90JU	AT29C512-90JI	AT29C512-70TC	AT29C512-70JI	AT29C512-12TC	AT29C512-12PI	AT29C512-15JC	AT29C512-90TU	AT29C512-12JI	AT29C512-90PI
描述	Flash Memory 64K x 8 90 ns 4.5V-5.5V	Flash Memory 512K(64Kx8) 5V ONLY 90NS IND TEMP	Flash Memory 512K(64Kx8) 5V ONLY 70NS COM TEMP	Flash Memory 512K(64Kx8) 5V ONLY 70NS IND TEMP	Flash Memory 512k (64kx8) NRND	Flash Memory 512k (64kx8) NRND	Flash Memory 512k (64kx8) NRND	Flash Memory 64K x 8 90 ns 4.5V-5.5V	Flash Memory 512k (64kx8) NRND	Flash Memory 512k (64kx8)
是否Rohs认证	符合	不符合	不符合	不符合	不符合	不符合	不符合	符合	不符合	不符合
零件包装代码	QFJ	QFJ	TSOP1	QFJ	TSOP1	DIP	QFJ	TSOP1	QFJ	DIP
包装说明	PLASTIC, MS-016AE, LCC-32	PLASTIC, MS-016AE, LCC-32	8 X 20 MM, PLASTIC, MO-142BD, TSOP1-32	PLASTIC, MS-016AE, LCC-32	8 X 20 MM, PLASTIC, MO-142BD, TSOP1-32	DIP, DIP32,.6	QCCJ, LDCC32,.5X.6	8 X 20 MM, PLASTIC, MO-142BD, TSOP1-32	PLASTIC, MS-016AE, LCC-32	DIP, DIP32,.6
针数	32	32	32	32	32	32	32	32	32	32
Reach Compliance Code	unknown	compliant	compliant	unknown	compliant	unknown	compliant	unknown	unknown	unknown
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
最长访问时间	90 ns	90 ns	70 ns	70 ns	120 ns	120 ns	150 ns	90 ns	120 ns	90 ns
命令用户界面	NO	NO	NO	NO	NO	NO	NO	NO	NO	NO
数据轮询	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
耐久性	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles	10000 Write/Erase Cycles
JESD-30 代码	R-PQCC-J32	R-PQCC-J32	R-PDSO-G32	R-PQCC-J32	R-PDSO-G32	R-PDIP-T32	R-PQCC-J32	R-PDSO-G32	R-PQCC-J32	R-PDIP-T32
JESD-609代码	e3	e0	e0	e0	e0	e0	e0	e3	e0	e0
长度	13.97 mm	13.97 mm	18.4 mm	13.97 mm	18.4 mm	42.037 mm	13.97 mm	18.4 mm	13.97 mm	42.037 mm
内存密度	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit	524288 bit
内存集成电路类型	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH	FLASH
内存宽度	8	8	8	8	8	8	8	8	8	8
功能数量	1	1	1	1	1	1	1	1	1	1
部门数/规模	512	512	512	512	512	512	512	512	512	512
端子数量	32	32	32	32	32	32	32	32	32	32
字数	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words	65536 words
字数代码	64000	64000	64000	64000	64000	64000	64000	64000	64000	64000
工作模式	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
最高工作温度	85 °C	85 °C	70 °C	85 °C	70 °C	85 °C	70 °C	85 °C	85 °C	85 °C
最低工作温度	-40 °C	-40 °C	-	-40 °C	-	-40 °C	-	-40 °C	-40 °C	-40 °C
组织	64KX8	64KX8	64KX8	64KX8	64KX8	64KX8	64KX8	64KX8	64KX8	64KX8
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	QCCJ	QCCJ	TSOP1	QCCJ	TSOP1	DIP	QCCJ	TSOP1	QCCJ	DIP
封装等效代码	LDCC32,.5X.6	LDCC32,.5X.6	TSSOP32,.8,20	LDCC32,.5X.6	TSSOP32,.8,20	DIP32,.6	LDCC32,.5X.6	TSSOP32,.8,20	LDCC32,.5X.6	DIP32,.6
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	CHIP CARRIER	CHIP CARRIER	SMALL OUTLINE, THIN PROFILE	CHIP CARRIER	SMALL OUTLINE, THIN PROFILE	IN-LINE	CHIP CARRIER	SMALL OUTLINE, THIN PROFILE	CHIP CARRIER	IN-LINE
页面大小	128 words	128 words	128 words	128 words	128 words	128 words	128 words	128 words	128 words	128 words
并行/串行	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL	PARALLEL
峰值回流温度（摄氏度）	245	225	240	225	240	NOT SPECIFIED	225	260	225	NOT SPECIFIED
电源	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
编程电压	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
座面最大高度	3.556 mm	3.556 mm	1.2 mm	3.556 mm	1.2 mm	4.826 mm	3.556 mm	1.2 mm	3.556 mm	4.826 mm
部门规模	128	128	128	128	128	128	128	128	128	128
最大待机电流	0.0003 A	0.0003 A	0.0001 A	0.0003 A	0.0001 A	0.0003 A	0.0001 A	0.0003 A	0.0003 A	0.0003 A
最大压摆率	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA	0.05 mA
最大供电电压 (Vsup)	5.5 V	5.5 V	5.25 V	5.25 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
最小供电电压 (Vsup)	4.5 V	4.5 V	4.75 V	4.75 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
标称供电电压 (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V	5 V
表面贴装	YES	YES	YES	YES	YES	NO	YES	YES	YES	NO
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	INDUSTRIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
端子面层	Matte Tin (Sn)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Matte Tin (Sn)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
端子形式	J BEND	J BEND	GULL WING	J BEND	GULL WING	THROUGH-HOLE	J BEND	GULL WING	J BEND	THROUGH-HOLE
端子节距	1.27 mm	1.27 mm	0.5 mm	1.27 mm	0.5 mm	2.54 mm	1.27 mm	0.5 mm	1.27 mm	2.54 mm
端子位置	QUAD	QUAD	DUAL	QUAD	DUAL	DUAL	QUAD	DUAL	QUAD	DUAL
处于峰值回流温度下的最长时间	40	30	30	30	30	NOT SPECIFIED	30	30	30	NOT SPECIFIED
切换位	YES	YES	YES	YES	YES	YES	YES	YES	YES	YES
类型	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE	NOR TYPE
宽度	11.43 mm	11.43 mm	8 mm	11.43 mm	8 mm	15.24 mm	11.43 mm	8 mm	11.43 mm	15.24 mm
最长写入周期时间 (tWC)	10 ms	10 ms	10 ms	10 ms	10 ms	10 ms	10 ms	10 ms	10 ms	10 ms
厂商名称	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	Atmel (Microchip)	-	Atmel (Microchip)	-	Atmel (Microchip)
其他特性	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	-	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION	AUTOMATIC WRITE; HARDWARE & SOFTWARE DATA PROTECTION
湿度敏感等级	2	2	3	2	3	-	2	3	2	-
输出特性	3-STATE	3-STATE	3-STATE	-	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
Base Number Matches	1	-	-	-	1	-	1	1	1	1