Features
•
Clock Controller
– 80C51 core with 6 clocks per instruction
– 8 MHz On-Chip Oscillator
– PLL for generating clock to supply CPU core, USB and Smart Card Interfaces
– Programmable CPU clock from 500 KHz / X1 to 48 MHz / X1
Reset Controller
– Power On Reset (POR) feature avoiding an external reset capacitor
– Power Fail Detector (PFD)
– Watch-Dog Timer
Power Management
– Two power saving modes : Idle and Power Down
– Four Power Down Wake-up Sources : Smart Card Detection, Keyboard Interrupt, USB
Resume, External Interrupt
– Input Voltage Range : 3.0V - 5.5V
– Core’s Power Consumption (Without Smart Card and USB) :
•30 mA Maximum Operating Current @ 48 MHz / X1
•200
μA
Maximum Power-down Current @ 5.5V
Interrupt Controller
– up to 9 interrupt sources
– up to 4 Level Priority
Memory Controller
– Internal Program memory :
•up to 32KB of Flash or CRAM or ROM for AT8xC5122
•up to 30KB of ROM for AT83C5123
– Internal Data Memory : 768 bytes including 256 bytes of data and 512 bytes of XRAM
– Optional : internal data E2PROM 512 bytes
Two 16-bit Timer/Counters
USB 2.0 Full Speed Interface
– 48 MHz DPLL
– On-Chip 3.3V USB voltage regulator and transceivers
– Software detach feature
– 7 endpoints programmable with In or out directions and ISO, Bulk or Interrupt Transfers :
•Endpoint 0: 32 Bytes Bidirectionnal FIFO for Control transfers
•Endpoints 1,2,3: 8 bytes FIFO
•Endpoints 4,5: 64 Bytes FIFO
•Endpoint 6: 2*64 bytes FIFO with Pin-Pong feature
ISO 7816 UART Interface Fully Compliant with EMV, GIE-CB and WHQL Standards
– Programmable ISO clock from 1 MHz to 4.8 MHz
– Card insertion/removal detection with automatic deactivation sequence
– Programmable Baud Rate Generator from 372 to 11.625 clock pulses
– Synchronous/Asynchronous Protocols T=0 and T=1 with Direct or Inverse Convention
– Automatic character repetition on parity errors
– 32 Bit Waiting Time Counter
– 16 Bit Guard Time Counter
– Internal Step Up/Down Converter with Programmable Voltage Output:
•VCC = 4.0V to 5.5V, 1.8V-30 mA, 3V-60 mA and 5V-60 mA
•VCC = 3.0V, 1.8V-30 mA, 3V-30 mA and 5V-30 mA
– Current overload protection
– 6 kV ESD (MIL/STD 833 Class 3) protection on whole Smart Card Interface
Alternate Smart Card Interface with CLK, IO and RST
UART Interface with Integrated Baud Rate Generator (BRG)
Keyboard interface with up to 20x8 matrix management capability
Master/Slave SPI Interface
Four 8 bit Ports, one 6 bit port, one 3-bit port
– Up to Seven LED outputs with 3 level programmable current source : 2, 4 and 10 mA
– Two General Purpose I/O programmable as external interrupts
– Up to 8 input lines programmable as interrupts
– Up to 30 output lines
•
•
•
•
C51
Microcontroller
with USB and
Smart Card
Reader
Interfaces
AT83C5122
AT83EC5122
AT85C5122
AT89C5122
AT89C5122DS
AT83C5123
AT83EC5123
•
•
•
•
•
•
•
•
Rev. 4202E–SCR–06/06
1
Reference Documents
The user must get the following additionnal documents which are not included but which
complete this product datasheet
•
•
Product Errata Sheet
Bootloader Datasheet
2
AT8xC5122/23
4202E–SCR–06/06
AT8xC5122/23
Product Description
AT8xC5122/23 products are high-performance CMOS derivatives of the 80C51 8-bit
microcontrollers designed for USB smart card reader applications.
The AT8xC5122 is proposed in four versions :
- ROM version with or without internal data E2PROM. The ROM device is only factory
programmable.
- CRAM version without internal data E2PROM. The CRAM device implements a vola-
tile program memory which is programmed by means of an embedded ROMed
bootloader which transfers the code from a remote software programming tool called
FLIP through UART or USB interfaces.
- Flash version without internal data E2PROM. At power-up, the program located in the
flash memory is transferred into the CRAM then executed.
The AT83C5123 is a low pin count of the AT8xC5122 and is proposed in ROM version
with or without internal data E2PROM. The ROM device is only factory programmable.
The AT8xC5122DS is a secure version of the AT8xC5122 on which the external pro-
gram memory access mode is disabled.
3
4202E–SCR–06/06
Table 1.
Product versions
Features
AT83C5122
VQFP64
Packages
QFN64
PLCC28
Die Form
Program memory
Internal Data E2PROM
Embedded bootloader
32KB ROM
No
No
30KB ROM
512 Bytes
No
VQFP64
PLCC28
AT83EC5122
AT85C5122
PLCC68
VQFP64
PLCC28
Die Form
32KB CRAM
No
Yes
AT89C5122
VQFP64
QFN64
PLCC28
32KB
E2PROM
No
Yes
AT89C5122DS
AT83C5123
VQFP32
VQFP64
QFN64
QFN32
PLCC28
Die Form
32KB E2PROM
No
Yes
30KB ROM
No
No
AT83EC5123
QFN32
VQFP32
PLCC28
30KB ROM
512 Bytes
No
Features not available :
- Keyboard Interface
VQFP32,
QFN32
packages
- Master/Slave SPI
Interface
- External Program Memory
Access
Reduced features :
- Only 12 I/O with up to 4
LED Outputs with
Programmable Current
Features
All features are
available
except External
Program Memory
Access
Features not available :
- Alternate Smart Card Interface
- Keyboard Interface
PLCC28 package
- Master/Slave SPI Interface
- External Program Memory Access
Reduced features :
- Only 7 I/O with up to 4 LED Outputs with Programmable Current
PLCC68,
VQFP64,QFN64
packages
All features are available
Note:
The PLCC28 pinout is common to AT8xC5122 and AT83C5123 products
4
AT8xC5122/23
4202E–SCR–06/06
AT8xC5122/23
AT8xC5122 Block Diagram
VSS
VCC
INT[0-1]
CCLK1
CRST1
T[0-1]
3.3 V
Regulator
XTAL1
XTAL2
8 MHz
Oscillator
256 x 8
RAM
80C518-BIT CORE
256 x 8
RAM
512 x 8
XRAM
UART
Interf ace
16-BIT
TIMERS
Interrupt
Controller
Alternate
Card
DC/DC
Conv erter
ISO 7816
Interface
CVSS
CVCC
CIO1
RxD
TxD
L
I
CPRES
CRST
CCLK
CIO
CC4
CC8
PLLF
PLL
INTERNALADDRESSAND DATABUS
RST
WATCH-DOG
POR
PFD
RESET
32K x 8
ROM (1)
32K x 8
CRAM (1)
32K x 8
E2PROM(1)
512 x 8
E2PROM(1)
SPI
Interf ace
ExternalMemory
Controller
USB
Interf ace
3.3V
Regulator
MISO
ALE
AD[0-7]
MOSI
SCK
SS
A[8-15]
PSEN
WR
R
D
D+
D-
VREF
AVCC
ParallelI/OPorts
8-BIT
PORT
3-BIT
PORT
8-BIT
PORT
8-BIT
PORT
6-BIT
PORT
8-BIT
PORT
LED's
KBD
Interf ace
Note 1 : the implementation of these f eatures depends on product v ersions
P1[2,6-7]
LED[0-6]
P0[0-7]
P2[0-7]
P3[0-7]
P4[0-5]
P5[0-7]
AT83C5123 Block Diagram
VSS
VCC
KB[0-7]
INT[0-1]
CCLK1
CRST1
T[0-1]
3.3 V
Regulator
XTAL1
XTAL2
8 MHz
Oscillator
256 x 8
RAM
80C518-BIT CORE
256 x 8
RAM
512 x 8
XRAM
UART
Interf ace
16-BIT
TIMERS
Interrupt
Controller
Alternate
Card
DC/DC
Conv erter
ISO 7816
Interface
CVSS
CVCC
CIO1
RxD
TxD
L
I
AVSS
DVCC
EA
CPRES
CRST
CCLK
CIO
CC4
CC8
PLLF
PLL
INTERNALADDRESSAND DATABUS
RST
WATCH-DOG
POR
PFD
RESET
30K x 8
ROM
512 x 8
E2PROM(1)
USB
Interf ace
3.3V
Regulator
D+
D-
VREF
AVCC
3-BIT
PORT
8-BIT
PORT
1-BIT
PORT
LED's
Note 1 : the implementation of these f eatures depends on product v ersions
P1[2,6-7]
LED[0-3]
P3[0-7]
P5.0
AVSS
DVCC
ParallelI/OPorts
5
4202E–SCR–06/06
