Features
•
Low-voltage and Standard-voltage Operation
– 5.0 (V
CC
= 4.5V to 5.5V)
– 2.7 (V
CC
= 2.7V to 5.5V)
– 2.5 (V
CC
= 2.5V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
User-selectable Internal Organization
– 1K: 128 x 8 or 64 x 16
– 2K: 256 x 8 or 128 x 16
– 4K: 512 x 8 or 256 x 16
3-wire Serial Interface
2 MHz Clock Rate (5V) Compatibility
Self-timed Write Cycle (10 ms max)
High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
– ESD Protection: >4000V
Automotive Grade and Extended Temperature Devices Available
8-pin PDIP, 8-lead JEDEC and EIAJ SOIC, and 8-lead TSSOP Packages
•
•
•
•
•
3-wire Serial
EEPROMs
1K (128 x 8 or 64 x 16)
2K (256 x 8 or 128 x 16)
4K (512 x 8 or 256 x 16)
•
•
Description
The AT93C46/56/57/66 provides 1024/2048/4096 bits of serial electrically erasable
programmable read only memory (EEPROM) organized as 64/128/256 words of 16
bits each, when the ORG pin is connected to V
CC
and 128/256/512 words of 8 bits
each when it is tied to ground. The device is optimized for use in many industrial and
commercial applications where low power and low voltage operations are essential.
The AT93C46/56/57/66 is available in space saving 8-pin PDIP and 8-lead JEDEC
and EIAJ SOIC packages.
(continued)
Pin Configurations
Pin Name
CS
SK
DI
DO
GND
VCC
ORG
DC
Function
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
Internal Organization
Don’t Connect
8-lead SOIC
8-pin PDIP
AT93C46
AT93C56
AT93C57
AT93C66
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
8-lead SOIC
Rotated (R)
(1K JEDEC Only)
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
8-lead TSSOP
DC
VCC
CS
SK
1
2
3
4
8
7
6
5
ORG
GND
DO
DI
CS
SK
DI
DO
1
2
3
4
8
7
6
5
VCC
DC
ORG
GND
Rev. 0172L–10/99
1
The AT93C46/56/57/66 is enabled through the Chip Select
pin (CS), and accessed via a 3-wire serial interface consist-
ing of Data Input (DI), Data Output (DO), and Shift Clock
(SK). Upon receiving a READ instruction at DI, the address
is decoded and the data is clocked out serially on the data
output pin DO. The WRITE cycle is completely self-timed
and no separate ERASE cycle is required before WRITE.
The WRITE cycle is only enabled when the part is in the
ERASE/WRITE ENABLE state. When CS is brought “high”
following the initiation of a WRITE cycle, the DO pin out-
puts the READY/BUSY status of the part.
The AT93C46 is available in 4.5V to 5.5V, 2.7V to 5.5V,
2.5V to 5.5V, and 1.8V to 5.5V versions. The
AT93C56/57/66 is available in 4.5V to 5.5V, 2.7V to 5.5V,
and 2.5V to 5.5V versions.
Absolute Maximum Ratings*
Operating Temperature.................................. -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground .....................................-1.0V to +7.0V
Maximum Operating Voltage .......................................... 6.25V
DC Output Current........................................................ 5.0 mA
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability
Block Diagram
Note:
1.
When the ORG pin is connected to V
CC
, the x 16 organization is selected. When it is connected to ground, the x 8 organiza-
tion is selected. If the ORG pin is left unconnected, then an internal pullup device (of approximately 1 MΩ) will select the x
16 organization. This feature is not available on 1.8V devices.
2
AT93C46/56/57/66
AT93C46/56/57/66
Pin Capacitance
(1)
Applicable over recommended operating range from T
A
= 25
°
C, f = 1.0 MHz, V
CC
= +5.0V (unless otherwise noted).
Symbol
C
OUT
C
IN
Note:
Test Conditions
Output Capacitance (DO)
Input Capacitance (CS, SK, DI)
1. This parameter is characterized and is not 100% tested.
Max
5
5
Units
pF
pF
Conditions
V
OUT
= 0V
V
IN
= 0V
DC Characteristics
Applicable over recommended operating range from: T
AI
= -40
°
C to +85
°
C, V
CC
= +1.8V to +5.5V,
T
AC
= 0
°
C to +70
°
C, V
CC
= +1.8V to +5.5V (unless otherwise noted).
Symbol
V
CC1
V
CC2
V
CC3
V
CC4
I
CC
I
SB1
I
SB2
I
SB3
I
SB4
I
IL
I
OL
V
IL1 (1)
V
IH1(1)
V
IL2 (1)
V
IH2(1)
V
OL1
V
OH1
V
OL2
V
OH2
Note:
Parameter
Supply Voltage
Supply Voltage
Supply Voltage
Supply Voltage
READ at 1.0 MHz
Supply Current
Standby Current
Standby Current
Standby Current
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
V
CC
= 5.0V
V
CC
= 1.8V
V
CC
= 2.5V
V
CC
= 2.7V
V
CC
= 5.0V
V
IN
= 0V to V
CC
V
IN
= 0V to V
CC
4.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
2.7V
4.5V
≤
V
CC
≤
5.5V
1.8V
≤
V
CC
≤
2.7V
I
OL
= 2.1 mA
I
OH
= -0.4 mA
I
OL
= 0.15 mA
I
OH
= -100 µA
V
CC
- 0.2
2.4
0.2
-0.6
2.0
-0.6
V
CC
x 0.7
WRITE at 1.0 MHz
CS = 0V
CS = 0V
CS = 0V
CS = 0V
Test Condition
Min
1.8
2.5
2.7
4.5
0.5
0.5
0
6.0
6.0
17
0.1
0.1
Typ
Max
5.5
5.5
5.5
5.5
2.0
2.0
0.1
10.0
10.0
30
1.0
1.0
0.8
V
CC
+ 1
V
CC
x 0.3
V
CC
+ 1
0.4
Unit
V
V
V
V
mA
mA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
1. V
IL
min and V
IH
max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from T
A
= -40°C to + 85°C, V
CC
= As Specified,
CL = 1 TTL Gate and 100 pF (unless otherwise noted).
Symbol
Parameter
SK Clock
Frequency
Test Condition
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
4.5V
2.7V
2.5V
1.8V
Min
0
0
0
0
250
250
500
1000
250
250
500
1000
250
250
500
1000
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
Typ
Max
2
1
0.5
0.25
Units
f
SK
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
V
CC
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
MHz
t
SKH
SK High Time
ns
t
SKL
SK Low Time
ns
t
CS
Minimum CS
Low Time
ns
t
CSS
CS Setup Time
Relative to SK
50
50
100
200
100
100
200
400
0
ns
t
DIS
DI Setup Time
Relative to SK
ns
t
CSH
CS Hold Time
Relative to SK
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
4.5V
≤
V
CC
2.7V
≤
V
CC
2.5V
≤
V
CC
1.8V
≤
V
CC
ns
t
DIH
DI Hold Time
Relative to SK
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
≤
5.5V
100
100
200
400
250
250
500
1000
250
250
500
1000
250
250
500
1000
100
100
200
400
0.1
10
1
1M
ns
t
PD1
Output Delay to ‘1’
AC Test
ns
t
PD0
Output Delay to ‘0’
AC Test
ns
t
SV
CS to Status Valid
AC Test
ns
t
DF
CS to DO in High
Impedance
AC Test
CS = V
IL
ns
ms
ms
Write Cycles
t
WP
Endurance
(1)
Write Cycle Time
5.0V, 25°C, Page Mode
4.5V
≤
V
CC
≤
5.5V
Note:
1. This parameter is characterized and is not 100% tested.
4
AT93C46/56/57/66
AT93C46/56/57/66
Instruction Set for the AT93C46
Instruction
READ
EWEN
ERASE
WRITE
ERAL
WRAL
EWDS
SB
1
1
1
1
1
1
1
Op
Code
10
00
11
01
00
00
00
Address
x8
A
6
- A
0
11XXXXX
A
6
- A
0
A
6
- A
0
10XXXXX
01XXXXX
00XXXXX
x 16
A
5
- A
0
11XXXX
A
5
- A
0
A
5
- A
0
10XXXX
01XXXX
00XXXX
D
7
- D
0
D
15
- D
0
D
7
- D
0
D
15
- D
0
x8
Data
x 16
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
Erase memory location A
n
- A
0
.
Writes memory location A
n
- A
0
.
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
Disables all programming instructions.
Instruction Set for the AT93C57
Instruction
READ
EWEN
ERASE
WRITE
ERAL
WRAL
EWDS
SB
1
1
1
1
1
1
1
Op
Code
10
00
11
01
00
00
00
Address
x8
A
7
- A
0
11XXXXXX
A
7
- A
0
A
7
- A
0
10XXXXXX
01XXXXXX
00XXXXXX
x 16
A
6
- A
0
11XXXXX
A
6
- A
0
A
6
- A
0
10XXXXX
01XXXXX
00XXXXX
D
7
- D
0
D
15
- D
0
D
7
- D
0
D
15
- D
0
x8
Data
x 16
Comments
Reads data stored in memory, at
specified address.
Write enable must precede all
programming modes.
Erase memory location A
n
- A
0
.
Writes memory location A
n
- A
0
.
Erases all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
Writes all memory locations. Valid
only at V
CC
= 4.5V to 5.5V.
Disables all programming instructions.
5
