Features
•
High-performance, Low-power Atmel
®
AVR
®
8-bit Microcontroller
•
Advanced RISC Architecture
– 131 Powerful Instructions – Most Single-clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 20 MIPS Throughput at 20 MHz
– On-chip 2-cycle Multiplier
High Endurance Non-volatile Memory segments
– 16K/32K/64K Bytes of In-System Self-programmable Flash program memory
– 512B/1K/2K Bytes EEPROM
– 1K/2K/4K Bytes Internal SRAM
– Write/Erase Cycles: 10,000 Flash/ 100,000 EEPROM
– Data retention: 20 years at 85C/100 years at 25C
(1)
– Optional Boot Code Section with Independent Lock Bits
In-System Programming by On-chip Boot Program
True Read-While-Write Operation
– Programming Lock for Software Security
JTAG (IEEE std. 1149.1 Compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
– Two 8-bit Timer/Counters with Separate Prescalers and Compare Modes
– One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
– Real Time Counter with Separate Oscillator
– Six PWM Channels
– 8-channel, 10-bit ADC
Differential mode with selectable gain at 1×, 10× or 200×
– Byte-oriented Two-wire Serial Interface
– Two Programmable Serial USART
– Master/Slave SPI Serial Interface
– Programmable Watchdog Timer with Separate On-chip Oscillator
– On-chip Analog Comparator
– Interrupt and Wake-up on Pin Change
Special Microcontroller Features
– Power-on Reset and Programmable Brown-out Detection
– Internal Calibrated RC Oscillator
– External and Internal Interrupt Sources
– Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby and
Extended Standby
I/O and Packages
– 32 Programmable I/O Lines
– 40-pin PDIP, 44-lead TQFP, 44-pad VQFN/QFN/MLF (ATmega164P/324P/644P)
– 44-pad DRQFN (
ATmega164P
)
Operating Voltages
– 1.8V - 5.5V for ATmega164P/324P/644PV
– 2.7V - 5.5V for ATmega164P/324P/644P
Speed Grades
– ATmega164P/324P/644PV: 0 - 4 MHz @ 1.8V - 5.5V, 0 - 10 MHz @ 2.7V - 5.5V
– ATmega164P/324P/644P: 0 - 10 MHz @ 2.7V - 5.5V, 0 - 20 MHz @ 4.5V - 5.5V
Power Consumption at 1 MHz, 1.8V, 25°C for ATmega164P/324P/644PV
– Active: 0.4 mA
– Power-down Mode: 0.1 µA
– Power-save Mode: 0.6 µA (Including 32 kHz RTC)
•
•
•
8-bit Atmel
Microcontroller
with
16K/32K/64K
Bytes In-System
Programmable
Flash
ATmega164P/V
ATmega324P/V
ATmega644P/V
•
•
•
•
•
Note:
1. See
”Data Retention” on page 8.
8011Q–AVR–02/2013
ATmega164P/324P/644P
1. Pin Configurations
1.1
Pinout - PDIP/TQFP/VQFN/QFN/MLF
Figure 1-1.
Pinout ATmega164P/324P/644P
PDIP
(PCINT8/XCK0/T0) PB0
(PCINT9/CLKO/T1) PB1
(PCINT10/INT2/AIN0) PB2
(PCINT11/OC0A/AIN1) PB3
(PCINT12/OC0B/SS) PB4
(PCINT13/MOSI) PB5
(PCINT14/MISO) PB6
(PCINT15/SCK) PB7
RESET
VCC
GND
XTAL2
XTAL1
(PCINT24/RXD0) PD0
(PCINT25/TXD0) PD1
(PCINT26/RXD1/INT0) PD2
(PCINT27/TXD1/INT1) PD3
(PCINT28/XCK1/OC1B) PD4
(PCINT29/OC1A) PD5
(PCINT30/OC2B/ICP) PD6
PA0 (ADC0/PCINT0)
PA1 (ADC1/PCINT1)
PA2 (ADC2/PCINT2)
PA3 (ADC3/PCINT3)
PA4 (ADC4/PCINT4)
PA5 (ADC5/PCINT5)
PA6 (ADC6/PCINT6)
PA7 (ADC7/PCINT7)
AREF
GND
AVCC
PC7 (TOSC2/PCINT23)
PC6 (TOSC1/PCINT22)
PC5 (TDI/PCINT21)
PC4 (TDO/PCINT20)
PC3 (TMS/PCINT19)
PC2 (TCK/PCINT18)
PC1 (SDA/PCINT17)
PC0 (SCL/PCINT16)
PD7 (OC2A/PCINT31)
TQFP/VQFN/QFN/MLF
PB4 (SS/OC0B/PCINT12)
PB3 (AIN1/OC0A/PCINT11)
PB2 (AIN0/INT2/PCINT10)
PB1 (T1/CLKO/PCINT9)
PB0 (XCK0/T0/PCINT8)
GND
VCC
PA0 (ADC0/PCINT0)
PA1 (ADC1/PCINT1)
PA2 (ADC2/PCINT2)
PA3 (ADC3/PCINT3)
(PCINT13/MOSI) PB5
(PCINT14/MISO) PB6
(PCINT15/SCK) PB7
RESET
VCC
GND
XTAL2
XTAL1
(PCINT24/RXD0) PD0
(PCINT25/TXD0) PD1
(PCINT26/RXD1/INT0) PD2
PA4 (ADC4/PCINT4)
PA5 (ADC5/PCINT5)
PA6 (ADC6/PCINT6)
PA7 (ADC7/PCINT7)
AREF
GND
AVCC
PC7 (TOSC2/PCINT23)
PC6 (TOSC1/PCINT22)
PC5 (TDI/PCINT21)
PC4 (TDO/PCINT20)
Note:
The large center pad underneath the VQFN/QFN/MLF package should be soldered to ground on
the board to ensure good mechanical stability.
(PCINT27/TXD1/INT1)
(PCINT28/XCK1/OC1B)
(PCINT29/OC1A)
(PCINT30/OC2B/ICP)
(PCINT31/OC2A)
PD3
PD4
PD5
PD6
PD7
VCC
GND
(PCINT16/SCL) PC0
(PCINT17/SDA) PC1
(PCINT18/TCK) PC2
(PCINT19/TMS) PC3
2
8011Q–AVR–02/2013
ATmega164P/324P/644P
1.2
Pinout - DRQFN
Figure 1-2.
DRQFN - Pinout ATmega164P
Top view
B19
A23
B20
A24
A20
B17
A21
B18
A22
A19
B16
Bottom view
A20
B16
A19
B18
A21
B17
A23
B19
A22
A24
B20
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
A18
B15
A17
B14
A16
B13
A15
B12
A14
B11
A13
A18
B15
A17
B14
A16
B13
A15
B12
A14
B11
A13
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
A12
B10
B8
A10
B9
A11
B10
A11
B9
A10
B8
B7
A9
A8
B6
B7
A12
B6
A7
A7
A8
Table 1-1.
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
DRQFN - Pinout ATmega164P/324P
PB5
PB6
PB7
RESET
VCC
GND
XTAL2
XTAL1
PD0
PD1
PD2
A7
B6
A8
B7
A9
B8
A10
B9
A11
B10
A12
PD3
PD4
PD5
PD6
PD7
VCC
GND
PC0
PC1
PC2
PC3
A13
B11
A14
B12
A15
B13
A16
B14
A17
B15
A18
PC4
PC5
PC6
PC7
AVCC
GND
AREF
PA7
PA6
PA5
PA4
A19
B16
A20
B17
A21
B18
A22
B19
A23
B20
A24
PA3
PA2
PA1
PA0
VCC
GND
PB0
PB1
PB2
PB3
PB4
A9
3
8011Q–AVR–02/2013
ATmega164P/324P/644P
2. Overview
The ATmega164P/324P/644P is a low-power CMOS 8-bit microcontroller based on the AVR
enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega164P/324P/644P achieves throughputs approaching 1 MIPS per MHz allowing the sys-
tem designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
Figure 2-1.
PA7..0
VCC
PB7..0
RESET
Power
Supervision
POR / BOD &
RESET
PORT A (8)
PORT B (8)
GND
Watchdog
Timer
Watchdog
Oscillator
A/D
Converter
Analog
Comparator
USART 0
XTAL1
Oscillator
Circuits /
Clock
Generation
EEPROM
Internal
Bandgap reference
SPI
XTAL2
8 bit T/C 0
CPU
JTAG/OCD
16 bit T/C 1
TWI
FLASH
SRAM
8 bit T/C 2
USART 1
PORT C (8)
PORT D (8)
TOSC2/PC7
TOSC1/PC6
PC5..0
PD7..0
The AVR core combines a rich instruction set with 32 general purpose working registers. All the
32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent
registers to be accessed in one single instruction executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs up to ten times faster than con-
ventional CISC microcontrollers.
4
8011Q–AVR–02/2013
ATmega164P/324P/644P
The ATmega164P/324P/644P provides the following features: 16K/32K/64K bytes of In-System
Programmable Flash with Read-While-Write capabilities, 512B/1K/2K bytes EEPROM,
1K/2K/4K bytes SRAM, 32 general purpose I/O lines, 32 general purpose working registers,
Real Time Counter (RTC), three flexible Timer/Counters with compare modes and PWM, 2
USARTs, a byte oriented 2-wire Serial Interface, a 8-channel, 10-bit ADC with optional differen-
tial input stage with programmable gain, programmable Watchdog Timer with Internal Oscillator,
an SPI serial port, IEEE std. 1149.1 compliant JTAG test interface, also used for accessing the
On-chip Debug system and programming and six software selectable power saving modes. The
Idle mode stops the CPU while allowing the SRAM, Timer/Counters, SPI port, and interrupt sys-
tem to continue functioning. The Power-down mode saves the register contents but freezes the
Oscillator, disabling all other chip functions until the next interrupt or Hardware Reset. In Power-
save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base
while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all
I/O modules except Asynchronous Timer and ADC, to minimize switching noise during ADC
conversions. In Standby mode, the Crystal/Resonator Oscillator is running while the rest of the
device is sleeping. This allows very fast start-up combined with low power consumption. In
Extended Standby mode, both the main Oscillator and the Asynchronous Timer continue to run.
The device is manufactured using Atmel’s high-density nonvolatile memory technology. The On-
chip ISP Flash allows the program memory to be reprogrammed in-system through an SPI serial
interface, by a conventional nonvolatile memory programmer, or by an On-chip Boot program
running on the AVR core. The boot program can use any interface to download the application
program in the application Flash memory. Software in the Boot Flash section will continue to run
while the Application Flash section is updated, providing true Read-While-Write operation. By
combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip,
the Atmel ATmega164P/324P/644P is a powerful microcontroller that provides a highly flexible
and cost effective solution to many embedded control applications.
The ATmega164P/324P/644P AVR is supported with a full suite of program and system devel-
opment tools including: C compilers, macro assemblers, program debugger/simulators, in-circuit
emulators, and evaluation kits.
2.2
Comparison Between ATmega164P, ATmega324P and ATmega644P
Table 2-1.
Device
ATmega164P
ATmega324P
ATmega644P
Differences between ATmega164P and ATmega644P
Flash
16 Kbyte
32 Kbyte
64 Kbyte
EEPROM
512 Bytes
1 Kbyte
2 Kbyte
RAM
1 Kbyte
2 Kbyte
4 Kbyte
5
8011Q–AVR–02/2013
