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ATMEGA2560V-8CUR

8-bit Microcontrollers - MCU AVR 256K FLSH8K SRAM 4KB EE-8MHz 1.8V

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:Microchip(微芯科技)

厂商官网:https://www.microchip.com

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
包装说明
TFBGA, BGA100,10X10,32
Reach Compliance Code
compliant
Factory Lead Time
6 weeks
具有ADC
YES
其他特性
ALSO OPERATES AT 1.8V MINIMUM SUPPLY AT 2 MHZ
地址总线宽度
16
位大小
8
CPU系列
AVR RISC
最大时钟频率
8 MHz
DAC 通道
NO
DMA 通道
NO
外部数据总线宽度
8
JESD-30 代码
S-PBGA-B100
JESD-609代码
e1
长度
9 mm
I/O 线路数量
86
端子数量
100
最高工作温度
85 °C
最低工作温度
-40 °C
PWM 通道
YES
封装主体材料
PLASTIC/EPOXY
封装代码
TFBGA
封装等效代码
BGA100,10X10,32
封装形状
SQUARE
封装形式
GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度(摄氏度)
260
电源
2/5 V
认证状态
Not Qualified
RAM(字节)
8192
ROM(单词)
131072
ROM可编程性
FLASH
座面最大高度
1.2 mm
速度
8 MHz
最大压摆率
14 mA
最大供电电压
5.5 V
最小供电电压
2.7 V
标称供电电压
3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN SILVER COPPER
端子形式
BALL
端子节距
0.8 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
40
宽度
9 mm
uPs/uCs/外围集成电路类型
MICROCONTROLLER, RISC
Base Number Matches
1
文档预览
Atmel ATmega640/V-1280/V-1281/V-2560/V-2561/V
8-bit Atmel Microcontroller with 16/32/64KB In-System Programmable Flash
DATASHEET
Features
High Performance, Low Power Atmel
®
AVR
®
8-Bit Microcontroller
Advanced RISC Architecture
– 135 Powerful Instructions – Most Single Clock Cycle Execution
– 32 × 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16MHz
– On-Chip 2-cycle Multiplier
High Endurance Non-volatile Memory Segments
– 64K/128K/256KBytes of In-System Self-Programmable Flash
– 4Kbytes EEPROM
– 8Kbytes Internal SRAM
– Write/Erase Cycles:10,000 Flash/100,000 EEPROM
– Data retention: 20 years at 85C/ 100 years at 25C
– Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True Read-While-Write Operation
– Programming Lock for Software Security
Atmel
®
QTouch
®
library support
• Endurance: Up to 64Kbytes Optional External Memory Space
– Capacitive touch buttons, sliders and wheels
– QTouch and QMatrix acquisition
– Up to 64 sense channels
JTAG (IEEE
®
std. 1149.1 compliant) Interface
– Boundary-scan Capabilities According to the JTAG Standard
– Extensive On-chip Debug Support
– Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
Peripheral Features
Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
Four 16-bit Timer/Counter with Separate Prescaler, Compare- and Capture Mode
Real Time Counter with Separate Oscillator
Four 8-bit PWM Channels
Six/Twelve PWM Channels with Programmable Resolution from 2 to 16 Bits
(ATmega1281/2561, ATmega640/1280/2560)
Output Compare Modulator
8/16-channel, 10-bit ADC (ATmega1281/2561, ATmega640/1280/2560)
Two/Four Programmable Serial USART (ATmega1281/2561, ATmega640/1280/2560)
Master/Slave SPI Serial Interface
Byte Oriented 2-wire Serial Interface
Programmable Watchdog Timer with Separate On-chip Oscillator
On-chip Analog Comparator
Interrupt and Wake-up on Pin Change
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, Standby,
and Extended Standby
54/86 Programmable I/O Lines (ATmega1281/2561, ATmega640/1280/2560)
64-pad QFN/MLF, 64-lead TQFP (ATmega1281/2561)
100-lead TQFP, 100-ball CBGA (ATmega640/1280/2560)
RoHS/Fully Green
Special Microcontroller Features
I/O and Packages
Temperature Range:
– -40C to 85C Industrial
Ultra-Low Power Consumption
– Active Mode: 1MHz, 1.8V: 500µA
– Power-down Mode: 0.1µA at 1.8V
Speed Grade:
– ATmega640V/ATmega1280V/ATmega1281V:
• 0 - 4MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V
– ATmega2560V/ATmega2561V:
• 0 - 2MHz @ 1.8V - 5.5V, 0 - 8MHz @ 2.7V - 5.5V
– ATmega640/ATmega1280/ATmega1281:
• 0 - 8MHz @ 2.7V - 5.5V, 0 - 16MHz @ 4.5V - 5.5V
– ATmega2560/ATmega2561:
• 0 - 16MHz @ 4.5V - 5.5V
2549Q–AVR–02/2014
1. Pin Configurations
Figure 1-1.
TQFP-pinout ATmega640/1280/2560
PK3 (ADC11/PCINT19)
PK2 (ADC10/PCINT18)
PK4 (ADC12/PCINT20)
PK5 (ADC13/PCINT21)
PK6 (ADC14/PCINT22)
PK7 (ADC15/PCINT23)
PK1 (ADC9/PCINT17)
PK0 (ADC8/PCINT16)
PF5 (ADC5/TMS)
PF6 (ADC6/TDO)
PF4 (ADC4/TCK)
PF0 (ADC0)
PF7 (ADC7/TDI)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
PA0 (AD0)
PA1 (AD1)
77
100 99
(OC0B) PG5
(RXD0/PCINT8) PE0
(TXD0) PE1
(XCK0/AIN0) PE2
(OC3A/AIN1) PE3
(OC3B/INT4) PE4
(OC3C/INT5) PE5
(T3/INT6) PE6
(CLKO/ICP3/INT7) PE7
VCC
GND
(RXD2) PH0
(TXD2) PH1
(XCK2) PH2
(OC4A) PH3
(OC4B) PH4
(OC4C) PH5
(OC2B) PH6
(SS/PCINT0) PB0
(SCK/PCINT1) PB1
(MOSI/PCINT2) PB2
(MISO/PCINT3) PB3
(OC2A/PCINT4) PB4
(OC1A/PCINT5) PB5
(OC1B/PCINT6) PB6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
PA2 (AD2)
76
75
74
PA3 (AD3)
PA4 (AD4)
PA5 (AD5)
PA6 (AD6)
PA7 (AD7)
PG2 (ALE)
PJ6 (PCINT15)
PJ5 (PCINT14)
PJ4 (PCINT13)
PJ3 (PCINT12)
PJ2 (XCK3/PCINT11)
PJ1 (TXD3/PCINT10)
PJ0 (RXD3/PCINT9)
GND
VCC
PC7 (A15)
PC6 (A14)
PC5 (A13)
PC4 (A12)
PC3 (A11)
PC2 (A10)
PC1 (A9)
PC0 (A8)
PG1 (RD)
PG0 (WR)
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
AVCC
AREF
GND
GND
VCC
46
INDEX CORNER
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
PJ7
47
48
49
(OC0A/OC1C/PCINT7) PB7
VCC
GND
(ICP4) PL0
(RXD1/INT2) PD2
(SCL/INT0) PD0
(XCK1) PD5
(T4) PH7
(T1) PD6
(TXD1/INT3) PD3
(OC5A) PL3
(OC5B) PL4
(OC5C) PL5
(TOSC2) PG3
(TOSC1) PG4
ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
(SDA/INT1) PD1
(ICP1) PD4
(ICP5) PL1
(T0) PD7
PL6
(T5) PL2
XTAL2
RESET
XTAL1
PL7
2
Figure 1-2.
CBGA-pinout ATmega640/1280/2560
Top view
1
A
B
C
D
E
F
G
H
J
K
2
3
4
5
6
7
8
9
10
10
9
8
Bottom view
7
6
5
4
3
2
1
A
B
C
D
E
F
G
H
J
K
Table 1-1.
1
A
B
C
D
E
F
G
H
J
K
Note:
CBGA-pinout ATmega640/1280/2560
2
AREF
PG5
PE0
PE4
PH0
PH4
PB1
PB4
PG3
PG4
3
PF0
PF1
PE1
PE5
PH1
PH6
PB2
RESET
PB6
VCC
4
PF2
PF3
PF4
PE6
PH3
PB0
PB5
PL1
PL0
GND
5
PF5
PF6
PF7
PH2
PH5
PL4
PL2
PL3
XTAL2
XTAL1
6
PK0
PK1
PK2
PA4
PJ6
PD1
PD0
PL7
PL6
PL5
7
PK3
PK4
PK5
PA5
PJ5
PJ1
PD5
PD4
PD3
PD2
8
PK6
PK7
PJ7
PA6
PJ4
PJ0
PC5
PC4
PC1
PD6
9
GND
PA0
PA1
PA7
PJ3
PC7
PC6
PC3
PC0
PD7
10
VCC
PA2
PA3
PG2
PJ2
GND
VCC
PC2
PG1
PG0
GND
AVCC
PE2
PE3
PE7
VCC
GND
PB3
PH7
PB7
The functions for each pin is the same as for the 100 pin packages shown in
Figure 1-1 on page 2.
ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
3
Figure 1-3.
Pinout ATmega1281/2561
PF5 (ADC5/TMS)
PF6 (ADC6/TDO)
PF4 (ADC4/TCK)
PF7 (ADC7/TDI)
PF0 (ADC0)
PF1 (ADC1)
PF2 (ADC2)
PF3 (ADC3)
PA0 (AD0)
PA1 (AD1)
50
64
63
62
61
60
59
58
57
56
55
54
53
52
51
(OC0B) PG5
(RXD0/PCINT8/PDI) PE0
(TXD0/PDO) PE1
(XCK0/AIN0) PE2
(OC3A/AIN1) PE3
(OC3B/INT4) PE4
(OC3C/INT5) PE5
(T3/INT6) PE6
(ICP3/CLKO/INT7) PE7
(SS/PCINT0) PB0
(SCK/ PCINT1) PB1
(MOSI/ PCINT2) PB2
(MISO/ PCINT3) PB3
(OC2A/ PCINT4) PB4
(OC1A/PCINT5) PB5
(OC1B/PCINT6) PB6
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
INDEX CORNER
49
PA2 (AD2)
AVCC
AREF
GND
GND
VCC
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
PA3 (AD3)
PA4 (AD4)
PA5 (AD5)
PA6 (AD6)
PA7 (AD7)
PG2 (ALE)
PC7 (A15)
PC6 (A14)
PC5 (A13)
PC4 (A12)
PC3 (A11)
PC2 (A10)
PC1 (A9)
PC0 (A8)
PG1 (RD)
PG0 (WR)
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
(T1) PD6
(RXD1/INT2) PD2
(SCL/INT0) PD0
(TXD1/INT3) PD3
(OC0A/OC1C/PCINT7) PB7
(XCK1) PD5
(ICP1) PD4
VCC
Note:
The large center pad underneath the QFN/MLF package is made of metal and internally connected to GND. It should
be soldered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the pack-
age might loosen from the board.
ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
(SDA/INT1) PD1
(TOSC2) PG3
(TOSC1) PG4
(T0) PD7
GND
XTAL2
RESET
XTAL1
32
4
2. Overview
The ATmega640/1280/1281/2560/2561 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced
RISC architecture. By executing powerful instructions in a single clock cycle, the
ATmega640/1280/1281/2560/2561 achieves throughputs approaching 1 MIPS per MHz allowing the system
designer to optimize power consumption versus processing speed.
2.1
Block Diagram
Block Diagram
PF7..0
VCC
Figure 2-1.
PK7..0
P
J7..0
PE7..0
RESET
Power
Supervision
POR/ BOD &
RESET
PORT F (8)
PORT K (8)
PORT J (8)
PORT E (8)
GND
Watchdog
Timer
Watchdog
Oscillator
JTAG
A/D
Converter
Analog
Comparator
USART 0
XTAL1
Oscillator
Circuits /
Clock
Generation
EEPROM
Internal
Bandgap reference
16 bit T/C 3
XTAL2
CPU
16 bit T/C 5
USART 3
P
A7..0
PORT A (8)
16 bit T/C 4
USART 1
PG5..0
PORT G (6)
XRAM
FLASH
SRAM
16 bit T/C 1
PC7..0
PORT C (8)
TWI
SPI
8 bit T/C 0
8 bit T/C 2
USART 2
NOTE:
Shaded parts only available
in the 100-pin version.
Complete functionality for
the ADC, T/C4, and T/C5 only
available in the 100-pin version.
PORT D (8)
PORT B (8)
PORT H (8)
PORT L (8)
PD7..0
PB7..0
PH7..0
PL7..0
The Atmel
®
AVR
®
core combines a rich instruction set with 32 general purpose working registers. All the 32 regis-
ters are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in
one single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]
2549Q–AVR–02/2014
5
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