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ATR2732N3-PBQW

Integrated DAB One-chip Front End

器件类别:无线/射频/通信    电信电路   

厂商名称:Atmel (Microchip)

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
零件包装代码
QFN
包装说明
HVQCCN,
针数
64
Reach Compliance Code
unknow
JESD-30 代码
S-XQCC-N64
长度
9 mm
功能数量
1
端子数量
64
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
UNSPECIFIED
封装代码
HVQCCN
封装形状
SQUARE
封装形式
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态
Not Qualified
座面最大高度
1 mm
标称供电电压
3.3 V
表面贴装
YES
技术
BICMOS
电信集成电路类型
TELECOM CIRCUIT
温度等级
INDUSTRIAL
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
QUAD
宽度
9 mm
Base Number Matches
1
文档预览
Features
Highly Integrated DAB Front-end Solution Covering Band III and L-band Reception
Convenient Internal Clock Generation, Single Reference Clock
Fractional PLL for VHF
Fully Integrated VCOs
High-precision Digitally Tunable Reference Oscillator
Integrated High-performance LNAs
Very Flexible Programming of the AGC
Automatically Aligned External Filter Tuning
Simple Three-wire Digital Control Interface for Easy Handling
Single Low Voltage (3.3V) Supply Operation
Low Current Consumption Due to Several Power-down Options
Small SMD Package (QFN 9 mm
×
9 mm)
Integrated DAB
One-chip Front
End
ATR2732N3
Summary
Applications
Commercial DAB Receivers
DAB Receiver Solutions for Car Radio Applications
Portable DAB Solutions
1. Description
The ATR2732N3 is a front-end monolithic integrated circuit, manufactured using
Atmel
®
’s silicon-germanium BiCMOS process (SiGMOS).
The ATR2732N3 carries out all functions of RF and IF processing, as well as the
clock-signal generation for these functions. Therefore, there is an integrated fractional
PLL, which, equivalent to most of the other functions, can be controlled via an external
digital bus. The RF functions include LNA, down-conversion mixing, amplifying, detec-
tion, and gain control. An external SAW filter is required in the signal path after the RF
functions. Additional amplifiers with detection and control functions are integrated IF
functions.
The device offers several tuning support functions, and was created to simplify the
design and manufacturing process. To this end, the number of external components
are minimal.
The part fits perfectly to Atmel’s DAB baseband processor ATR2740.
NOTE:
This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
9129AS–DAB–04/08
Figure 1-1.
Block Diagram
Gain
cntl
Vtune
gen.
A
D
RSSI
PWR
cntl
Control unit
VCO
L-band
PLL
VHF
frac. PLL
SPI interface
VCO
2. Pin Configuration
Figure 2-1.
Pinning QFN64
MILIN-
MILIN+
GDMIXL
PDFOUTL
VDD
XTALB
XTALA
VDI
XOUT
MISO
SCK
NSS
MOSI
SWITCHEN
WAGC
VA2
VAMIXL
VAVCOL
TUNVL
GDVCOL
LNAVIN+
LNAVL+
LNAVL-
LNAVIN-
VALNA
LNALO+
LNALO-
AGCRF
GNDLNA
LNALIN+
LNALIN-
IPINDIO
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
48
1
47
2
46
3
45
4
44
5
43
6
42
7
41
8
QFN64
40
9
39
10
38
11
37
12
36
13
35
14
34
15
33
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
LNAVO+
LNAVO-
VABIAS
CVREF
IF1O+
IF1O-
VA1
RREFE
AGCSAW
IF1IN+
IF1IN-
MIXVIN+
MIXVIN-
MIXVO+
MIXVO-
VAVCOV
IFAGCIN-
IF2O-
IF2O+
IFAGCIN+
AGCIF
IF2IN-
IF2IN+
PDFOUTV
TNKREFO
TNKREFI
VTNKREF
VFIL1
VFIL2
VFIL3
GDVCOV
TUNVV
2
ATR2732N3
9129AS–DAB–04/08
ATR2732N3
Table 2-1.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Pin Description
Symbol
VAMIXL
VAVCOL
TUNVL
GDVCOL
LNAVIN+
LNAVL+
LNAVL–
LNAVIN
VALNA
LNALO+
LNALO
AGCRF
GNDLNA
LNALIN+
LNALIN
IPINDIO
LNAVO+
LNAVO
VABIAS
CVREF
IF1O+
IF1O
VA1
RREFE
AGCSAW
IF1IN+
IF1IN
MIXVIN+
MIXVIN
MIXVO+
MIXVO
VAVCOV
TUNVV
GDVCOV
VFIL3
VFIL2
VFIL1
VTNKREF
TNKREFI
Function
Supply voltage (mixer for L-band)
Supply voltage (VCO for L-band)
Tuning voltage for integrated L-band VCO (connected to PLL loop filter)
Ground (L-band VCO)
Input for VHF LNVGA (differential with pin 8)
Connection for degeneration coil (inductance) to GNDLNA for VHF LNVGA
Connection for degeneration coil (inductance) to GNDLNA for VHF LNVGA
Input for VHF LNVGA (differential with pin 5)
Supply voltage for LNVGAs
(Differential) output for L-band LNVGA
(Differential) output for L-band LNVGA
Connection for time-constant capacitor of RF AGC (LNVGAs, external PIN diode)
Ground for LNVGAs
(Differential) input for L-band LNVGA
(Differential) input for L-band LNVGA
Current output to external PIN diode for additional attenuation of incoming signal (optional)
(Differential) output of VHF LNVGA and/or mixer for L-band
(Differential) output of VHF LNVGA and/or mixer for L-band
Supply voltage for (internal) voltage and current bias reference circuits
Connection for capacitor for filtering internal voltage/current reference circuits (capacitor to VABIAS)
(Differential) Output of IFVGA1
(Differential) Output of IFVGA1
Supply voltage
Connection for current reference resistor (resistor to ground)
Connection for AGC time-constant capacitor of the VHF mixer
(Differential) Input of 1st IFVGA
(Differential) Input of 1st IFVGA
(Differential) Input of VHF mixer
(Differential) Input of VHF mixer
(Differential) Output of VHF mixer
(Differential) Output of VHF mixer
Supply voltage (VHF VCO)
Tuning voltage for integrated VHF VCO (connected to PLL loop filter)
Ground (VHF VCO)
Voltage outputs for frequency tuning of VHF filters: antenna filter, preselection filter
Voltage outputs for frequency tuning of VHF filters: antenna filter, preselection filter
Voltage outputs for frequency tuning of VHF filters: antenna filter, preselection filter
Output voltage for tuning the reference tank (-varactor)
Reference-tank connection for to generate the tuning voltages for the external VHF filters (varactors)
TNKREFO Reference-tank connection for to generate the tuning voltages for the external VHF filters (varactors)
3
9129AS–DAB–04/08
Table 2-1.
Pin
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
Paddle
Pin Description (Continued)
Symbol
IF2IN+
IF2IN
AGCIF
IFAGCIN+
IF2O+
IF2O
IFAGCIN
VA2
WAGC
SWITCHEN
MOSI
NSS
SCK
MISO
XOUT
VDI
XTALA
XTALB
VDD
PFDOUTL
GDMIXL
MILIN+
MILIN
GND
Function
(Differential) Input of 2nd IFVGA
(Differential) Input of 2nd IFVGA
Connection for time-constant capacitor of IFVGAs’ AGC
Input of IFAGC detector (differential with pin 48)
(Differential) Output of 2nd IFVGA
(Differential) Output of 2nd IFVGA
Input of IFAGC detector (differential with pin 45)
Supply voltage
Window AGC input: All AGCs frozen and currents to capacitors switched off (necessary during Null Symbol
or when unused symbols are left out and the part is powered down using the SWITCHEN input)
Input for selection between the two enable registers, allowing a fast change between reduced, low-current,
and normal-reception mode, and offering current-saving capability
Input of SPI bus (data, refer to SPI bus protocol)
Input of SPI bus (chip select, refer to SPI bus protocol)
Input of SPI bus (clock, refer to SPI bus protocol)
Output of SPI bus (data, refer to SPI bus protocol)
Crystal oscillator clock output to baseband
If used: AC-couple to baseband (single VCXO concept)
If not used: short-circuit to GND
Supply voltage from baseband (1.65V to 3.6V) to adaptation interface to baseband
Connection for reference clock crystal
Connection for reference clock crystal
Supply for digital circuits
Output of phase comparator for VCO for L-band (connected to PLL loop filter)
Ground (L-band mixer)
(Differential) Input of L-band mixer
(Differential) Input of L-band mixer
Ground
PFDOUTV Output-of-phase comparator for VHF VCO (connected to PLL loop filter)
4
ATR2732N3
9129AS–DAB–04/08
ATR2732N3
3. Functional Description
The ATR2732N3 front-end IC was developed as a tuner IC for DAB reception. It was designed
for operation in L-band (1452 MHz to 1492 MHz) and VHF BIII (167 MHz to 240 MHz). The front
end contains gain-controlled LNAs, an L-band mixer with a corresponding PLL, and a VHF-band
mixer with a fractional PLL. The IF path contains three gain-controlled amplifiers. The front-end
IC allows the use of automatic tuning, which contains an adjustable input filter for VHF BIII and
an adjustable preselection filter for L-band and VHF reception.
The high dynamic range of the RF inputs, the use of gain-controlled amplifiers and gain-con-
trolled mixers in the RF and IF path, and an integrated driver for an external PIN diode
attenuator (VHF band) offer the possibility of handling even strong RF input signals.
The RF and IF parts include AGC functional blocks, which are needed for proper operation. The
thresholds are programmable via a simple serial bus.
The SPI bus is used to adjust and control all functional blocks.
The following sections briefly describe the major functions and features.
3.1
Main Functions
The following description gives a short overview of the general signal flow using the ATR2732N3
front-end IC for reception of DAB signals. Numbers in the text refer to the numbers in
Figure 3-1
on page 6.
A DAB signal in the L-band frequency range (1452 MHz to 1492 MHz) is received by the L-band
antenna; a separate LNA with a separate input is available for the VHF Band III signals. In both
cases, the signal is band-pass filtered using a filter with low insertion loss. The internal variable
gain LNA (for L-band (1), for Band III (3)) amplifies the signal. For the L-band reception, a sec-
ond band-pass filter is placed between the LNA output and mixer input at (2). This mixer
converts the L-band signal to the VHF BIII frequency range (167 MHz to 240 MHz). The signal
leaves the IC at point (4), followed by an external preselection filter.
This filter has an automatic tuner adjustment; that is, the tuning-voltage-generation block adjusts
the pass band of this filter to the desired frequency. After passing this filter, the RF signal is
down-mixed to a fixed IF frequency of 38.912 MHz. The IF signal is amplified and passed to a
SAW filter (5). The first IF variable-gain amplifier is followed by an IF filter at position (6). This fil-
ter is used as an anti-alias-filter. Finally, the DAB signal is amplified using the 2nd IF amplifier.
The signal leaves the front-end IC at (7), giving the signal to the DAB baseband IC.
5
9129AS–DAB–04/08
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参数对比
与ATR2732N3-PBQW相近的元器件有:ATR2732N3-PBPW、ATR2732N3。描述及对比如下:
型号 ATR2732N3-PBQW ATR2732N3-PBPW ATR2732N3
描述 Integrated DAB One-chip Front End Integrated DAB One-chip Front End Integrated DAB One-chip Front End
是否Rohs认证 符合 符合 -
零件包装代码 QFN QFN -
包装说明 HVQCCN, HVQCCN, -
针数 64 64 -
Reach Compliance Code unknow unknow -
JESD-30 代码 S-XQCC-N64 S-XQCC-N64 -
长度 9 mm 9 mm -
功能数量 1 1 -
端子数量 64 64 -
最高工作温度 85 °C 85 °C -
最低工作温度 -40 °C -40 °C -
封装主体材料 UNSPECIFIED UNSPECIFIED -
封装代码 HVQCCN HVQCCN -
封装形状 SQUARE SQUARE -
封装形式 CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE -
认证状态 Not Qualified Not Qualified -
座面最大高度 1 mm 1 mm -
标称供电电压 3.3 V 3.3 V -
表面贴装 YES YES -
技术 BICMOS BICMOS -
电信集成电路类型 TELECOM CIRCUIT TELECOM CIRCUIT -
温度等级 INDUSTRIAL INDUSTRIAL -
端子形式 NO LEAD NO LEAD -
端子节距 0.5 mm 0.5 mm -
端子位置 QUAD QUAD -
宽度 9 mm 9 mm -
Base Number Matches 1 1 -
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