Features
•
Core
– ARM
®
Cortex
®
-M3 revision 2.0 running at up to 64 MHz
– Memory Protection Unit (MPU)
– Thumb
®
-2 instruction set
Pin-to-pin compatible with AT91SAM7S legacy products (48- and 64-pin versions)
Memories
– From 64 to 256 Kbytes embedded Flash, 128-bit wide access, memory accelerator,
single plane
– From 16 to 48 Kbytes embedded SRAM
– 16 Kbytes ROM with embedded bootloader routines (UART, USB) and IAP routines
– 8-bit Static Memory Controller (SMC): SRAM, PSRAM, NOR and NAND Flash
support
– Memory Protection Unit (MPU)
System
– Embedded voltage regulator for single supply operation
– Power-on-Reset (POR), Brown-out Detector (BOD) and Watchdog for safe
operation
– Quartz or ceramic resonator oscillators: 3 to 20 MHz main power with Failure
Detection and optional low power 32.768 kHz for RTC or device clock
– High precision 8/12 MHz factory trimmed internal RC oscillator with 4 MHz default
frequency for device startup. In-application trimming access for frequency
adjustment
– Slow Clock Internal RC oscillator as permanent low-power mode device clock
– Two PLLs up to 130 MHz for device clock and for USB
– Temperature Sensor
– Up to 22 peripheral DMA (PDC) channels
Low Power Modes
– Sleep and Backup modes, down to 3 µA in Backup mode
– Ultra low power RTC
Peripherals
– USB 2.0 Device: 12 Mbps, 2668 byte FIFO, up to 8 bidirectional Endpoints. On-Chip
Transceiver
– Up to 2 USARTs with ISO7816, IrDA
®
, RS-485, SPI, Manchester and Modem Mode
– Two 2-wire UARTs
– Up to 2 Two Wire Interface (I2C compatible), 1 SPI, 1 Serial Synchronous Controller
(I2S), 1 High Speed Multimedia Card Interface (SDIO/SD Card/MMC)
– Up to 6 Three-Channel 16-bit Timer/Counter with capture, waveform, compare and
PWM mode. Quadrature Decoder Logic and 2-bit Gray Up/Down Counter for
Stepper Motor
– 4-channel 16-bit PWM with Complementary Output, Fault Input, 12-bit Dead Time
Generator Counter for Motor Control
– 32-bit Real-time Timer and RTC with calendar and alarm features
– Up to 15-channel, 1Msps ADC with differential input mode and programmable gain
stage
– One 2-channel 12-bit 1Msps DAC
– One Analog Comparator with flexible input selection, Selectable input hysteresis
– 32-bit Cyclic Redundancy Check Calculation Unit (CRCCU)
I/O
– Up to 79 I/O lines with external interrupt capability (edge or level sensitivity),
debouncing, glitch filtering and on-die Series Resistor Termination
– Three 32-bit Parallel Input/Output Controllers, Peripheral DMA assisted Parallel
Capture Mode
Packages
– 100-lead LQFP, 14 x 14 mm, pitch 0.5 mm/100-ball LFBGA, 9 x 9 mm, pitch 0.8 mm
– 64-lead LQFP, 10 x 10 mm, pitch 0.5 mm/64-pad QFN 9x9 mm, pitch 0.5 mm
– 48-lead LQFP, 7 x 7 mm, pitch 0.5 mm/48-pad QFN 7x7 mm, pitch 0.5 mm
•
•
•
AT91SAM
ARM-based
Flash MCU
SAM3S Series
Summary
•
•
•
NOTE:
This is a summary document.
The complete document is available on
the Atmel website at www.atmel.com.
•
6500CS–ATARM–24-Jan-11
1. SAM3S Description
Atmel's SAM3S series is a member of a family of Flash microcontrollers based on the high per-
formance 32-bit ARM Cortex-M3 RISC processor. It operates at a maximum speed of 64 MHz
and features up to 256 Kbytes of Flash and up to 48 Kbytes of SRAM. The peripheral set
includes a Full Speed USB Device port with embedded transceiver, a High Speed MCI for
SDIO/SD/MMC, an External Bus Interface featuring a Static Memory Controller providing con-
nection to SRAM, PSRAM, NOR Flash, LCD Module and NAND Flash, 2x USARTs, 2x UARTs,
2x TWIs, 3x SPI, an I2S, as well as 1 PWM timer, 6x general-purpose 16-bit timers, an RTC, an
ADC, a 12-bit DAC and an analog comparator.
The SAM3S series is ready for capacitive touch thanks to the QTouch library, offering an easy
way to implement buttons, wheels and sliders
The SAM3S device is a medium range general purpose microcontroller with the best ratio in
terms of reduced power consumption, processing power and peripheral set. This enables the
SAM3S to sustain a wide range of applications including consumer, industrial control, and PC
peripherals.
It operates from 1.62V to 3.6V and is available in 48-, 64- and 100-pin QFP, 48- and 64-pin
QFN, and 100-pin BGA packages.
The SAM3S series is the ideal migration path from the SAM7S series for applications that
require more performance. The SAM3S series is pin-to-pin compatible with the SAM7Sseries.
1.1
Configuration Summary
The SAM3S series devices differ in memory size, package and features list.
Table 1-1
below
summarizes the configurations of the device family
Table 1-1.
Configuration Summary
Timer
Counter
Channels
6
UART/
USARTs
2/2
(1)
Device
SAM3S4C
Flash
256 Kbytes
single plane
256 Kbytes
single plane
256 Kbytes
single plane
128 Kbytes
single plane
128 Kbytes
single plane
128 Kbytes
single plane
64 Kbytes
single plane
64 Kbytes
single plane
64 Kbytes
single plane
SRAM
48 Kbytes
GPIOs
79
ADC
16 ch.
12-bit
DAC
Output
2
External Bus
Interface
8-bit data,
4 chip selects,
24-bit address
-
-
8-bit data,
4 chip selects,
24-bit address
-
-
8-bit data,
4 chip selects,
24-bit address
-
-
HSMCI
1 port
4 bits
1 port
4 bits
-
1 port
4 bits
1 port
4 bits
-
1 port
4 bits
1 port
4 bits
-
Package
LQFP100
BGA100
LQFP64
QFN 64
LQFP48
QFN 48
LQFP100
BGA100
LQFP64
QFN 64
LQFP48
QFN 48
LQFP100
BGA100
LQFP64
QFN 64
LQFP48
QFN 48
SAM3S4B
SAM3S4A
48 Kbytes
48 Kbytes
3
3
47
34
2/2
2/1
2/2
(1)
10 ch.
8 ch.
2
-
SAM3S2C
32 Kbytes
6
79
16 ch.
2
SAM3S2B
SAM3S2A
32 Kbytes
32 Kbytes
3
3
47
34
2/2
2/1
2/2
(1)
10 ch.
8 ch.
2
-
SAM3S1C
16 Kbytes
6
79
16 ch.
2
SAM3S1B
SAM3S1A
16 Kbytes
16 Kbytes
3
3
47
34
2/2
2/1
10 ch.
8 ch.
2
-
Note:
1. Full Modem support on USART1.
2
SAM3S Summary
6500CS–ATARM–24-Jan-11
SAM3S Summary
2. SAM3S Block Diagram
Figure 2-1.
SAM3S 100-pin Version Block Diagram
TD
TDI
TMO
TC
S
/
S
K/ W
S
W DI
CL O
K
S
E
DI
N
DO
VD
UT
L
JTA
G
T
ST
PCK0-PCK2
System
Controller
Voltage
Regulator
PLLA
PLLB
RC
12/8/4 M
PMC
JTAG &
Serial
Wire
Flash
Unique
Identifier
In-Circuit Emulator
XIN
X
OUT
3-20
MHz
Osc.
SUPC
24-Bit
N
Cortex-M3 Processor
SysTick
Counter V
Fmax 64 MHz
I
C
MPU
I/D
XIN32
X
OUT32
ERASE
FLASH
256 KBytes
128 KBytes
64 KBytes
VD
SRAM
48 KBytes
32
KBytes
16 KBytes
ROM
16 KBytes
OSC
32k
RC
32k
S
4-layer AHB Bus Matrix Fmax 64 MHz
8
GPBREG
VDDIO
VDDCORE
VDDPLL
NRST
WDT
RTT
RTC
POR
RSTC
SM
Peripheral
Bridge
2668 USB 2.0
Bytes
Full
FIFO
Speed
Transceiver
DDP
DDM
PIOA / PIOB / PIOC
TWCK0
TWD0
TWCK1
TWD1
URXD0
UTXD0
URXD1
UTXD1
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DSR1
DTR1
RI1
DCD1
TCLK[0:2]
TIOA[0:2]
TIOB[0:2]
TCLK[3:5]
TIOA[3:5]
TIOB[3:5]
PWMH[0:3]
PWML[0:3]
PWMFI0
ADTRG
AD[0..14]
ADVREF
DAC0
DAC1
DATRG
TWI0
TWI1
UART0
UART1
PDC
PDC
PDC
PDC
External Bus
Interface
NAND Flash
Logic
PIO
USART0
PDC
Static
Memory
Controller
D[7:0]
A[0:23]
A21/NANDALE
A22/NANDCLE
NCS0
NCS1
NCS2
NCS3
NRD
NWE
NANDOE
NANDWE
NWAIT
PIODC[7:0]
PIODCEN1
PIODCEN2
PIODCCLK
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TF
TK
TD
RD
RK
RF
MCCK
MCCDA
MCDA[0..3]
PDC
USART1
PDC
Timer Counter A
TC[0..2]
SPI
Timer Counter B
TC[3..5]
PWM
PDC
Temp.
Sensor
ADC
DAC
PDC
PDC
PDC
PIO
PDC
SSC
PDC
High
Speed
MCI
Analog
Comparator
CRC Unit
ADC
DAC
Temp
Sensor
ADVREF
3
6500CS–ATARM–24-Jan-11
Figure 2-2.
SAM3S 64-pin Version Block Diagram
TD
I
TD
O
TM
S
/
TC
S
W
K/ DIO
S
W
CL
K
S
E
L
N
VD
DO
UT
T
ST
PCK0-PCK2
System
Controller
Voltage
Regulator
PLLA
PLLB
RC
12/8/4 M
PMC
JTAG &
Serial
Wire
Flash
Unique
Identifier
In-Circuit Emulator
XIN
XOUT
3-20
MHz
Osc.
SUPC
24-Bit
N
Cortex-M3 Processor
SysTick Counter
V
Fmax 64 MHz
I
C
MPU
I/D
XIN32
XOUT32
ERASE
FLASH
256 KBytes
128 KBytes
64 KBytes
VD
DI
JT
AG
SRAM
48 KBytes
32 KBytes
16 KBytes
ROM
16 KBytes
OSC
32K
RC
32k
8
GPBREG
S
4-layer AHB Bus Matrix Fmax 64 MHz
VDDIO
VDDCORE
VDDPLL
NRST
WDT
RTT
RTC
Peripheral
Bridge
Transceiver
POR
RSTC
2668 USB 2.0
Bytes Full
FIFO Speed
DDP
DDM
SM
PIOA / PIOB
TWCK0
TWD0
TWCK1
TWD1
TWI0
TWI1
PDC
PDC
PDC
PDC
PDC
PIO
PIODC[7:0]
PIODCEN1
PIODCEN2
PIODCCLK
URXD0
UTXD0
URXD1
UTXD1
RXD0
TXD0
SCK0
RTS0
CTS0
RXD1
TXD1
SCK1
RTS1
CTS1
DSR1
DTR1
RI1
DCD1
TCLK[0:2]
TIOA[0:2]
TIOB[0:2]
PWMH[0:3]
PWML[0:3]
PWMFI0
ADTRG
AD[0..8]
ADVREF
DAC0
DAC1
DATRG
UART0
UART1
PDC
SPI
USART0
PDC
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TF
TK
TD
RD
RK
RF
USART1
PDC
Timer Counter A
TC[0..2]
PDC
SSC
PDC
High
Speed
MCI
PDC
MCCK
MCCDA
MCDA[0..3]
PWM
Temp.
Sensor
ADC
PDC
Analog
Comparator
ADC
DAC
Temp
Sensor
ADVREF
DAC
PDC
CRC Unit
4
SAM3S Summary
6500CS–ATARM–24-Jan-11
SAM3S Summary
Figure 2-3.
SAM3S 48-pin Version Block Diagram
I
TD
O
TM
S
/
TC
S
W
K/ DIO
S
W
CL
K
JT
AG
S
E
L
O
UT
VD
D
IN
TST
PCK0-PCK2
System
Controller
TD
Voltage
Regulator
PLLA
PLLB
RC
12/8/4 M
PMC
JTAG &
Serial
Wire
Flash
Unique
Identifier
In-Circuit Emulator
XIN
XOUT
3-20
MHz
Osc.
SUPC
Cortex-M3 Processor
Fmax 64 MHz
MPU
24-Bit
SysTick
Counter
N
V
I
C
XIN32
XOUT32
ERASE
FLASH
256 KBytes
128 KBytes
64 KBytes
VD
D
SRAM
48 KBytes
32 KBytes
16 KBytes
ROM
16 KBytes
OSC
32K
RC
32k
8
GPBREG
I/D
S
4-layer AHB Bus Matrix Fmax 64 MHz
VDDIO
VDDCORE
VDDPLL
RTT
RTC
Peripheral
Bridge
Transceiver
POR
RSTC
WDT
SM
2668 USB 2.0
Bytes Full
FIFO Speed
DDP
DDM
PIOA / PIOB
TWCK0
TWD0
TWI0
PDC
PDC
NPCS0
NPCS1
NPCS2
NPCS3
MISO
MOSI
SPCK
TWCK1
TWD1
TWI1
PDC
SPI
URXD0
UTXD0
URXD1
UTXD1
RXD0
TXD0
SCK0
RTS0
CTS0
UART0
PDC
UART1
PDC
PDC
TF
TK
TD
RD
RK
RF
USART0
SSC
PDC
TCLK[0:2]
TIOA[0:2]
TIOB[0:2]
Timer Counter A
TC[0..2]
Analog
Comparator
ADC
Temp
Sensor
ADVREF
PWMH[0:3]
PWML[0:3]
PWMFI0
PWM
PDC
CRC Unit
ADTRG
AD[0..7]
ADVREF
Temp.
Sensor
ADC
PDC
5
6500CS–ATARM–24-Jan-11
