AUTOMOTIVE GRADE
Features
l
l
l
l
l
l
l
AUIRFS8408
AUIRFSL8408
HEXFET
®
Power MOSFET
V
DSS
R
DS(on)
typ.
max.
I
D (Silicon Limited)
I
D (Package Limited)
40V
1.3m
Ω
1.6m
Ω
317A
195A
Advanced Process Technology
New Ultra Low On-Resistance
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
c
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features
of this design are a 175°C junction operating temperature, fast
switching speed and improved repetitive avalanche rating. These
features combine to make this product an extremely efficient and
reliable device for use in Automotive and wide variety of other
applications.
D
D
D
G
S
S
G
G
D
S
Applications
l
l
l
l
l
Electric Power Steering (EPS)
Battery Switch
Start/Stop Micro Hybrid
Heavy Loads
SMPS
Package Type
TO-262
D
2
Pak
Standard Pack
Form
Tube
Tube
Tape and Reel Left
Tape and Reel Right
D
2
Pak
AUIRFS8408
TO-262
AUIRFSL8408
G
D
S
Gate
Drain
Source
Ordering Information
Base part number
AUIRFSL8408
AUIRFS8408
Complete Part Number
Quantity
50
50
800
800
AUIRFSL8408
AUIRFS8408
AUIRFS8408TRL
AUIRFS8408TRR
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and
functional operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-
maximum-rated conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under
board mounted and still air conditions. Ambient temperature (T
A
) is 25°C, unless otherwise specified.
Symbol
I
D
@ T
C
= 25°C
I
D
@ T
C
= 100°C
I
D
@ T
C
= 25°C
I
DM
P
D
@T
C
= 25°C
V
GS
T
J
T
ST G
Parameter
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Silicon Limited)
Continuous Drain Current, V
GS
@ 10V (Package Limited)
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
d
224
195
1270
l
317
294
1.96
± 20
-55 to + 175
Max.
Units
A
W
W/°C
V
°C
300
490
800
See Fig. 14, 15, 24a, 24b
Avalanche Characteristics
E
AS (T hermall y l imi ted)
E
AS (tested)
I
AR
E
AR
Single Pulse Avalanche Energy
e
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
d
Ãe
mJ
A
mJ
Thermal Resistance
Symbol
R
θ
JC
R
θ
JA
Junction-to-Case
d
Parameter
Junction-to-Ambient (PCB Mount)
k
Typ.
Max.
0.51
40
Units
°C/W
j
–––
–––
HEXFET
®
is a registered trademark of International Rectifier.
*Qualification
standards can be found at http://www.irf.com/
1
www.irf.com
©
2013 International Rectifier
April 25, 2013
AUIRFS/SL8408
Static @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
Drain-to-Source Breakdown Voltage
V
(BR)DSS
ΔV
(BR)DSS
/ΔT
J
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
R
DS(on)
V
GS(th)
Gate Threshold Voltage
Drain-to-Source Leakage Current
I
DSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
R
G
Dynamic @ T
J
= 25°C (unless otherwise specified)
Symbol
Parameter
gfs
Forward Transconductance
Total Gate Charge
Q
g
Gate-to-Source Charge
Q
gs
Q
gd
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Q
g
- Q
gd
)
Q
sync
Turn-On Delay Time
t
d(on)
Rise Time
t
r
Turn-Off Delay Time
t
d(off)
Fall Time
t
f
Input Capacitance
C
iss
Output Capacitance
C
oss
Reverse Transfer Capacitance
C
rss
C
oss
eff. (ER)
Effective Output Capacitance (Energy Related)
C
oss
eff. (TR)
Effective Output Capacitance (Time Related)
Diode Characteristics
Symbol
Parameter
Continuous Source Current
I
S
(Body Diode)
Pulsed Source Current
I
SM
(Body Diode)
V
SD
Diode Forward Voltage
dv/dt
Peak Diode Recovery
Reverse Recovery Time
t
rr
I
GSS
Min.
40
–––
–––
2.2
–––
–––
–––
–––
–––
Min.
211
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Min.
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.032
1.3
3.0
–––
–––
–––
–––
2.1
Typ.
–––
216
51
77
139
29
202
108
119
10820
1540
1140
1880
2208
Typ.
–––
–––
0.9
5.0
38
37
50
50
1.9
Max.
–––
–––
1.6
3.9
1.0
150
100
-100
–––
Max.
–––
324
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Max.
317
Units
V
V/°C
mΩ
V
μA
nA
Ω
Conditions
V
GS
= 0V, I
D
= 250μA
Reference to 25°C, I
D
= 5mA
V
GS
= 10V, I
D
= 100A
V
DS
= V
GS
, I
D
= 250μA
V
DS
= 40V, V
GS
= 0V
V
DS
= 40V, V
GS
= 0V, T
J
= 125°C
V
GS
= 20V
V
GS
= -20V
d
Units
Conditions
V
DS
= 10V, I
D
= 100A
S
I
D
= 100A
V
DS
=20V
nC
V
GS
= 10V
I
D
= 100A, V
DS
=0V, V
GS
= 10V
V
DD
= 26V
I
D
= 100A
ns
R
G
= 2.4Ω
V
GS
= 10V
V
GS
= 0V
V
DS
= 25V
pF ƒ = 1.0 MHz, See Fig. 5
V
GS
= 0V, V
DS
=0V to 32V See Fig. 11
V
GS
= 0V, V
DS
= 0V to 32V
g
g
h
i
c
l
Units
c
1270
1.3
–––
–––
–––
–––
–––
–––
f
Q
rr
I
RRM
Reverse Recovery Charge
Reverse Recovery Current
Conditions
MOSFET symbol
showing the
A
G
integral reverse
p-n junction diode.
T
J
= 25°C, I
S
= 100A, V
GS
= 0V
V
V/ns T
J
= 175°C, I
S
= 100A, V
DS
= 40V
T
J
= 25°C
V
R
= 34V,
ns
I
F
= 100A
T
J
= 125°C
T
J
= 25°C
di/dt = 100A/μs
nC
T
J
= 125°C
A
T
J
= 25°C
D
g
S
Notes:
Calculated continuous current based on maximum allowable
junction temperature. Bond wire current limit is 195A by source
bonding technology . Note that current limitations arising from
heating of the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by T
Jmax
, starting T
J
= 25°C, L = 0.099mH, R
G
= 50Ω,
I
AS
= 100A, V
GS
=10V. Part not recommended for use above
this value.
I
SD
≤
100A, di/dt
≤
1307A/µs, V
DD
≤
V
(BR)DSS
, T
J
≤
175°C.
Pulse width
≤
400µs; duty cycle
≤
2%.
C
oss
eff. (TR) is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
C
oss
eff. (ER) is a fixed capacitance that gives the same energy as
C
oss
while V
DS
is rising from 0 to 80% V
DSS
.
When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques
refer to application note #AN-994.
R
θ
is measured at T
J
approximately 90°C.
Pulse drain current is limited by source bonding technology.
2
www.irf.com
©
2013 International Rectifier
April 25, 2013
AUIRFS/SL8408
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
1000
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
ID, Drain-to-Source Current (A)
100
BOTTOM
ID, Drain-to-Source Current (A)
100
BOTTOM
10
4.5V
10
1
4.5V
≤
60μs
PULSE WIDTH
Tj = 25°C
0.1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
≤
60μs
PULSE WIDTH
Tj = 175°C
1
0.1
1
10
100
V DS, Drain-to-Source Voltage (V)
Fig 1.
Typical Output Characteristics
1000
RDS(on) , Drain-to-Source On Resistance
(Normalized)
Fig 2.
Typical Output Characteristics
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
ID = 100A
VGS = 10V
ID, Drain-to-Source Current (A)
100
T J = 175°C
10
TJ = 25°C
1
VDS = 10V
≤60μs
PULSE WIDTH
0.1
2
4
6
8
10
-60
-20
20
60
100
140
180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature (°C)
Fig 3.
Typical Transfer Characteristics
1000000
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
Fig 4.
Normalized On-Resistance vs. Temperature
14.0
VGS, Gate-to-Source Voltage (V)
12.0
10.0
8.0
6.0
4.0
2.0
0.0
ID= 100A
VDS = 32V
VDS = 20V
100000
C, Capacitance (pF)
10000
Ciss
Crss
Coss
1000
100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
0
50
100
150
200
250
300
QG, Total Gate Charge (nC)
Fig 5.
Typical Capacitance vs. Drain-to-Source Voltage
3
www.irf.com
©
2013 International Rectifier
Fig 6.
Typical Gate Charge vs. Gate-to-Source Voltage
April 25, 2013
AUIRFS/SL8408
1000
10000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
100
T J = 175°C
1000
100μsec
100
Limited By Package
1msec
10
T J = 25°C
10
10msec
1
VGS = 0V
0.1
0.0
0.5
1.0
1.5
2.0
2.5
VSD, Source-to-Drain Voltage (V)
1
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
1
10
DC
0.1
100
VDS, Drain-to-Source Voltage (V)
Fig 7.
Typical Source-Drain Diode
Forward Voltage
350
300
ID, Drain Current (A)
Fig 8.
Maximum Safe Operating Area
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
50
49
48
47
46
45
44
43
42
41
40
-60
-20
20
60
100
140
180
T J , Temperature ( °C )
Id = 5.0mA
Limited By Package
250
200
150
100
50
0
25
50
75
100
125
150
175
T C , Case Temperature (°C)
Fig 9.
Maximum Drain Current vs.
Case Temperature
1.6
1.4
1.2
Fig 10.
Drain-to-Source Breakdown Voltage
2500
EAS , Single Pulse Avalanche Energy (mJ)
2000
ID
TOP
25A
52A
BOTTOM 100A
Energy (μJ)
1.0
0.8
0.6
0.4
0.2
0.0
-5
0
5
10 15 20 25 30 35 40 45
1500
1000
500
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
VDS, Drain-to-Source Voltage (V)
Fig 11.
Typical C
OSS
Stored Energy
4
www.irf.com
©
2013 International Rectifier
Fig 12.
Maximum Avalanche Energy vs. DrainCurrent
April 25, 2013
AUIRFS/SL8408
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.1
0.20
0.10
0.05
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-005
0.0001
0.001
0.01
0.1
0.01
0.001
0.0001
1E-006
t1 , Rectangular Pulse Duration (sec)
Fig 13.
Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Duty Cycle = Single Pulse
Avalanche Current (A)
100
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔTj
= 150°C and
Tstart =25°C (Single Pulse)
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming
ΔΤ
j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
tav (sec)
1.0E-03
1.0E-02
1.0E-01
Fig 14.
Typical Avalanche Current vs.Pulsewidth
600
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
Notes on Repetitive Avalanche Curves , Figures 14, 15
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of T
jmax
. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asT
jmax
is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 24a, 24b.
4. P
D (ave)
= Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. I
av
= Allowable avalanche current.
7.
ΔT
=
Allowable rise in junction temperature, not to exceed T
jmax
(assumed as
25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see Figures 13)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) =
DT/
Z
thJC
I
av
= 2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
Fig 15.
Maximum Avalanche Energy vs. Temperature
5
www.irf.com
©
2013 International Rectifier
April 25, 2013
EAR , Avalanche Energy (mJ)