Intel® Core™2 Duo Mobile
Processor, Intel® Core™2 Solo
Mobile Processor and Intel® Core™2
Extreme Mobile Processor on 45-nm
Process
Datasheet
For platforms based on Mobile Intel® 4 Series Express Chipset Family
March 2009
Document Number: 320120-004
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR
OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS
OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING
TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE,
MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE
FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR.
Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics
of any features or instructions marked “reserved” or “undefined.” Intel reserves these for future definition and shall have no responsibility whatsoever for
conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with
this information.
The products described in this document may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
Φ
64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications
enabled for IntelÆ 64 architecture. Performance will vary depending on your hardware and software configurations. Consult with your system vendor for
more information.
Enhanced Intel SpeedStep® Technology for specified units of this processor are available. See the Processor Spec Finder at http://
processorfinder.intel.com or contact your Intel representative for more information.
Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting operating system. Check
with your PC manufacturer on whether your system delivers Execute Disable Bit functionality.
Φ
Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM) and, for some
uses, certain platform software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software configurations
and may require a BIOS update. Software applications may not be compatible with all operating systems. Please check with your application vendor.
Intel, Pentium, Centrino, Intel Core Duo, Intel SpeedStep, MMX and the Intel logo are trademarks of Intel Corporation in the U.S. and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © 2008-2009, Intel Corporation. All rights reserved.
2
Datasheet
Contents
1
Introduction
.............................................................................................................. 7
1.1
Terminology ....................................................................................................... 8
1.2
References ......................................................................................................... 9
Low Power Features
................................................................................................ 11
2.1
Clock Control and Low-Power States .................................................................... 11
2.1.1 Core Low-Power State Descriptions........................................................... 13
2.1.1.1 Core C0 State........................................................................... 13
2.1.1.2 Core C1/AutoHALT Powerdown State ........................................... 13
2.1.1.3 Core C1/MWAIT Powerdown State ............................................... 14
2.1.1.4 Core C2 State........................................................................... 14
2.1.1.5 Core C3 State........................................................................... 14
2.1.1.6 Core C4 State........................................................................... 14
2.1.1.7 Core Deep Power Down Technology (Code Name C6) State ............ 15
2.1.2 Package Low-power State Descriptions...................................................... 15
2.1.2.1 Normal State............................................................................ 15
2.1.2.2 Stop-Grant State ...................................................................... 15
2.1.2.3 Stop-Grant Snoop State............................................................. 16
2.1.2.4 Sleep State .............................................................................. 16
2.1.2.5 Deep Sleep State ...................................................................... 16
2.1.2.6 Deeper Sleep State ................................................................... 17
2.2
Enhanced Intel SpeedStep® Technology .............................................................. 19
2.3
Extended Low-Power States................................................................................ 20
2.4
FSB Low Power Enhancements ............................................................................ 21
2.4.1 Dynamic FSB Frequency Switching ........................................................... 21
2.4.2 Enhanced Intel® Dynamic Acceleration Technology .................................... 22
2.5
VID-x .............................................................................................................. 23
2.6
Processor Power Status Indicator (PSI-2) Signal .................................................... 23
Electrical Specifications
........................................................................................... 25
3.1
Power and Ground Pins ...................................................................................... 25
3.2
Decoupling Guidelines ........................................................................................ 25
3.2.1 VCC Decoupling...................................................................................... 25
3.2.2 FSB AGTL+ Decoupling ........................................................................... 25
3.2.3 FSB Clock (BCLK[1:0]) and Processor Clocking ........................................... 25
3.3
Voltage Identification and Power Sequencing ........................................................ 26
3.4
Catastrophic Thermal Protection .......................................................................... 29
3.5
Reserved and Unused Pins.................................................................................. 29
3.6
FSB Frequency Select Signals (BSEL[2:0])............................................................ 29
3.7
FSB Signal Groups............................................................................................. 30
3.8
CMOS Signals ................................................................................................... 31
3.9
Maximum Ratings.............................................................................................. 31
3.10 Processor DC Specifications ................................................................................ 32
Package Mechanical Specifications and Pin Information
.......................................... 51
4.1
Package Mechanical Specifications ....................................................................... 51
4.2
Processor Pinout and Pin List .............................................................................. 59
4.3
Alphabetical Signals Reference ............................................................................ 93
Thermal Specifications and Design Considerations
................................................ 101
5.1
Monitoring Die Temperature ............................................................................. 108
5.1.1 Thermal Diode ..................................................................................... 108
5.1.2 Intel® Thermal Monitor......................................................................... 109
2
3
4
5
Datasheet
3
5.2
5.3
5.1.3 Digital Thermal Sensor .......................................................................... 111
Out of Specification Detection............................................................................ 112
PROCHOT# Signal Pin ...................................................................................... 112
Figures
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Core Low-Power States .............................................................................................12
Package Low-Power States ........................................................................................13
Dynamic FSB Frequency Switching Protocol..................................................................22
Active VCC and ICC Loadline for Standard Voltage, Low-Power SV (25 W) and Dual-Core,
Extreme Edition Processors ........................................................................................43
Deeper Sleep VCC and ICC Loadline for Standard-Voltage, Low-Power SV (25 W) and Dual-
Core Extreme Edition Processors ................................................................................44
Deeper Sleep VCC and ICC Loadline for Low-Power Standard-Voltage Processors ..............45
Active VCC and ICC Loadline for Low-Voltage, Ultra-Low-Voltage and Power Optimized
Performance Processor ..............................................................................................46
Deeper Sleep VCC and ICC Loadline for Low-Voltage, Ultra-Low-Voltage and Power Optimized
Performance Processor ..............................................................................................47
6-MB and 3-MB on 6-MB Die Micro-FCPGA Package Drawing (Sheet 1 of 2) ......................52
3-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) ...................................53
3-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2)...................................54
3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 1 of 2) ..................................55
3-MB Die Micro-FCBGA Processor Package Drawing (Sheet 2 of 2) ..................................56
Intel Core 2 Duo Mobile Processor (POP and LV) Die Micro-FCBGA Processor Package
Drawing ..................................................................................................................57
Intel Core 2 Duo Mobile Processor (ULV SC and ULV DC) Die Micro-FCBGA Processor Package
Drawing ..................................................................................................................58
Processor Pinout (Top Package View, Left Side) ............................................................59
Processor Pinout (Top Package View, Right Side) ..........................................................60
Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Left Side .....................80
Intel Core 2 Duo Mobile Processor in SFF Package Top View Upper Right Side ...................81
Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Left Side .....................82
Intel Core 2 Duo Mobile Processor in SFF Package Top View Lower Right Side ...................83
Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Coordination of Core Low-Power States at the Package Level..........................................13
Voltage Identification Definition ..................................................................................26
BSEL[2:0] Encoding for BCLK Frequency......................................................................29
FSB Pin Groups ........................................................................................................30
Processor Absolute Maximum Ratings..........................................................................31
Voltage and Current Specifications for the Dual-Core, Extreme Edition Processors .............32
Voltage and Current Specifications for the Dual-Core, Standard-Voltage Processors ...........34
Voltage and Current Specifications for the Dual-Core, Low-Power Standard-Voltage Processors
(25 W) in Standard Package ......................................................................................35
Voltage and Current Specifications for the Dual-Core, Power Optimized Performance (25 W)
SFF Processors.........................................................................................................37
Voltage and Current Specifications for the Dual-Core, Low-Voltage SFF Processor .............38
Voltage and Current Specifications for the Dual-Core, Ultra-Low-Voltage SFF Processor .....40
Voltage and Current Specifications for the Ultra-Low-Voltage, Single-Core
(5.5 W) SFF Processor...............................................................................................41
AGTL+ Signal Group DC Specifications ........................................................................48
CMOS Signal Group DC Specifications..........................................................................49
Open Drain Signal Group DC Specifications ..................................................................49
4
Datasheet
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin Name Listing ...................................................................................................... 61
Pin # Listing............................................................................................................ 72
Intel Core 2 Duo Mobile Processor in SFF Package Listing by Ball Name ........................... 84
Signal Description .................................................................................................... 93
Power Specifications for the Dual-Core Extreme Edition Processor................................. 101
Power Specifications for the Dual-Core Standard Voltage Processor............................... 102
Power Specifications for the Dual-Core Low Power Standard Voltage Processors (25 W) in
Standard Package .................................................................................................. 103
Power Specifications for the Dual-Core Power Optimized Performance (25 W) SFF
Processors ............................................................................................................ 104
Power Specifications fro the Dual-Core Low Voltage (LV) SFF Processors ....................... 105
Power Specifications for the Dual-Core Ultra-Low-Voltage (ULV) Processors ................... 106
Power Specifications for the Single-Core Ultra-Low-Voltage (5.5 W) SFF Processors ........ 107
Thermal Diode Interface ......................................................................................... 108
Thermal Diode Parameters Using Transistor Model...................................................... 109
Datasheet
5
