AVR- H128 development board
Users Manual
All boards produced by Olimex are ROHS compliant
Rev.A, June 2009
Copyright(c) 2009, OLIMEX Ltd, All rights reserved
INTRODUCTION
AVR-H128 is inexpensive way to develop and prototype circuits with ATMEGA128
microcontroller without need to deal with SMD soldering. All microcontroller pins
are available on extension header with 0.1" and power supply, oscillators, ICSP,
JTAG are wired, so all you need to do is to connect your additional components to
the AVR ports, as the step is 0.1" these headers perfectly fit the prototype sea of pad
boards with 0.1" step.
BOARD FEATURES
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ATMega128-16AU microcontroller with 128 KB Flash, 4KB RAM, 4 KB
EEPROM
ICSP 5x2 pin connector for in-circuit programming with AVR-PG1 or AVR-PG2
JTAG 5x2 pin connector for in-circuit debugging with AVR-JTAG or AVR-
JTAG-USB
16MHz scillator circuit
32768 Hz oscillator circuit
Reset IC ZM33064
+5V voltage regulator LM78L05
power supply filtering capacitors
extension pin headers for each uC pin
FR-4, 1.5 mm (0,062"), green soldermask, white silkscreen component print
dimensions 47x47 mm (1.85x1.85")
ELECTROSTATIC WARNING
The AVR-H128 board is shipped in protective anti-static packaging. The board must
not be subject to high electrostatic potentials. General practice for working with
static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS
Cables:
The cable you will need depends on the programmer/debugger you use. If
you use AVR-JTAG or AVR-PG1 you will need RS232, if you use AVR-USB-JTAG
or AVR-ISP500/TINY/ISO you will need 1.8 m A-B USB cable, if you use AVR-
PG2, you will need LPT cable.
Hardware:
One of OLIMEX Programmers/Debuggers –
AVR-JTAG, AVR-USB-
JTAG, AVR-ISP500, AVR-ISP500-TINY, AVR-ISP500-ISO, AVR-PG1, AVR-PG2.
Software:
AVR C compiler.
PROCESSOR FEATURES
AVR-H128
board use High-performance, Low-power AVR® 8-bit Microcontroller –
Atmega128 from Atmel Corporation with these features:
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Advanced RISC Architecture
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133 Powerful Instructions – Most Single Clock Cycle Execution
32 x 8 General Purpose Working Registers + Peripheral Control
Registers
Fully Static Operation
Up to 16 MIPS Throughput at 16 MHz
On-chip 2-cycle Multiplier
128K Bytes of In-System Self-programmable Flash program memory
4K Bytes EEPROM
4K Bytes Internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data retention: 20 years at 85°C/100 years at 25°C
Optional Boot Code Section with Independent Lock Bits In-System
Programming by On-chip Boot Program True Read-While-Write
Operation
Up to 64K Bytes Optional External Memory Space
Programming Lock for Software Security
SPI Interface for In-System Programming
Boundary-scan Capabilities According to the JTAG Standard
Extensive On-chip Debug Support
Programming of Flash, EEPROM, Fuses and Lock Bits through the
JTAG Interface
Two 8-bit Timer/Counters with Separate Prescalers and Compare
Modes
Two Expanded 16-bit Timer/Counters with Separate Prescaler,
Compare Mode and Capture Mode
Real Time Counter with Separate Oscillator
Two 8-bit PWM Channels
6 PWM Channels with Programmable Resolution from 2 to 16 Bits
Output Compare Modulator
8-channel, 10-bit ADC
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High Endurance Non-volatile Memory segments
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JTAG (IEEE std. 1149.1 Compliant) Interface
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Peripheral Features
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7 Differential Channels
8 Single-ended Channels
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2 Differential Channels with Programmable Gain at 1x, 10x, or 200x
Byte-oriented Two-wire Serial Interface
Dual Programmable Serial USARTs
Master/Slave SPI Serial Interface
Programmable Watchdog Timer with On-chip Oscillator
On-chip Analog Comparator
Power-on Reset and Programmable Brown-out Detection
Internal Calibrated RC Oscillator
External and Internal Interrupt Sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-
down, Standby, and Extended Standby
Software Selectable Clock Frequency
ATmega103 Compatibility Mode Selected by a Fuse
Global Pull-up Disable
4.5 - 5.5V
0 - 16 MHz
Special Microcontroller Features
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Operating Voltages
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Speed Grades
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BLOCK DIAGRAM
