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AXDA2600DLV3D

RISC Microprocessor, 32-Bit, 2133MHz, CMOS, CPGA348

器件类别:嵌入式处理器和控制器    微控制器和处理器   

厂商名称:AMD(超微)

厂商官网:http://www.amd.com

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器件参数
参数名称
属性值
Objectid
1155508100
零件包装代码
PGA
针数
348
Reach Compliance Code
compliant
YTEOL
2
位大小
32
JESD-30 代码
S-XPGA-P348
端子数量
348
封装主体材料
CERAMIC
封装代码
PGA
封装等效代码
SPGA348,37X37
封装形状
SQUARE
封装形式
GRID ARRAY
认证状态
Not Qualified
速度
2133 MHz
最大压摆率
41400 mA
标称供电电压
1.5 V
表面贴装
NO
技术
CMOS
端子形式
PIN/PEG
端子节距
1.27 mm
端子位置
PERPENDICULAR
uPs/uCs/外围集成电路类型
MICROPROCESSOR, RISC
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Preliminary Information
AMD Athlon XP
Processor Model 8
ssor
Data Sheet
TM
Publication #
25175
Rev.
F
Issue Date:
December 2002
Preliminary Information
© 2001, 2002 Advanced Micro Devices, Inc.
All rights reserved.
The contents of this document are provided in connection with Advanced
Micro Devices, Inc. (“AMD”) products. AMD makes no representations or war-
ranties with respect to the accuracy or completeness of the contents of this
publication and reserves the right to make changes to specifications and prod-
uct descriptions at any time without notice. No license, whether express,
implied, arising by estoppel or otherwise, to any intellectual property rights is
granted by this publication. Except as set forth in AMD’s Standard Terms and
Conditions of Sale, AMD assumes no liability whatsoever, and disclaims any
express or implied warranty, relating to its products including, but not limited
to, the implied warranty of merchantability, fitness for a particular purpose,
or infringement of any intellectual property right.
AMD’s products are not designed, intended, authorized or warranted for use
as components in systems intended for surgical implant into the body, or in
other applications intended to support or sustain life, or in any other applica-
tion in which the failure of AMD’s product could create a situation where per-
sonal injury, death, or severe property or environmental damage may occur.
AMD reserves the right to discontinue or make changes to its products at any
time without notice.
Trademarks
AMD, the AMD Arrow logo, AMD Athlon, AMD Duron, and combinations thereof, QuantiSpeed, and 3DNow!
are trademarks of Advanced Micro Devices, Inc.
HyperTransport is a licensed trademark of the HyperTransport Technology Consortium.
MMX is a trademark of Intel Corporation.
Windows is a registered trademark of Microsoft Corporation.
Other product names used in this publication are for identification purposes only and may be trademarks of
their respective companies.
Preliminary Information
25175F—December 2002
AMD Athlon™ XP Processor Model 8 Data Sheet
Contents
1
2
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1
QuantiSpeed™ Architecture Summary. . . . . . . . . . . . . . . . . . . 2
Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
2.2
2.3
2.4
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Signaling Technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Push-Pull (PP) Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
AMD Athlon™ System Bus Signals . . . . . . . . . . . . . . . . . . . . . . 6
3
4
Logic Symbol Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.1
Power Management States . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Working State. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Halt State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Stop Grant States. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Probe State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connect and Disconnect Protocol . . . . . . . . . . . . . . . . . . . . . . 12
Connect Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Connect State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Clock Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2
4.3
5
6
CPUID Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Advanced 266 Front-Side Bus AMD Athlon XP
Processor Model 8 Specifications . . . . . . . . . . . . . . . . . . . . . . . 21
6.1
6.2
6.3
Part-Specific Electrical and Thermal Specifications for . . . . .
Advanced 266 FSB AMD Athlon XP Processors Model 8 . . . 21
Advanced 266 FSB AMD Athlon XP Processor Model 8
SYSCLK and SYSCLK# AC Characteristics . . . . . . . . . . . . . . 24
Advanced 266 FSB AMD Athlon System Bus
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7
Advanced 333 Front-Side Bus AMD Athlon XP
Processor Model 8 Specifications . . . . . . . . . . . . . . . . . . . . . . . 27
7.1
7.2
7.3
Electrical and Thermal Specifications for the Advanced 333
FSB AMD Athlon XP Processor Model 8 . . . . . . . . . . . . . . . . 27
Advanced 333 FSB AMD Athlon XP Processor Model 8
SYSCLK and SYSCLK# AC Characteristics . . . . . . . . . . . . . . 28
Advanced 333 FSB AMD Athlon System Bus
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8
Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
8.1
8.2
Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Interface Signal Groupings . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table of Contents
iii
Preliminary Information
AMD Athlon™ XP Processor Model 8 Data Sheet
25175F—December 2002
8.3
8.4
8.5
8.6
8.7
8.8
8.9
8.10
8.11
8.12
8.13
8.14
Voltage Identification (VID[4:0]) . . . . . . . . . . . . . . . . . . . . . . 33
Frequency Identification (FID[3:0]) . . . . . . . . . . . . . . . . . . . . 33
VCCA AC and DC Characteristics . . . . . . . . . . . . . . . . . . . . . . 33
Decoupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
V
CC_CORE
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Absolute Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
SYSCLK and SYSCLK# DC Characteristics . . . . . . . . . . . . . . 37
AMD Athlon System Bus DC Characteristics . . . . . . . . . . . . . 38
General AC and DC Characteristics . . . . . . . . . . . . . . . . . . . . 39
Open-Drain Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Thermal Diode Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 42
Thermal Diode Electrical Characteristics. . . . . . . . . . . . . 42
Thermal Protection Characterization . . . . . . . . . . . . . . . . 43
APIC Pins AC and DC Characteristics . . . . . . . . . . . . . . . . . . 44
9
Signal and Power-Up Requirements . . . . . . . . . . . . . . . . . . . . 45
9.1
Power-Up Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Signal Sequence and Timing Description . . . . . . . . . . . . . 45
Clock Multiplier Selection (FID[3:0]) . . . . . . . . . . . . . . . . 48
Processor Warm Reset Requirements. . . . . . . . . . . . . . . . . . . 48
Northbridge Reset Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
9.2
10
Mechanical Data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
10.1
10.2
10.3
10.4
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Die Loading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
OPGA Package Dimensions of AMD Athlon XP
Processors Model 8 with a CPUID of 680 . . . . . . . . . . . . . . . . 50
OPGA Package Dimensions of AMD Athlon XP
Processors Model 8 with a CPUID of 681 . . . . . . . . . . . . . . . . 51
11
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
11.1
11.2
11.3
Pin Diagram and Pin Name Abbreviations. . . . . . . . . . . . . . . 53
Pin List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Detailed Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
A20M# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
AMD Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
AMD Athlon System Bus Pins . . . . . . . . . . . . . . . . . . . . . . 70
Analog Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
APIC Pins, PICCLK, PICD[1:0]# . . . . . . . . . . . . . . . . . . . . 70
CLKFWDRST Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
CLKIN, RSTCLK (SYSCLK) Pins. . . . . . . . . . . . . . . . . . . . 70
CONNECT Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
COREFB and COREFB# Pins . . . . . . . . . . . . . . . . . . . . . . . 71
CPU_PRESENCE# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
DBRDY and DBREQ# Pins . . . . . . . . . . . . . . . . . . . . . . . . . 71
FERR Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
FID[3:0] Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72
FSB_Sense[1:0] Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
iv
Table of Contents
Preliminary Information
25175F—December 2002
AMD Athlon™ XP Processor Model 8 Data Sheet
FLUSH# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
IGNNE# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
INIT# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
INTR Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
JTAG Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
K7CLKOUT and K7CLKOUT# Pins . . . . . . . . . . . . . . . . . . 74
Key Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
NC Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
NMI Pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
PGA Orientation Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
PLL Bypass and Test Pins . . . . . . . . . . . . . . . . . . . . . . . . . . 74
PWROK Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
SADDIN[1:0]# and SADDOUT[1:0]# Pins . . . . . . . . . . . . . 75
Scan Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
SMI# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
STPCLK# Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
SYSCLK and SYSCLK#. . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
THERMDA and THERMDC Pins . . . . . . . . . . . . . . . . . . . . 75
VCCA Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
VID[4:0] Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
VREFSYS Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
ZN and ZP Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
12
Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Standard AMD Athlon XP Processor Model 8 Products . . . . . . . . . . 77
Appendix A Thermal Diode Calculations . . . . . . . . . . . . . . . . . . . . . 79
Ideal Diode Equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
Temperature Offset Correction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
Appendix B Conventions and Abbreviations . . . . . . . . . . . . . . . . . . 83
Signals and Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
Data Terminology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
Abbreviations and Acronyms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Related Publications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Table of Contents
v
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