Multilayer ceramic capacitors
Chip capacitors, X8R
Date:
October 2006
Data Sheet
ã
EPCOS AG 2006. Reproduction, publication and dissemination of this data sheet and the
information contained therein without EPCOS’ prior express consent is prohibited.
Multilayer ceramic capacitors
X8R
Ordering code system
Chip
B37541
K
5
102
K
0
60
Packaging
60
62
70
72
^
^
^
^
cardboard tape, 180-mm reel
blister tape, 180-mm reel
cardboard tape, 330-mm reel
blister tape, 330-mm reel
Internal coding
Capacitance tolerance
J
^
±
5%
K
^
±
10% (standard)
M
^
±
20%
Capacitance,
coded
(example)
102
^
10 · 10
2
pF = 1 nF
103
^
10 · 10
3
pF = 10 nF
Rated voltage
Rated voltage [VDC]
Code
50
5
Termination
Standard:
On request:
K
^
nickel barrier for all case sizes
J
^
silver-palladium for conductive adhesion for all case sizes
Type and size
Chip size
(inch / mm)
0603
/ 1608
0805
/ 2012
1206
/ 3216
1210
/ 3225
Temperature characteristic
X8R
B37540
B37541
B37472
B37550
Please read
Cautions and warnings
and
Important notes
at the end of this document.
2
10/06
Multilayer ceramic capacitors
X8R
Features
■
■
■
■
■
Chip
Max. relative capacitance change up to 150
°
C is
±
15%
Non-linear capacitance change
High insulation resistance
High pulse strength
To AEC-Q200
Applications
■
■
■
■
■
Automotive
Blocking
Coupling
Decoupling
Interference suppression
Termination
■
For soldering: Nickel barrier terminations (Ni)
Options
■
Alternative capacitance tolerances available on request
Delivery mode
■
Cardboard and blister tape (blister tape for chip thickness
³
1.2
±
0.1 mm and case size 1210)
180-mm and 330-mm reel available
Electrical data
Temperature characteristic
Max. relative capacitance change
within –55
°
C to +150
°
C
Climatic category (IEC 60068-1)
Standard
Dielectric
Rated voltage
1)
Test voltage
Capacitance range / E series
Dissipation factor (limit value)
Insulation resistance
2)
at + 25
°
C
Insulation resistance
2)
at +125
°
C
Time constant
2)
at + 25
°
C
Time constant
2)
at +125
°
C
Operating temperature range
Ageing
3)
X8R
D
C/C
V
R
V
test
C
R
tan
d
R
ins
R
ins
t
t
T
op
±
15
55/150/56
EIA
Class 2
50
2.5 · V
R
/5 s
100 pF … 150 nF (E6)
<25 · 10
–3
>10
5
>10
4
>1000
>100
–55 … +150
yes
%
VDC
VDC
M
W
M
W
s
s
°
C
1) Note: No operation on AC line.
2) For C
R
>10 nF the time constant
t
= C · R
ins
is given.
3) Refer to chapter “General technical information”, “Ageing”.
Please read
Cautions and warnings
and
Important notes
at the end of this document.
3
10/06
X8R
Multilayer ceramic capacitors
X8R
Capacitance tolerances
Code letter
Tolerance
J
K
M
(standard)
±
5%
±
10%
±
20%
Dimensional drawing
b
s
k
k
KKE0329-N
Dimensions (mm)
Case size
l
b
s
k
(inch)
(mm)
0603
1608
1.6
±
0.15
0.8
±
0.10
0.8
±
0.10
0.1 –0.40
0805
2012
2.00
±
0.20
1.25
±
0.15
1.30 max.
0.13 –0.75
1206
3216
3.2
±
0.20
1.6
±
0.15
1.30 max.
0.25 –0.75
1210
3225
3.2
±
0.30
2.5
±
0.30
1.30 max.
0.25 –0.75
Tolerances to CECC 32101-801
Please read
Cautions and warnings
and
Important notes
at the end of this document.
4
10/06
Multilayer ceramic capacitors
X8R
Recommended solder pad
D
X8R
C
A
KKE0308-1
Recommended dimensions (mm) for reflow soldering
Case size
(inch/mm)
0603/1608
0805/2012
1206/3216
1210/3225
Type
single chip
single chip
single chip
single chip
A
0.6 … 0.7
0.6 … 0.7
0.8 … 0.9
1.0 … 1.2
C
1.8 … 2.20
2.2 … 2.60
3.8 … 4.32
4.0 … 4.80
D
0.6 … 0.8
0.8 … 1.1
1.0 … 1.4
1.8 … 2.3
Recommended dimensions (mm) for wave soldering
Case size
(inch/mm)
0603/1608
0805/2012
1206/3216
Type
single chip
single chip
single chip
A
0.8 … 0.9
0.9 … 1.0
1.0 … 1.1
C
2.2 … 2.8
2.8 … 3.2
4.2 … 4.8
D
0.6 … 0.8
0.8 … 1.1
1.0 … 1.4
Termination
Ceramic body
Termination
(nickel barrier)
Inner electrode
AgPd
Substrate electrode
Intermediate electrode
External electrode
Ag
Ni
Sn
KKE0484-W
Please read
Cautions and warnings
and
Important notes
at the end of this document.
5
10/06
