Sound Processors for Home Theater Systems
6ch
Electronic Volume
BD3814FV
No.10081EAT05
●Description
BD3814FV is a 1-chip sound processor incorporating such functions as volume, bass, and treble, necessary for AV receivers,
home theater systems, and mini-audio systems. This IC adopts the Bi-CMOS process, and realizes low distortion, low noise,
and a wide dynamic range.
●Features
1) Dynamic range: 132dB (tone bypath, VOL = MUTE, IHF-A)
2) Master volume 6ch independent (0 to -95dB, MUTE 1dB/step)
3) Low current consumption design achieved by adopting the BiCMOS process
4) Maximum output voltage: 4.3Vrms (Vcc=7V, VEE=-7V, RL=10kΩ)
5) Built-in 2 OP amplifiers
6) 2-line serial control (for both 3.3V and 5V)
●Applications
AV receivers, home theater systems, mini-audio systems, TVs etc.
●Absolute
maximum ratings (Ta=25℃)
Parameter
Power supply voltage
Input signal voltage
Power dissipation
Operating temperature range
Storage temperature range
Symbol
VCC
VEE
VIN
Pd
Topr
Tastg
Ratings
7.5
*1
-7.5
VCC+0.3 to VEE-0.3
900
*2
-20 to +75
-55 to +125
Unit
V
V
mW
℃
℃
*1 Even in the specified range of Power Supply Voltage, applying voltage only to the VCC side may cause an excessive current
to give a permanent damage to the IC.
When starting up power supplies, VEE and VCC should be powered on simultaneously or VEE first; then followed by VCC.
*2 Reduced by 9 mW/C over 25C, when installed on the standard board (size: 70x70x1.6mm).
●Operating
conditions
Must function normally at Ta=25℃.
Parameter
Operating source voltage
Symbol
VCC
VEE
Ratings
Min.
5
-7.3
Typ.
7
-7
Max.
7.3
-5
Unit
V
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1/10
2010.06 - Rev.A
BD3814FV
Technical Note
●Electrical
characteristics
Ta=25℃, VCC=7V, VEE=-7V, f=1kHz, Vin=1Vrms, RL=10kΩ, Rg=600Ω, Master volume=0dB,
Bass and Treble=0dB unless otherwise noted.
Limits
Parameter
Symbol
Unit.
Conditions
Min.
Typ.
Max.
VCC
Circuit current
VEE
L input current(CL,DA)
IIL
IQ
-17
―
-7
0.5
―
7
17
―
5
mA
No signal
µA
CL=DA=0V
H input current(CL,DA)
IIH
―
0
5
µA
CL=DA=5V
Output voltage gain 1
Gv1
-2
0
2
dB
Measure: Pin27,28,29,30, 31,32
Output voltage gain 2
Total harmonic distortion
ratio 1
Total harmonic distortion
ratio 2
Maximum output voltage 1
Gv2
-2
0
2
dB
Measure: Pin3, 7
Measure: Pin27,28,29,30,31,32
BW=400 ~ 30kHz
Measure: Pin3, 7
BW=400 ~ 30KHz
Measure: Pin27,28,29,30,31,32
THD=1%
Measure: Pin 3,7
THD=1%
Measure: Pin 27, 28
Tone: By-pass, Rg=0Ω, BW=IHF-A
Measure: Pin 27, 28
Tone: ON, Rg=0Ω, BW=IHF-A
Measure: Pin3, 7, 29, 30, 31, 32
Rg=0Ω, BW=IHF-A
Measure: Pin27(OUTFL)
Rg=0Ω, BW=IHF-A
Reference: Pin28(OUTFR)=1Vrms
Measure: Pin28(OUTFR)
Rg=0Ω, BW=IHF-A
Reference: Pin27(OUTFL)=1Vrms
Measure: Pin 30(OUTSL)
Rg=0Ω, BW=IHF-A
Reference: Pin31(OUTSR)=1Vrms
Measure: Pin 31(OUTSR)
Rg=0Ω, BW=IHF-A
Reference: Pin30(OUTSL)=1Vrms
Measure: Pin 32(OUTSW)
Rg=0Ω, BW=IHF-A
Reference: Pin29(OUTC) =1Vrms
THD1
―
0.001
0.03
%
THD2
―
0.001
0.03
%
Total output
Vomax1
3.6
4.3
―
Vrms
Maximum output voltage 2
Vomax2
3.6
―
4.3
1.0
1.7
1.0
―
6.0
10
6.0
Vrms
µVrms
µVrms
µVrms
Output noise voltage 1
Vno1
―
Output noise voltage 2
Cross talk between channels
Rch→Lch
Cross talk between channels
Lch→Rch
Cross talk between channels
SRch→SLch
Cross talk between channels
SLch→SRch
Cross talk between channels
Cch→SWch
Vno2
―
CTCRL
―
-95
-80
dB
CTCLR
―
-95
-80
dB
CTCSRL
―
-95
-80
dB
CTCSLR
―
-95
-80
dB
CTCCSW
―
-95
-80
dB
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2/10
2010.06 - Rev.A
BD3814FV
Technical Note
Parameter
Symbol
Limits
Min.
14
Typ.
20
Max.
26
Unit.
Conditions
Input impedance V
RinV
kΩ
Measure: Pin27,28,29,30,31,32
Measure: Pin27,28,29,30,31,32
Vin=3Vrms
Measure: Pin27,28,29,30, 31,32
0 to –53dB, Vin=3Vrms
Measure: Pin27,28,29,30,31,32
-54 to –95dB,
Vin =3Vrms
Measure: Pin27,28,29,30,31,32
Vin =3Vrms, BW=IHF-A
Measure: Pin27, 28
Tone: By-Pass, Rg=0Ω, BW=IHF-A
Measure: Pin29, 30, 31, 32
Rg=0Ω, BW=IHF-A
Measure: Pin 29(OUTC)
Rg=0Ω, BW=IHF-A
Reference: Pin32(OUTSW)=1Vrms
Measure: Pin 27, 28
f=15kHz, Vin =0.4Vrms
Measure: Pin 27, 28
f=15kHz, Vin =0.4Vrms
Measure: Pin 27, 28
f=15kHz, Vin =0.4Vrms
Measure: Pin 27, 28
f=15kHz, Vin =0.4Vrms
Measure: Pin 27, 28
f=100Hz, Vin=0.4Vrms
Measure: Pin 27, 28
f=100Hz, Vin =0.4Vrms
Measure: Pin 27, 28
f=100Hz, Vin =0.4Vrms
Measure: Pin 27, 28
f=100Hz, Vin =0.4Vrms
Volume control range
GVR
-98
-95
-92
dB
Volume set error 1
Volume output
VE1
-1.5
0
1.5
dB
Volume set error 2
Maximum attenuation
amount
Residual noise voltage 1
VE2
-2.5
0
2.5
dB
Vmin
―
-115
-105
dB
Vnom1
―
1.0
6.0
µVrms
Residual noise voltage 2
Cross talk between channels
SWch→Cch
Treble maximum boost gain
Vnom2
―
1.0
6.0
µVrms
CTCSWC
―
-95
-80
dB
GTB
12
14
16
dB
Treble
Treble maximum cut gain
GTC
-16
-14
-12
dB
Treble step resolution
TR
―
2
―
dB
Treble gain set error
TE
-2
0
2
dB
Bass maximum boost gain
GBB
12
14
16
dB
Bass maximum cut gain
Bass
GBC
-16
-14
-12
dB
Bass step resolution
BR
―
2
―
dB
Bass gain set error
BE
-2
0
2
dB
* Note: This IC is not designed to be radiation-resistant.
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3/10
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BD3814FV
●Timing
chart
1. Signal timing conditions
・Data
is read on the rising edge of the clock.
・Latch
is read on the falling edge of the clock.
・Latch
signal must terminate with the LOW state.
* To avoid malfunctions, clock and data signals must terminate with the LOW state.
Technical Note
CL
(CLOCK)
90%
90%
90%
90%
twc
10%
twc
10%
10%
thd
ts
th
tsd
thd
tsl
thl
DA
DATA
LATCH
90%
twd
90%
twh
10%
10%
90%
90%
twl
90%
DATA
DATA
10%
LATCH
Terminate
with Low.
Fig.1
Parameter
Minimum clock width
Minimum data width
Minimum latch width
LOW hold width
Data setup time (DATA→CLK)
Data hold time (CLK→DATA)
Latch setup time (CLK→LATCH)
Latch hold time (DATA→LATCH)
Latch low setup time
Latch low hold time
Symbol
twc
twd
twl
twh
tsd
thd
tsl
thl
ts
th
Limits
Min.
2.0
2.0
2.0
2.0
1.0
1.0
1.0
1.0
1.0
1.0
Typ.
-
-
-
-
-
-
-
-
-
-
Max.
-
-
-
-
-
-
-
-
-
-
Unit
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
2. Voltage conditions for control signal
Parameter
“H” input voltage
“L” input voltage
Condition
Vcc=5 ~ 7.3V
VEE=-5 ~ -7.3V
Limits
Min.
2.2
0
Typ.
-
-
Max.(≦Vcc)
5.5
1.0
Unit
V
V
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4/10
2010.06 - Rev.A
BD3814FV
3. Basic configuration of control data format
Data input direction
MSB
D16
Data
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
Technical Note
LSB
D2
D1
D0
Data
Select Address
・Control
data format
Data input direction
Data
①
Data
②
Data
③
Data
④
D16
D15
D14
D13
D12
D11
D10
D9
D8
Tone
D9
D8
D7
*
D7
D6
*
D6
D5
*
D5
D4
*
D4
D3
*
D3
Select Address
D2
0
D2
0
D4
D3
D2
0
D4
D3
D2
0
D1
0
D1
0
D1
1
D1
1
D0
0
D0
1
D0
0
D0
1
Treble
D16
D15
D14
D13
D12
Bass
D11
D10
Master Volume FRch
D16
D15
D14
D13
D12
D11
D10
D9
D8
Master Volume FLch
D7
D6
D5
Master Volume SRch
D16
D15
D14
D13
D12
D11
D10
D9
D8
Master Volume SLch
D7
D6
D5
Master Volume Cch
Master Volume SWch
By changing select address, 4 control data formats can be selected.
Do not set the select address data to any format other than that specified above.
At power-on sequence, initialize all data.
* is 0 or 1.
Example:
Data input direction
MSB
LSB
MSB
LSB
Data①
L
Data②
L
MSB
LSB
L
MSB
LSB
L
Data③
Data④
“L” shows latch.
After power-on, for the second and subsequent times, only the necessary data can be selected for setting
Example: When to change bus,
Input direction
MSB
LSB
Data①
“L” shows latch.
L
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5/10
2010.06 - Rev.A