Datasheet
Single-chip Type with Built-in FET Switching Regulators
Flexible Step-down
Switching Regulators
with Built-in Power MOSFET
BD9673AEFJ
●General
Description
Output 1.5A and below High Efficiency Rate Step-down
Switching Regulator Power MOSFET Internal Type
BD9673AEFJ mainly used as secondary side Power
supply, for example from fixed Power supply of 12V, 24V
etc, Step-down Output of 1.2V/1.8V/3.3V/5V, etc, can be
produced. This IC has external Coil/Capacitor
down-sizing through 300kHz Frequency operation,
inside Nch-FET SW for 45V “withstand-pressure”
commutation and also, high speed load response
through Current Mode Control is a simple external
setting phase compensation system, through a wide
range external constant, a compact Power supply can
be produced easily.
●Features
■
Internal 200 mΩ Nch MOSFET
■
Output Current 1.5A
■
Oscillation Frequency 300kHz
■
Synchronizes to External Clock ( 200kHz½
500kHz )
■
Feedback Voltage 1.0V±1.0%
■
Internal Soft Start Function
■
Internal Over Current Protect Circuit,
Low Input Error Prevention Circuit,
Heat Protect Circuit
■
ON/OFF Control through EN Pin
(Standby Current 0 A Typ.)
■
Package: HTSOP-J8 Package
●Typical
Application Circuits
15µH CDRH105R
(SUMIDA)
5V/1.0A VOUT
RB056L-40 (ROHM)
47µF/15V
GRM32EB31C476KE15 (murata)
GND
BST
Lx
VCC
VCC 24V
10µF/35V
GRM31EB3YA106KA12L
(murata)
●Key
Specifications
■
Input Voltage
■
Ref. Precision (Ta=25℃)
■
Max Output Current
■
Operating Temperature
■
Max Junction Temperature
●Packages
HTSOP-J8
7V to 42V
±1.0%
1.5A (Max.)
-40℃ to 105℃
-55℃ to 150℃
4.90mm x 6.00mm x 1.00mm
HTSOP-J8
●Applications
■
For Household machines in general that have
12V/24V Lines, etc.
0.01µF
VC
R1
120kΩ
C2
C1
open
R3
6800pF
FB
10kΩ
EN
EN
ON/OFF
control
SYNC
SYNC
R2
30kΩ
Figure 1. Typical Application Circuit
○Structure：Silicon
Monolithic Integrated Circuit
○This
product is not designed for normal operation with in a radioactive.
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BD9673AEFJ
●Pin
Configuration
8
7
6
5
Datasheet
Thermal Pad
1
2
3
4
Figure 2. Pin Configuration (TOP VIEW)
●Pin
Description
Pin No.
1
2
3
4
5
6
7
8
●Block
Diagram
ON/OF
Pin Name
Lx
GND
VC
FB
SYNC
EN
BST
VCC
Description
Terminal for inductor
Ground pin
Error amplifier output
Inverting node of the trans conductance error amplifier
Input pin of an external signal for the device synchronized by external signal
Stand-by ON/OFF pin
Voltage Supply pin for High Side FET Driver
Voltage input pin
E
VC
TSD
UVLO
Reference
VREF
REG
Current
Sense AMP
Shutdown
F
1.0V
-
+
+
Error
Σ
Current
Comparator
-
R Q
+
S
BS
200mΩ
LX
Soft
Start
10Ω
VOU
T
Oscillator
300kH
GN
V
SYN
Figure 3. Block Diagram
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BD9673AEFJ
●Description
of Blocks
1.
Reference
This Block generates Error Amp Standard Voltage.
Standard Voltage is 1.0V.
Datasheet
2.
REG
This is a Gate Drive Voltage Generator and 5V Low Saturation regulator for internal Circuit Power supply.
OSC
This is a precise wave Oscillation Circuit with Operation Frequency fixed to 300 kHz fixed (self-running mode).
To implement the synchronization feature connect a square wave (Hi Level: higher than 2V Low Level: lower than 0.8V )
to the SYNC pin. The synchronization frequency range is 200 kHz to 500 kHz.
After connecting the rising edge of LX will be synchronized to the falling edge of SYNC pin signal after 3 count.
At the synchronization remove the external clock, the device transitions self-running mode after 7 microseconds.
Soft Start
A Circuit that does Soft Start to the Output Voltage of DC/DC Comparator, and prevents Rush Current during Start-up.
Soft Start Time is set at IC internal, after 10ms from starting-up EN Pin, Standard Voltage comes to 1.0V, and Output
Voltage becomes set Voltage.
ERROR AMP
This is an Error amplifier what detects Output Signal, and outputs PWM Control Signal.
Internal Standard Voltage is set to 1.0V. Also, C and R are connected between the Output (VC) Pin GND of Error Amp
as Phase compensation elements. (See P.11)
ICOMP
This is a Voltage-Pulse Width Converter that controls Output Voltage in response to Input Voltage.
This compares the Voltage added to the internal SLOPE waveform in response to the FET WS Current with Error
amplifier Output Voltage, controls the width of Output Pulse and outputs to Driver.
Nch FET SW
This is an internal commutation SW that converts Coil Current of DC/DC Comparator.
It contains 45V” with stand pressure” 200mΩ SW.
Because the Current Rating of this FET is 2.0A included ripple current, please use at within 2.0A.
The device has the circuit of over current protection for protecting the FET from over current.
To detect OCP 2 times sequentially, the device will stop and after 13 msec restart.
UVLO
This is a Low Voltage Error Prevention Circuit.
This prevents internal circuit error during increase of Power supply Voltage and during decline of Power supply Voltage.
It monitors VCC Pin Voltage and internal REG Voltage, And when VCC Voltage becomes 6.4V and below, it turns OFF
all Output FET and turns OFF DC/DC Comparator Output, and Soft Start Circuit resets.
Now this Threshold has Hysteresis of 200mV.
TSD
This is a Heat Protect (Temperature Protect) Circuit.
When it detects an abnormal temperature exceeding Maximum Junction Temperature (Tj=150℃), it turns OFF all
Output FET, and turns OFF DC/DC Comparator Output. When Temperature falls, it has/with Hysteresis and
automatically returns.
3.
4.
5.
6.
7.
8.
9.
10. EN
With the Voltage applied to EN Pin(6pin), IC ON/OFF can be controlled.
When a Voltage of 2.0V or more is applied, it turns ON, at Open or 0V application, it turns OFF.
About 550kΩ Pull-down Resistance is contained within the Pin.
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BD9673AEFJ
●Absolute
Maximum Ratings
Item
VCC-GND Supply Voltage
BST-GND Voltage
BST-Lx Voltage
EN-GND Voltage
Lx-GND Voltage
FB-GND Voltage
VC-GND Voltage
SYNC-GND Voltage
High-side FET Drain Current
Power Dissipation
Operating Temperature
Storage Temperature
Junction Temperature
Symbol
VCC
VBST
⊿VBST
VEN
VLX
VFB
VC
SYNC
IDH
Pd
Topr
Tstg
Tjmax
Ratings
45
50
7
45
45
7
7
7
3.5
3.76
(*1)
Datasheet
Unit
V
V
V
V
V
V
V
V
A
W
℃
℃
℃
-40½+105
-55½+150
+150
(*1)During mounting of 70×70×1.6t mm 4layer board (Copper area: 70mm×70mm).Reduce by 30.08mW for every 1℃ increase. (Above 25℃)
●Electrical
Characteristics (Unless
otherwise specified Ta=25℃, VCC=24V, Vo=5V,EN=3V
)
Parameter
Circuit Current
Stand-by current of VCC
Circuit current of VCC
Under Voltage Lock Out (UVLO)
Detect Voltage
Hysteresis width
Oscillator
Oscillating frequency
Max Duty Cycle
Error Amp
FB threshold voltage
Input bias current
Error amplifier DC gain
Trans Conductance
Soft Start Time
Current Sense Amp
VC to switch current transconductance
Output
Lx NMOS ON resistance
Lx pre-charge NMOS ON resistance
RonH
RonL
－
－
200
10
340
17
mΩ
Ω
G
CS
5
10
20
A/V
VFB
IFB
A
VEA
G
EA
Tsoft
0.990
-1.0
700
110
7
1.000
0
7000
220
10
1.010
1.0
70000
440
13
V
µA
V/V
µA/V
ms
IVC=±10µA,
VC=1.5V
VFB=0V
fosc
Dmax
270
85
300
91
330
97
kHz
%
Vuv
Vuvhy
6.1
－
6.4
200
6.7
300
V
mV
Ist
Icc
－
－
0
1
10
2
µA
mA
VEN=0V
FB=1.2V
Symbol
Limits
Min.
Typ.
Max.
Unit
Conditions
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BD9673AEFJ
Over Current Detect Current
CTL
EN Pin Control voltage
EN Pin input current
SYNC
SYNC Pin Control voltage
SYNC Pin input current
SYNC falling edge to LX rising edge delay
◎Not
designed to withstand radiation.
Datasheet
Iocp
2
3.3
A
－
ON
OFF
VENON
VENOFF
REN
2
-0.3
2.7
－
－
5.5
VCC
0.8
11
V
V
µA
VEN=3V
High
Low
VSYNCH
VSYNCL
REN
tdelay
2.0
-0.3
6
200
－
－
12
400
5.5
0.8
24
600
V
V
µA
ns
VSYNC=3V
●Operating
Ratings(Ta=25℃)
Ratings
Min
7
1.0
(*2)
Typ
－
－
Max
42
VCC×0.7
Item
Power Supply Voltage
Output Voltage
Symbol
VCC
VOUT
Unit
V
V
(*2)Restricted by minimum on pulse typ. 200ns
●Detailed
Description
◇Synchronizes
to External Clock
The SYNC pin can be used to synchronize the regulator to an external system clock. To implement the synchronization
feature connect a square wave to SYNC pin. The square wave amplitude must transition lower than 0.8V and higher than
2.0V on the SYNC pin and have an on time greater than 100ns and an off time greater than 100ns. The synchronization
frequency range is 200 kHz to 500 kHz. The rising edge of the LX will be synchronized to the falling edge of SYNC pin
signal after SYNC input pulse 3 count. At the synchronization, the external clock is removed, the device transitions
self-running mode after 7 microseconds.
SYNC
Set the latch for
synchronization
SYNC_LATCH
400nsec
Lx
about
7µsec
Figure 4. Timing chart at Synchronization
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