BGA 425
Si-MMIC-Amplifier
Preliminary data
•
Multifunctional casc. 50
Ω
block (LNA / MIX)
•
Unconditionally stable
•
Gain |S
21
|
2
= 18.5 dB at 1.8 GHz (appl.1)
gain |S
21
|
2
= 22 dB at 1.8 GHz (appl.2)
in SIEGET
®
25-Technologie
3
4
IP
3out
= +7 dBm at 1.8 GHz (V
D
=3V,I
D
=9.5mA)
•
Noise figure
NF
= 2.2 dB at 1.8 GHz
•
Reverse isolation >28 dB (appl.1) >35 dB (appl.2)
•
typical device voltage
V
D
= 2 V to 5 V
Tape loading orientation
Circuit Diagram
2
1
VPS05605
6
+
V
3
OUTA
1
IN
4
OUTB
2, 5
ESD: Electrostatic discharge
sensitive device,
observe handling precaution!
GND
EHA07371
PIN Configuration
Type
BGA 425
Marking Ordering Code
BMs
Q62702-G0058
Package
1, Out B
SOT-343 4, IN
2, GND
5, GND
3, Out A
6, +V
Maximum Ratings
Parameter
Device current
Device voltage
Total power dissipation,
T
S
≤
tbd °C
Symbol
Value
25
6
150
-10
150
-65 ...+150
-65 ...+150
Unit
mA
V
mW
dBm
°C
I
D
V
D
,+V
P
tot
P
RFin
T
j
T
A
T
stg
1)
R
F
input power
Junction temperature
Ambient temperature
Storage temperature
Thermal Resistance
Junction - soldering point
R
thJS
≤
tbd
K/W
1)
T
S
is measured on the ground lead at the soldering point to the pcb
Semiconductor Group
Semiconductor Group
1
1
Jul-14-1998
1998-11-01
BGA 425
Electrical Characteristics
at
T
A
= 25 °C, unless otherwise specified.
Parameter
Symbol
Values
min.
AC characteristics
V
D
= 3V,
Z
o
= 50Ω, Testfixture Appl.1
Device current
Insertion power gain
f
= 0.1 GHz
f
= 1 GHz
typ.
9.5
27
22
18.5
28
max.
10.5
-
-
-
-
Unit
I
D
|
S
21
|
2
8.5
-
-
mA
dB
f
= 1.8 GHz
Reverse isolation
f
= 1.8 GHz
Noise figure
f
= 0.1 GHz
f
= 1 GHz
f
= 1.8 GHz
Intercept point at the output
f
= 1.8 GHz
Return loss input
f
= 1.8 GHz
Return loss output
f
= 1.8 GHz
S12
-
-
NF
-
-
1.9
2
2.2
+7
>13
>7
-
-
-
-
-
-
dBm
dB
IP
3out
RL
in
RL
out
-
-
-
-
Semiconductor Group
Semiconductor Group
2
2
Jul-14-1998
1998-11-01
BGA 425
Typical configuration
Application 1 - 3 (LNA)
Application 4 (Mix)
Appl.1
100 pF
RF OUT
Appl.2
2.2 pF
BGA 425
BGA 425
100 pF
100 pF
RF IN
RF OUT
100 nH
100 pF
RF IN
10 nF
+3 V
EHA07372
100 pF
10 nF
+3 V
100 pF
EHA07373
Appl.3
100 pF
RF OUT
100 pF
Appl.4
1 nF
LO
33
Ω
BGA 425
47 pF
22 nH
BGA 425
47 pF
100 pF
10 nF
100 pF
100 pF
RF IN
IF
180 nH
RF
+3 V
EHA07374
10 nF
+V
100 pF
EHA07375
Note: 1) Large-value capacitors should be connected from pin 6 to ground right at the device
to provide a low impedance path! (appl. 1)
2) The use of plated through holes right at pin 2 and 5 is essential for pc-board-applications.
Thin boards are recommended to minimize the parasitic inductance to ground!
3) For more information please see application note 028 and 030.
Semiconductor Group
Semiconductor Group
3
3
Jul-14-1998
1998-11-01
BGA 425
Electrical characteristics
at
T
A
= 25 °C, unless otherwise specified.
VD = 3 V
Application 1 to 4
Applic.
Insertion Gain
|S
21
|
2
(dB)
Frequ. (GHz)
Noise Figure Reverse Isol.
Return Loss
Return Loss
NF
(dB)
S12 (dB)
Input
RL
in
(dB) Output
RL
out
(dB)
Frequ. (GHz)
Frequ. (GHz)
Frequ. (GHz) Frequ. (GHz)
0.1
1 (LNA)
1
22
22
20
1.8
0.1 1
1.8 0.1
2.2 46
1
32
35
30
1.8 0.1
28
37
26
19
13
8
1
19
15
10
1.8 0.1
18
8
14
10
5
15
1
12
10
17
1.8
13
11
*)
11
27
10
24
18.5 1.9 2
22
16
-
2 (LNA)
1.9 2.1 35
2.2 34
3 (LNA)
1.9 2
4 (MIX)
e.g.: RF = 900 MHz, IF = 100 MHz, VD = 3 V
Conversion gain: 20 dB
Intercept point output: 0 dBm
Noise figure: < 5 dB
LO-power: +3 dBm
*) 2.2 pF by-pass capacitance and 100 nH bias-inductance
Semiconductor Group
Semiconductor Group
4
4
Jul-14-1998
1998-11-01
BGA 425
For linear simulation please use on-wafer measurement data of our T501 chip an add
resistive and capacitive elements, parasitics and package equivalent circuit.
S-Parameters at
T
A
= 25 °C
(On-wafer measurement data T501)
f
GHz
S
11
MAG
ANG
MAG
S
21
ANG
MAG
S
12
ANG
MAG
S
22
ANG
T1,
V
CE
= 1.7 V,
I
C
= 4.7 mA
0.1
0.7996
-8
11.8466
0.3
0.8223
-15.5
11.9814
0.5
0.8294
-26.3
11.9702
0.7
0.8162
-34.4
11.4624
0.9
0.81
-44.5
11.1452
1.1
0.793
-52.8
10.739
1.3
0.7884
-61.8
10.3219
1.5
0.7651
-69.1
9.7368
1.7
0.7534
-75.9
9.3137
1.9
0.74
-81.8
8.8247
2.1
0.7391
-88.4
8.4426
2.3
0.7335
-96
8.089
2.5
0.7186
-98.4
7.6674
2.7
0.7193
-103.1
7.3034
2.9
0.702
-108
6.7988
3.1
0.6897
-112.6
6.4921
T2,
V
CE
= 2.2 V,
I
C
= 4.7 mA
0.1
0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
1.9
2.1
2.3
2.5
2.7
2.9
3.1
0.8144
0.8094
0.8251
0.8171
0.7957
0.7952
0.7953
0.767
0.7618
0.7384
0.739
0.7285
0.718
0.7294
0.6955
0.6868
-8.3
-15.3
-25.8
-34.4
-44.9
-52.5
-61.9
-68.6
-75.5
-81.3
-88.7
-95.8
-97.9
-102.9
-107.8
-111.9
11.9941
12.1389
12.1376
11.6229
11.3048
10.8874
10.4735
9.8866
9.4501
8.9757
8.5788
8.2231
7.7991
7.429
6.9444
6.6064
172.4
169
162.6
156.8
149.5
144.6
138.9
134
130.2
126
121.9
118
115.5
113.2
109.9
107.4
0.0111
0.0126
0.0163
0.019
0.0208
0.0281
0.0332
0.0373
0.0383
0.0404
0.0417
0.0451
0.0465
0.049
0.0492
0.0501
118
90.9
75.9
72.4
64.7
62.4
58.2
54
49.3
45.6
44.1
41.6
40.8
40
37
36.7
0.9942
0.9853
0.9675
0.9529
0.9286
0.9094
0.8842
0.8523
0.8221
0.7939
0.7721
0.7476
0.7339
0.716
0.6885
0.6743
0
-5.7
-9.6
-13.5
-17.2
-20.4
-23.5
-25.9
-28.2
-30.2
-32.7
-34.5
-35.7
-37.3
-38.6
-39.7
172.1
169
162.7
157
149.7
144.8
139.2
134.3
130.5
126.3
122.1
118.2
115.5
113.4
110
107.6
0.0154
0.01
0.0129
0.0183
0.0227
0.0261
0.0307
0.0325
0.0361
0.0374
0.04
0.0416
0.0463
0.043
0.0468
0.0481
129.2
80.7
76.3
70.8
70.7
64.2
60.7
54
48
49.2
44.3
39.7
40.4
38.8
35.7
34.2
0.985
0.9906
0.9728
0.9557
0.9375
0.9147
0.8916
0.8595
0.8322
0.8019
0.7857
0.7625
0.7467
0.7273
0.7077
0.689
-0.5
-5.6
-0.1
-12.7
-16
-19
-22.4
-24.5
-26.6
-28.6
-30.9
-32.9
-33.7
-35.8
-36.7
-37.6
Semiconductor Group
Semiconductor Group
5
5
Jul-14-1998
1998-11-01
stm32/stm8
