BT258S-800LT
14 August 2017
SCR logic level, high temperature
Product data sheet
1. General description
Passivated sensitive gate Silicon Controlled Rectifier (SCR) in a SOT428 (DPAK) surface
mountable plastic package intended for use in applications requiring high bidirectional blocking
voltage capability and high thermal cycling performance. These devices are intended to be
interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger
circuits.
2. Features and benefits
•
•
•
•
•
•
•
Direct interfacing with low power drivers and microcontrollers
High bidirectional blocking voltage capability
High junction operating temperature capability
High thermal cycling performance
Planar passivated for voltage ruggedness and reliability
Surface mountable package
Very sensitive gate for logic level controls
3. Applications
•
•
•
•
•
General purpose switching and phase control
Ignition circuits, CDI for 2- and 3-wheelers
Motor control - e.g. small kitchen appliances
Protection circuits for Switched-Mode Power Supplies (SMPS)
Protection circuits in lighting ballasts
4. Quick reference data
Table 1. Quick reference data
Symbol
V
DRM
V
RRM
I
TSM
Parameter
repetitive peak off-
state voltage
repetitive peak reverse
voltage
non-repetitive peak on- half sine wave; T
j(init)
= 25 °C;
t
p
= 10 ms;
Fig. 4; Fig. 5
state current
half sine wave; T
j(init)
= 25 °C;
t
p
= 8.3 ms
T
j
I
T(AV)
junction temperature
average on-state
current
half sine wave; T
mb
≤ 135 °C;
Fig. 1
[1]
Conditions
Min
-
-
-
-
-
-
Typ
-
-
-
-
-
-
Max
800
800
75
82
150
5
Unit
V
V
A
A
°C
A
WeEn Semiconductors
BT258S-800LT
SCR logic level, high temperature
Symbol
I
T(RMS)
Parameter
RMS on-state current
Conditions
half sine wave; T
mb
≤ 135 °C;
Fig. 2;
Fig. 3
V
D
= 12 V; I
T
= 0.1 A; T
j
= 25 °C;
Fig. 8
V
DM
= 536 V; T
j
= 150 °C; R
GK
= 100 Ω;
(V
DM
= 67% of V
DRM
); exponential
waveform;
Fig. 13
Min
-
Typ
-
Max
8
Unit
A
Static characteristics
I
GT
dV
D
/dt
gate trigger current
rate of rise of off-state
voltage
20
35
-
70
50
-
µA
V/µs
Dynamic characteristics
[1]
Operation above junction temperatures of 110 °C may require the use of a gate to cathode resistor of 1 kΩ or less.
5. Pinning information
Table 2. Pinning information
Pin
1
2
3
mb
Symbol Description
K
A
G
A
cathode
anode
gate
mounting base; connected to
anode
DPAK (SOT428)
Simplified outline
Graphic symbol
A
G
sym037
K
6. Ordering information
Table 3. Ordering information
Type number
BT258S-800LT
Package
Name
DPAK
Description
plastic single-ended surface-mounted package (DPAK); 3 leads
(one lead cropped)
Version
SOT428
BT258S-800LT
All information provided in this document is subject to legal disclaimers.
©
WeEn Semiconductors Co., Ltd. 2017. All rights reserved
Product data sheet
14 August 2017
2 / 12
WeEn Semiconductors
BT258S-800LT
SCR logic level, high temperature
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DRM
V
RRM
I
T(AV)
I
T(RMS)
I
TSM
Parameter
repetitive peak off-state
voltage
repetitive peak reverse
voltage
average on-state current half sine wave; T
mb
≤ 135 °C;
Fig. 1
RMS on-state current
non-repetitive peak on-
state current
I t for fusing
rate of rise of on-state
current
peak gate current
peak gate power
average gate power
storage temperature
junction temperature
[1]
over any 20 ms period
2
Conditions
Min
-
-
-
-
-
-
-
-
-
-
-
-40
-
Max
800
800
5
8
75
82
28
50
2
5
0.5
150
150
Unit
V
V
A
A
A
A
A²s
A/µs
A
W
W
°C
°C
half sine wave; T
mb
≤ 135 °C;
Fig. 2;
Fig. 3
half sine wave; T
j(init)
= 25 °C; t
p
= 10 ms;
Fig. 4; Fig. 5
half sine wave; T
j(init)
= 25 °C; t
p
= 8.3 ms
t
p
= 10 ms; sine-wave pulse
I
T
= 10 A; I
G
= 50 mA; dI
G
/dt = 50 mA/µs
I t
dI
T
/dt
I
GM
P
GM
P
G(AV)
T
stg
T
j
[1]
2
Operation above junction temperatures of 110 °C may require the use of a gate to cathode resistor of 1 kΩ or less.
10
P
tot
(W)
8
2.2
2.8
4
4
conduction
angle,
α
(degrees)
30
60
90
120
180
0
1
2
3
4
form
factor
a
2.816
1.967
1.570
1.329
1.110
5
1.9
a = 1.57
aaa-008344
6
α
2
α
0
I
T(AV)
(A)
6
α = conduction angle
a = form factor = I
T(RMS)
/ I
T(AV)
Fig. 1. Total power dissipation as a function of average on-state current; maximum values
BT258S-800LT
All information provided in this document is subject to legal disclaimers.
©
WeEn Semiconductors Co., Ltd. 2017. All rights reserved
Product data sheet
14 August 2017
3 / 12
WeEn Semiconductors
BT258S-800LT
SCR logic level, high temperature
10
I
T(RMS)
(A)
8
aaa-008342
25
I
T(RMS )
(A)
20
aaa-008343
135 °C
6
15
4
10
2
5
0
-50
0
50
100
T
mb
(°C)
150
0
10
-2
10
-1
1
10
surge duration (s)
Fig. 2. RMS on-state current as a function of mounting
base temperature; maximum values
100
f = 50 Hz; T
mb
= 135 °C
Fig. 3. RMS on-state current as a function of surge
duration; maximum values
aaa-008345
I
TSM
(A)
80
60
40
I
T
I
TSM
20
t
t
p
T
j(init)
= 25 °C max
0
1
10
10
2
number of cycles
10
3
f = 50 Hz
Fig. 4. Non-repetitive peak on-state current as a function of the number of sinusoidal current cycles; maximum
values
BT258S-800LT
All information provided in this document is subject to legal disclaimers.
©
WeEn Semiconductors Co., Ltd. 2017. All rights reserved
Product data sheet
14 August 2017
4 / 12
WeEn Semiconductors
BT258S-800LT
SCR logic level, high temperature
10
3
I
TSM
(A)
I
T
aaa-008346
I
TSM
t
t
p
T
j(init)
= 25 °C max
10
2
(1)
10
10
-5
10
-4
10
-3
t
p
(s)
10
-2
t
p
≤ 10 ms
(1) dI
T
/dt limit
Fig. 5. Non-repetitive peak on-state current as a function of pulse width; maximum values
BT258S-800LT
All information provided in this document is subject to legal disclaimers.
©
WeEn Semiconductors Co., Ltd. 2017. All rights reserved
Product data sheet
14 August 2017
5 / 12
