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BU2505FV-E2

8-bit Microcontrollers - MCU

器件类别：模拟混合信号IC    转换器   

厂商名称：ROHM(罗姆半导体)

厂商官网：https://www.rohm.com/

器件标准：

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器件参数
参数名称
属性值
是否无铅
不含铅
是否Rohs认证
符合
厂商名称
ROHM(罗姆半导体)
零件包装代码
SSOP
包装说明
LSSOP, TSSOP20,.25
针数
20
Reach Compliance Code
compliant
Factory Lead Time
14 weeks
Samacsys Description
ROHM BU2505FV-E2, 10-channel 10 bit Serial DAC, 20-Pin SSOP-B
最大模拟输出电压
4.9 V
最小模拟输出电压
0.1 V
转换器类型
D/A CONVERTER
输入位码
BINARY
输入格式
SERIAL
JESD-30 代码
R-PDSO-G20
长度
6.5 mm
最大线性误差 (EL)
0.3418%
位数
10
功能数量
1
端子数量
20
最高工作温度
85 °C
最低工作温度
-30 °C
封装主体材料
PLASTIC/EPOXY
封装代码
LSSOP
封装等效代码
TSSOP20,.25
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）
NOT SPECIFIED
电源
5 V
认证状态
Not Qualified
座面最大高度
1.45 mm
标称安定时间 (tstl)
7 µs
最大压摆率
2.8 mA
标称供电电压
5 V
表面贴装
YES
技术
CMOS
温度等级
OTHER
端子形式
GULL WING
端子节距
0.65 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
4.4 mm
文档预览
Datasheet
D/A Converter Series for Electronic Adjustment
10bit 8ch/10ch D/A Converters
BU2505FV
BU2506FV
Key Specifications
■
Operating Supply Voltage Range：
■
Number of Channels：
BU2505FV：
BU2506FV：
■
Differential Non Linearity Error：
■
Integral Non Linearity Error：
■
Data Transfer Frequency：
4.5V to 5.5V
10ch
8ch
±1.0LSB(Max)
±3.5LSB(Max)
10MHz(Max)
General Description
The BU2505FV and BU2506FV ICs are 10bit R-2R type
D/A converters with 10ch and 8ch outputs, respectively.
Cascade connection is available, ensuring suitability for
multi-channel applications. Each channel incorporates a
full swing output type buffer amplifier with high speed
output response characteristics, resulting in a greatly
shortened D/A output settling time. The ICs also have
digital input pins compatible with TTL levels, and the
maximum value of the data transfer frequency is 10MHz.
With the variable output range function, the upper and
lower limits of the output voltage can be set separately
from the power supply voltage.
Packages
SSOP-B20
W(Typ) x D(Typ) x H(Max)
6.50mm x 6.40mm x 1.45mm
Features
■
Built-in Multi-channel R-2R Type 10bit D/A Converter
(BU2506FV: 8 Channels, BU2505FV: 10 Channels)
■
Built-in Full Swing Output Buffer Amplifier for All
Channels
■
RESET Terminal to fix the Output Voltage to the Lower
Reference Level for All Channels
■
Digital Inputs Compatible with TTL Levels
■
3-wire Serial Interface and RESET Signal to send a
14bit Format Word (4bit Address and 10bit Data)
■
REVERSE Terminal to select LSB First or MSB First of
10bit Data
■
Cascade Connection is Available
SSOP-B20
Applications
■
Control of the Various Types of Consumer and
Industrial Equipment
Typical Application Circuit
VDD
V
refH
(VrefH)
VCC
VCC
AO1
AO1
CH1
CH1
VSS
V
refL
(VrefL)
AO2
AO2
CH2
CH2
AO3
AO3
Reverse
REVERSE
RESET
Reset
CH3
CH3
Controller
Controller
LD
LD
CLK
CLK
DI
DI
AO10
AO10
GND
GND
CH10
CH10
○Product
structure：Silicon monolithic integrated circuit
www.rohm.com
©
p 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・14・001
○This
product has no designed protection against radioactive rays.
1/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
BU2505FV
BU2506FV
Pin Configurations
SSOP-B20
(TOP VIEW)
20 19 18 17 16 15 14 13 12 11
1 2 3 4 5 6 7 8 9 10
Pin Descriptions
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Terminal
Name
VSS
AO3
AO4
AO5
REVERSE
RESET
AO6
AO7
AO8
VDD
VCC
AO9(TEST1)
AO10(TEST2)
DO
LD
CLK
DI
AO1
AO2
GND
Analog /
Digital
Analog
Analog
Analog
Analog
Digital
Digital
Analog
Analog
Analog
Analog
-
Analog
Analog
Digital
Digital
Digital
Digital
Analog
Analog
-
I/O
-
O
O
O
I
I
O
O
O
-
-
O
O
O
I
I
I
O
O
-
Description
BU2505FV
BU2506FV
D/A converter lower reference voltage (V
refL
) input terminal
10bit D/A output(CH3)
10bit D/A output(CH4)
10bit D/A output(CH5)
Reverses the 10bit designated as data in the 14bit to select MSB
(Note 1)
first or LSB first.
Fixes the output voltage to the lower reference level for all
channels.
10bit D/A output(CH6)
10bit D/A output(CH7)
10bit D/A output(CH8)
D/A converter upper reference voltage (V
refH
) input terminal
Power supply
10bit D/A output(CH9)
10bit D/A output(CH10)
test terminal
test terminal
(Note 2)
(Note 2)
Equivalent
circuit No.
6
4
4
4
2
2
4
4
4
5
-
4
4
3
1
1
1
4
4
-
Outputs the LSB data of 14bit shift resister.
When the LD terminal is set to the high level voltage, 14bit data in
the shift register is loaded on to the address decoder and a
specified D/A output register.
Shift clock input terminal. At the rising edge of the CLK input, an
input value on the DI terminal is input to the 14bit shift register.
Serial data input terminal. Serial data length is 14bit (4bit address
and 10bit data).
10bit D/A output(CH1)
10bit D/A output(CH2)
GND terminal
(Note 1) It is selectable for the IC to receive 10bit data in LSB first order or MSB first order, depending on the condition of the REVERSE terminal. If the REVERSE
terminal is set to the GND voltage, it is MSB first
(Note 2) The TEST1 and TEST2 terminals of the BU2506FV should be left open. These terminals are used for testing.
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
2/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
BU2505FV
BU2506FV
BU2505FV
BU2506FV
Block Diagrams
VDD
(VrefH)
10bit R-2R
DA converter
10bit R-2R
DA converter
TEST1
10bit R-2R
DA converter
10bit Latch
10bit Latch
10bit Latch
AO9
AO8
9
8
8
10bit R-2R
DA converter
10bit R-2R
DA converter
TEST2
10bit R-2R
DA converter
10bit Latch
10bit Latch
10bit Latch
AO10
AO7
10
7
7
10bit R-2R
DA converter
10bit R-2R
DA converter
10bit Latch
10bit Latch
AO6
Address
decoder
・・・
D13
D10 11 12
D10 11 12
Address
decoder
D13
・・・
6
6
AO5
REVERSE RESET
Reverse Reset
14bit
Shift register
14bit
Shift register
D9
D9
10bit R-2R
DA converter
10bit R-2R
DA converter
10bit Latch
10bit Latch
5
10bit R-2R
DA converter
10bit Latch
10bit R-2R
DA converter
10bit Latch
5
10bit R-2R
DA converter
10bit R-2R
DA converter
10bit Latch
10bit Latch
AO1
AO1
AO4
1
1
4
10bit R-2R
DA converter
4
10bit R-2R
DA converter
10bit R-2R
DA converter
10bit Latch
10bit Latch
10bit Latch
10bit Latch
AO2
10bit R-2R
DA converter
AO2
AO3
Ch2
Ch2
Ch3
Ch3
Buffer
operation
amplifier
Buffer
operation
amplifier
VSS
(VrefL)
Absolute Maximum Ratings
(T
A
=25°C)
Parameter
Supply voltage
D/A converter upper reference voltage
Input voltage
Output voltage
Power dissipation
Storage temperature range
Symbol
V
CC
V
DD
V
IN
V
OUT
P
D
T
stg
Rating
6.0
6.0
6.0
6.0
0.75
(Note 3)
Unit
V
V
V
V
W
°C
-55 to +125
(Note 3) Derate by 7.5mW/°C when operating above T
A
=25°C (when mounted on ROHM’s standard board).
Mounted on a FR4 glass epoxy PCB 70mm x 70mm x 1.6mm (copper foil area less than 3%).
Caution:
Operating the IC over the absolute maximum ratings may damage the IC. The damage can either be a short circuit between pins or an open circuit
between pins and the internal circuitry. Therefore, it is important to consider circuit protection measures, such as adding a fuse, in case the IC is operated over
the absolute maximum ratings.
Recommended Operating Conditions
Parameter
Supply voltage range
Operating temperature range
Symbol
V
CC
T
opr
Limit
4.5 to 5.5
-30 to +85
Unit
V
°C
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
3/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
VSS
(VrefL)
GND
GND
20
20
1
1
AO3
19
19
・・・
・・・
2
2
AO4
18
18
3
3
AO5
REVERSE
Reverse
8
CLK
CLK
7
16
16
6
7
8
5
5
4
3
2
1
D0
17
DI
17
DI
D0
1
2
3
4
5
4
4
5
6
Reset
RESET
LD
LD
15
15
6
6
AO6
DO
DO
14
14
7
7
AO7
13
13
8
8
AO8
12
12
9
9
VDD
(VrefH)
VCC
VCC
11
11
10
10
BU2505FV
BU2506FV
Electrical Characteristics
(Unless otherwise specified, V
CC
=5V, V
refH
=5V, V
refL
=0V, T
A
=25°C)
Parameter
<Digital unit>
Supply current
Input leak current
Input voltage L
Input voltage H
Output voltage L
Output voltage H
<Analog unit>
Consumption current
D/A converter upper reference voltage
setting range
D/A converter lower reference voltage
setting range
Buffer amplifier output voltage range
I
refH
V
refH
V
refL
V
O
-
-
3.0
0
0.1
0.2
-2
-1.0
-3.5
-25
-25
-
12.5
4.5
3.7
-
-
-
-
-
-
-
-
-
5
25
7.5
6.2
5
1.5
4.9
4.75
+2
+1.0
+3.5
+25
+25
15
37.5
mA
mA
V
-
V
V
I
O
=±100μA
I
O
=±1.0mA
High side saturation voltage =0.35V
(on full scale setting, current sourcing)
Low side saturation voltage =0.23V
(on zero scale setting, current sinking)
V
refH
=4.796V
V
refL
=0.7V
V
CC
=5.5V (4mV/LSB)
At no load (I
O
=+0mA )
-
Input voltage = 0V
(The resistance value has input
voltage dependence)
Data condition : at maximum current
(Note 4)
Symbol
Limit
Min
Typ
Max
Unit
Conditions
I
CC
I
ILK
V
IL
V
IH
V
OL
V
OH
-
-5
-
2.0
0
4.6
0.85
-
-
-
-
-
2.8
+5
0.8
-
0.4
5
mA
μA
V
V
V
V
At CLK=10MHz, I
AO
=0μA
V
IN
=0V to V
CC
-
-
I
OL
=+2.5mA
I
OH
=-2.5mA
Buffer amplifier output drive range
Differential non-linearity error
Precision
Integral non-linearity error
Zero point error
Full scale error
Buffer amplifier output impedance
Pull-up I/O internal resistance value
(Note 5)
I
O
DNL
INL
S
ZERO
S
FULL
R
O
R
up
mA
LSB
mV
Ω
kΩ
(Note 4) Under the condition that CH1 to CH8 are set to maximum current
(Note 5) The specification is applied to pin 5 (REVERSE) and pin 6 (RESET)
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
4/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
BU2505FV
BU2506FV
Timing Characteristics
(Unless otherwise specified, V
CC
=5V, V
refH
=5V, V
refL
=0V, T
A
=25°C)
Limits
Parameter
Reset L pulse width
Clock L pulse width
Clock H pulse width
Clock rise time
Clock fall time
Data setup time
Data hold time
Load setup time
Load hold time
Load H pulse width
Data output delay time
Symbol
t
RTL
t
CKL
t
CKH
t
cr
t
cf
t
DCH
t
CHD
t
CHL
t
LDC
t
LDH
t
DO
Min
50
50
50
-
-
20
40
50
50
50
-
Typ
-
-
-
-
-
-
-
-
-
-
-
Max
-
-
-
50
50
-
-
-
-
-
90
C
L
=100pF
C
L
≤100pF
, V
O
: 0.5V↔4.5V
The time interval from the start time to
change an output voltage to the time at
which the output voltage reaches to its
final value within 1/2 LSB.
(Note 6)
Unit
Conditions
The voltage levels of the measured time
points are 20% or 80% of V
CC
.
-
-
-
-
-
ns
-
-
-
-
-
D/A output settling time
t
LDD
-
7
20
μs
(Note 6) A capacitor should be placed between the analog output and ground in order to eliminate noise.
A capacitance up to 100pF is recommended (including the capacitance of the wire).
RESET
t
RTL
CLK
t
CKL
DI
t
LDH
LD
DA
OUTPUT
t
DO
DO
OUTPUT
t
DCH
t
CHD
t
CHL
t
LDD
t
LDC
t
cr
t
CKH
t
cf
Applicational information
LD input
The LD input is a level trigger signal. When LD=H, an internal shift register value is loaded into a latch. It doesn’t
have to be cared whether CLK is H or L when LD changes to H. However CLK must not be changed while LD is H.
The shift register values pass through the latches if LD=H and CLK is toggled.
Power-on operation
The BU2505FV and the BU2506FV does not have a power-on reset function. Therefore, after power-on, data in
the internal registers are unknown. When RESET changes from H to L, all latch outputs turn into L, although the
shift registers are not reset.
Pull-down resister
Pin 5 and pin 6 are pulled up internally. If putting the external pull-down resister on them, the recommended value
is less than 1kΩ.
Truth Table
Pin 5: RESET
Pin 6: REVERSE
L
Reset
MSB first
H
Normal
LSB first
www.rohm.co.jp
© 2015 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/18
TSZ02201-0RLR0GZ10140-1-2
11.Dec.2015 Rev.001
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