首页 > 器件类别 >

BUK9637-100E_15

N-channel TrenchMOS logic level FET

厂商名称:Philips Semiconductors (NXP Semiconductors N.V.)

厂商官网:https://www.nxp.com/

下载文档
文档预览
BUK9637-100E
5 October 2012
N-channel TrenchMOS logic level FET
Product data sheet
1. Product profile
1.1 General description
Logic level N-channel MOSFET in a SOT404 package using TrenchMOS technology.
This product has been designed and qualified to AEC Q101 standard for use in high
performance automotive applications.
1.2 Features and benefits
AEC Q101 compliant
Repetitive avalanche rated
Suitable for thermally demanding environments due to 175 °C rating
True logic level gate with Vgst(th) rating of greater than 0.5V at 175 °C
1.3 Applications
12V, 24V and 48V Automotive systems
Motors, lamps and solenoid control
Start-Stop micro-hybrid applications
Transmission control
Ultra high performance power switching
1.4 Quick reference data
Table 1.
Symbol
V
DS
I
D
P
tot
R
DSon
Quick reference data
Parameter
drain-source voltage
drain current
total power dissipation
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
V
GS
= 5 V; T
mb
= 25 °C;
Fig. 1
T
mb
= 25 °C;
Fig. 2
V
GS
= 5 V; I
D
= 10 A; T
j
= 25 °C;
Fig. 11
Min
-
-
-
Typ
-
-
-
Max
100
31
96
Unit
V
A
W
Static characteristics
drain-source on-state
resistance
gate-drain charge
-
31
37
Dynamic characteristics
Q
GD
V
GS
= 5 V; I
D
= 10 A; V
DS
= 80 V;
Fig. 13; Fig. 14
-
9.3
-
nC
Scan or click this QR code to view the latest information for this product
NXP Semiconductors
BUK9637-100E
N-channel TrenchMOS logic level FET
2. Pinning information
Table 2.
Pin
1
2
3
mb
Pinning information
Symbol Description
G
D
S
D
gate
drain
source
mounting base; connected to
drain
2
1
3
G
mbb076
Simplified outline
mb
Graphic symbol
D
S
D2PAK (SOT404)
3. Ordering information
Table 3.
Ordering information
Package
Name
BUK9637-100E
D2PAK
Description
Version
plastic single-ended surface-mounted package (D2PAK); 3 leads SOT404
(one lead cropped)
Type number
4. Marking
Table 4.
Marking codes
Marking code
BUK9637-100E
Type number
BUK9637-100E
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
DGR
V
GS
Parameter
drain-source voltage
drain-gate voltage
gate-source voltage
Conditions
T
j
≥ 25 °C; T
j
≤ 175 °C
R
GS
= 20 kΩ
T
j
≤ 175 °C; DC
T
j
≤ 175 °C; Pulsed
I
D
drain current
T
mb
= 25 °C; V
GS
= 5 V;
Fig. 1
T
mb
= 100 °C; V
GS
= 5 V;
Fig. 1
I
DM
P
tot
T
stg
BUK9637-100E
Min
-
-
-10
[1][2]
Max
100
100
10
15
31
22
123
96
175
Unit
V
V
V
V
A
A
A
W
°C
2 / 13
-15
-
-
-
-
-55
peak drain current
total power dissipation
storage temperature
T
mb
= 25 °C; pulsed; t
p
≤ 10 µs;
Fig. 4
T
mb
= 25 °C;
Fig. 2
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
5 October 2012
NXP Semiconductors
BUK9637-100E
N-channel TrenchMOS logic level FET
Symbol
T
j
I
S
I
SM
E
DS(AL)S
Parameter
junction temperature
Conditions
Min
-55
Max
175
Unit
°C
Source-drain diode
source current
peak source current
T
mb
= 25 °C
pulsed; t
p
≤ 10 µs; T
mb
= 25 °C
I
D
= 31 A; V
sup
≤ 100 V; R
GS
= 50 Ω;
V
GS
= 5 V; T
j(init)
= 25 °C; unclamped;
Fig. 3
[1]
[2]
[3]
[4]
40
I
D
(A)
30
-
-
31
123
A
A
Avalanche ruggedness
non-repetitive drain-source
avalanche energy
[3][4]
-
44
mJ
Accumulated pulse duration up to 50 hours delivers zero defect ppm
Significantly longer life times are achieved by lowering T
j
and or V
GS
Single-pulse avalanche rating limited by maximum junction temperature of 175 °C.
Refer to application note AN10273 for further information.
003aah885
120
P
der
(%)
80
03aa16
20
40
10
0
0
50
100
150
T
mb
(° C)
200
0
0
50
100
150
T
mb
(°C)
200
Fig. 1.
Continuous drain current as a function of
mounting base temperature
Fig. 2.
Normalized total power dissipation as a
function of mounting base temperature
BUK9637-100E
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
5 October 2012
3 / 13
NXP Semiconductors
BUK9637-100E
N-channel TrenchMOS logic level FET
10
2
I
AL
(A)
10
003aah886
(1)
1
(2)
10
-1
(3)
10
-2
10
-3
10
-2
10
-1
1
t
AL
(ms)
10
Fig. 3.
Avalanche rating; avalanche current as a function of avalanche time
10
3
I
D
(A)
10
2
Limit R
DSon
= V
DS
/ I
D
t
p
=10 µ s
10
DC
1
1 ms
10 ms
100 ms
10
-1
1
10
10
2
100 µ s
003aah887
V
DS
(V)
10
3
Fig. 4.
Safe operating area; continuous and peak drain currents as a function of drain-source voltage
6. Thermal characteristics
Table 6.
Symbol
R
th(j-mb)
Thermal characteristics
Parameter
thermal resistance
from junction to
mounting base
thermal resistance
from junction to
ambient
Conditions
Fig. 5
Min
-
Typ
-
Max
1.56
Unit
K/W
R
th(j-a)
minimum footprint ; mounted on a
printed-circuit board
-
50
-
K/W
BUK9637-100E
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved
Product data sheet
5 October 2012
4 / 13
NXP Semiconductors
BUK9637-100E
N-channel TrenchMOS logic level FET
10
Z
th(j-mb)
(K/W)
1
003aah168
δ = 0.5
0.2
10
-1
0.1
0.05
0.02
single shot
P
δ=
t
p
T
10
-2
t
p
t
T
10
-3
10
-6
10
-5
10
-4
10
-3
10
-2
10
-1
t
p
(s)
1
Fig. 5.
Transient thermal impedance from junction to mounting base as a function of pulse duration
7. Characteristics
Table 7.
Symbol
V
(BR)DSS
Characteristics
Parameter
drain-source
breakdown voltage
gate-source threshold
voltage
Conditions
I
D
= 250 µA; V
GS
= 0 V; T
j
= 25 °C
I
D
= 250 µA; V
GS
= 0 V; T
j
= -55 °C
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 25 °C;
Fig. 9; Fig. 10
I
D
= 1 mA; V
DS
= V
GS
; T
j
= -55 °C;
Fig. 9
I
D
= 1 mA; V
DS
= V
GS
; T
j
= 175 °C;
Fig. 9
I
DSS
drain leakage current
V
DS
= 100 V; V
GS
= 0 V; T
j
= 25 °C
V
DS
= 100 V; V
GS
= 0 V; T
j
= 175 °C
I
GSS
gate leakage current
V
GS
= 10 V; V
DS
= 0 V; T
j
= 25 °C
V
GS
= -10 V; V
DS
= 0 V; T
j
= 25 °C
R
DSon
drain-source on-state
resistance
V
GS
= 5 V; I
D
= 10 A; T
j
= 25 °C;
Fig. 11
V
GS
= 10 V; I
D
= 10 A; T
j
= 25 °C;
Fig. 11
V
GS
= 5 V; I
D
= 10 A; T
j
= 175 °C;
Fig. 12; Fig. 11
Dynamic characteristics
Q
G(tot)
Q
GS
BUK9637-100E
Min
100
90
1.4
-
0.5
-
-
-
-
-
-
-
Typ
-
-
1.7
-
-
0.02
-
2
2
31
30
-
Max
-
-
2.1
2.45
-
1
500
100
100
37
36
102
Unit
V
V
V
V
V
µA
µA
nA
nA
Static characteristics
V
GS(th)
total gate charge
gate-source charge
I
D
= 10 A; V
DS
= 80 V; V
GS
= 5 V;
Fig. 13; Fig. 14
All information provided in this document is subject to legal disclaimers.
-
-
22.8
4.2
-
-
nC
nC
© NXP B.V. 2012. All rights reserved
Product data sheet
5 October 2012
5 / 13
查看更多>
热门器件
热门资源推荐
器件捷径:
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ
需要登录后才可以下载。
登录取消