Intel
®
Celeron
®
D Processor 3xx
∆
Sequence
Datasheet
– On 90 nm Process in the 478-pin Package
June 2005
Document Number: 302353-005
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Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for
future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel
®
Celeron
®
D processors 3xx sequence on 90 nm process and in the 478-pin package may contain design defects or errors known as errata
which may cause the product to deviate from published specifications. Current characterized errata are available on request.
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different processor families. See www.intel.com/products/processor_number for details.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
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Copyright © 2003–2005 Intel Corporation.
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2
Datasheet
Contents
1
Introduction
................................................................................................................11
1.1
1.2
Terminology.........................................................................................................11
1.1.1 Processor Packaging Terminology.........................................................12
References ..........................................................................................................13
FSB and GTLREF ...............................................................................................15
Power and Ground Pins ......................................................................................15
Decoupling Guidelines ........................................................................................15
2.3.1 V
CC
Decoupling ......................................................................................16
2.3.2 FSB GTL+ Decoupling ...........................................................................16
2.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking....................................16
Voltage Identification ...........................................................................................17
2.4.1 Phase Lock Loop (PLL) Power and Filter...............................................18
Reserved, Unused, and TESTHI Pins.................................................................19
FSB Signal Groups..............................................................................................20
Asynchronous GTL+ Signals...............................................................................21
Test Access Port (TAP) Connection....................................................................21
FSB Frequency Select Signals (BSEL[1:0]) ........................................................22
Absolute Maximum and Minimum Ratings ..........................................................22
Processor DC Specifications...............................................................................23
V
CC
Overshoot Specification...............................................................................28
2.12.1 Die Voltage Validation ............................................................................29
GTL+ FSB Specifications ....................................................................................30
Package Mechanical Drawing .............................................................................31
Processor Component Keep-Out Zones .............................................................34
Package Loading Specifications .........................................................................34
Package Handling Guidelines .............................................................................35
Package Insertion Specifications ........................................................................35
Processor Mass Specification .............................................................................35
Processor Materials.............................................................................................35
Processor Markings.............................................................................................36
Processor Pinout Coordinates.............................................................................37
Processor Pin Assignments ................................................................................39
Alphabetical Signals Reference ..........................................................................54
Processor Thermal Specifications.......................................................................63
5.1.1 Thermal Specifications ...........................................................................63
5.1.2 Thermal Metrology .................................................................................64
Processor Thermal Features...............................................................................65
5.2.1 Thermal Monitor .....................................................................................65
5.2.2 On-Demand Mode..................................................................................65
2
Electrical Specifications
........................................................................................15
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
2.10
2.11
2.12
2.13
3
Package Mechanical Specifications
.................................................................31
3.1
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4
Pin Listing and Signal Descriptions
.................................................................39
4.1
4.2
5
Thermal Specifications and Design Considerations
.................................63
5.1
5.2
Datasheet
3
5.2.3
5.2.4
5.2.5
5.2.6
PROCHOT# Signal Pin .......................................................................... 66
THERMTRIP# Signal Pin ....................................................................... 66
T
CONTROL
and Fan Speed Reduction (Optional) ................................... 67
Thermal Diode........................................................................................ 67
6
Features
....................................................................................................................... 69
6.1
6.2
Power-On Configuration Options ........................................................................ 69
Clock Control and Low Power States.................................................................. 69
6.2.1 Normal State—State 1 ........................................................................... 69
6.2.2 AutoHALT Powerdown State—State 2 .................................................. 70
6.2.3 Stop-Grant State—State 3 ..................................................................... 71
6.2.4 HALT/Grant Snoop State—State 4 ........................................................ 71
6.2.5 Sleep State—State 5.............................................................................. 72
Mechanical Specifications................................................................................... 74
7.1.1 Boxed Processor Cooling Solution Dimensions ..................................... 74
7.1.2 Boxed Processor Fan Heatsink Weight.................................................. 75
7.1.3 Boxed Processor Retention Mechanism and Heatsink
Attach Clip Assembly ............................................................................. 75
Electrical Requirements ...................................................................................... 76
7.2.1 Fan Heatsink Power Supply ................................................................... 76
Thermal Specifications........................................................................................ 77
7.3.1 Boxed Processor Cooling Requirements ............................................... 77
7.3.2 Variable Speed Fan ............................................................................... 79
Logic Analyzer Interface (LAI)............................................................................. 81
8.1.1 Mechanical Considerations .................................................................... 81
8.1.2 Electrical Considerations........................................................................ 81
7
Boxed Processor Specifications
....................................................................... 73
7.1
7.2
7.3
8
Debug Tools Specifications
................................................................................. 81
8.1
4
Datasheet
Figures
2-1
2-2
2-3
3-1
3-2
3-3
3-4
3-5
3-6
4-1
4-2
5-1
6-1
7-1
7-2
7-3
7-4
7-5
7-6
7-7
7-8
Phase Lock Loop (PLL) Filter Requirements ......................................................18
V
CC
Static and Transient Tolerance....................................................................25
V
CC
Overshoot Example Waveform....................................................................29
Processor Package Assembly Sketch.................................................................31
Processor Package Drawing (Sheet 1 of 2) ........................................................32
Processor Package Drawing (Sheet 2 of 2) ........................................................33
Processor Top-Side Marking Example (with Processor Number) .......................36
Processor Top-Side Marking Example................................................................36
Processor Pinout Coordinates (Top View) ..........................................................37
Pinout Diagram (Top View—Left Side) ...............................................................40
Pinout Diagram (Top View—Right Side) .............................................................41
Case Temperature (TC) Measurement Location.................................................64
Stop Clock State Machine ...................................................................................70
Mechanical Representation of the Boxed Intel
®
Celeron
®
D Processor .............73
Requirements for the Boxed Processor (Side View) ...........................................74
Space Requirements for the Boxed Processor (Top View).................................74
Boxed Processor Fan Heatsink Power Cable Connector Description.................76
Baseboard Power Header Placement Relative to Processor Socket..................77
Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 1 View) 78
Boxed Processor Fan Heatsink Airspace Keepout Requirements (Side 2 View) 78
Boxed Processor Fan Heatsink Set Points .........................................................79
Datasheet
5