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C1210T222J2GCCTU

Ceramic Capacitor, Multilayer, Ceramic, 200V, 5% +Tol, 5% -Tol, C0G, 30ppm/Cel TC, 0.0022uF, Surface Mount, 1210, CHIP

器件类别:无源元件    电容器   

厂商名称:KEMET(基美)

厂商官网:http://www.kemet.com

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
Objectid
7120480728
包装说明
, 1210
Reach Compliance Code
compliant
ECCN代码
EAR99
电容
0.0022 µF
电容器类型
CERAMIC CAPACITOR
介电材料
CERAMIC
高度
1.25 mm
JESD-609代码
e3
长度
3.2 mm
安装特点
SURFACE MOUNT
多层
Yes
负容差
5%
端子数量
2
最高工作温度
125 °C
最低工作温度
-55 °C
封装形状
RECTANGULAR PACKAGE
封装形式
SMT
包装方法
TR, EMBOSSED PLASTIC, 7 INCH
正容差
5%
额定(直流)电压(URdc)
200 V
尺寸代码
1210
表面贴装
YES
温度特性代码
C0G
温度系数
30ppm/Cel ppm/°C
端子面层
Matte Tin (Sn) - with Nickel (Ni) barrier
端子形状
WRAPAROUND
宽度
2.5 mm
文档预览
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability
Applications, C0G Dielectric, 10 – 250 VDC
Overview
KEMET’s COTS program is an extension of KEMET knowledge of
high reliability test regimes and requirements. KEMET regularly
supplies “up-screened” products by working with customer
drawings and imposing specified design and test requirements.
The COTS program offers the same high quality and high
reliability components as up-screened products, but at a lower
cost to the customer. This is accomplished by eliminating the
need for customer-specific drawings to achieve the reliability
level required for customer applications. A series of tests and
inspections have been selected to provide the accelerated
conditioning and 100% screening necessary to eliminate infant
mortal failures from the population.
KEMET’s C0G dielectric features a 125°C maximum operating
temperature and is considered “stable.” The Electronics
Components, Assemblies & Materials Association (EIA)
characterizes C0G dielectric as a Class I material. Components
of this classification are temperature compensating and are
suited for resonant circuit applications or those where Q and
stability of capacitance characteristics are required. C0G exhibits
no change in capacitance with respect to time and voltage
and boasts a negligible change in capacitance with reference
to ambient temperature. Capacitance change is limited to ±30
ppm/ºC from −55°C to +125°C.
All COTS testing includes voltage conditioning and post-
electrical testing as per MIL–PRF–55681. For enhanced
reliability, KEMET also provides the following test level options
and conformance certifications:
Test Level A
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
C of C
Test Level B
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
DPA
C of C
Test Level C
Voltage Conditioning
DWV
IR@25°C
CAP
DF
PDA 8%
DPA
85/85
C of C
Ordering Information
C
1206
T
104
Capacitance
Code (pF)
Two significant
digits and
number of zeros
Use 9 for
1.0 – 9.9 pF
Use 8 for
0.5 – .99 pF
e.g., 2.2 pF = 229
e.g., 0.5 pF = 508
K
Capacitance
Tolerance
1
B = ±0.10 pF
C = ±0.25 pF
D = ±0.5 pF
F = ± 1%
G = ±2%
J = ±5%
K = ±10%
M = ±20%
5
G
A
C
TU
Case Size
Specification/
Ceramic
(L" x W")
Series
0402
0603
0805
1206
1210
1812
2220
T = COTS
Rated
Voltage Dielectric
Test Level
(VDC)
8 = 10
G = C0G A = Testing per MIL-
4 = 16
PRF-55681 PDA 8%
3 = 25
B = Testing per MIL-
6 = 35
PRF-55681 PDA 8%, DPA
5 = 50
per EIA-469
1 = 100
C = Testing per MIL-
2 = 200
PRF-55681 PDA 8%, DPA
A = 250
per EIA-469, Humidity per
MIL-STD-202, Method 103,
Condition A
Termination Packaging/
Finish
2
Grade (C-Spec)
C = 100%
Matte Sn
L = SnPb
(5% Pb
minimum)
G = Gold
(Au) 100
µin min.
See
"Packaging
C-Spec
Ordering
Options
Table"
1
2
Additional capacitance tolerance offerings may be available. Contact KEMET for details.
Additional termination finish options may be available. Contact KEMET for details.
Built Into Tomorrow
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1026_C0G_COTS_SMD • 3/10/2022
1
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Benefits
• −55°C to +125°C operating temperature range
• Lead (Pb)-free, RoHS and REACH compliant
• Voltage conditioning and post-electrical testing per
MIL–PRF–55681, Paragraph 4.8.3.1, Standard Voltage
Conditioning
• Destructive Physical Analysis (DPA) per EIA–469
• Humidity, steady state, low voltage (85/85) per
MIL–STD–202, Method 103, Condition A
• RoHS Compliant (excluding SnPb end metallization option)
• EIA 0402, 0603, 0805, 1206, 1210, 1812, and 2220 case
sizes
• DC voltage ratings of 10 V, 16 V, 25 V, 50 V, 100 V, 200 V
and 250 V
• Capacitance offerings ranging from 0.5 pF up to 0.47 μF
• Available capacitance tolerances of ±0.10 pF, ±0.25 pF, ±0.5
pF, ±1%, ±2%, ±5%, ±10%, and ±20%
Certificate of compliance
No piezoelectric noise
Extremely low ESR and ESL
High thermal stability
High ripple current capability
Preferred capacitance solution at line frequencies and into
the MHz range
No capacitance change with respect to applied rated DC
voltage
Negligible capacitance change with respect to temperature
No capacitance decay with time
Non-polar device, minimizing installation concerns
SnPb end metallization option available upon request
(5% Pb minimum)
Applications
Typical applications include military, space quality and high reliability electronics.
Packaging C-Spec Ordering Options Table (100% Matte Sn and SnPb Terminations)
Packaging Type
1
Bulk Bag/Unmarked
7" Reel/Unmarked
13" Reel/Unmarked
7" Reel/Unmarked/2 mm pitch
2
13" Reel/Unmarked/2 mm pitch
2
1
1
Packaging/Grade
Ordering Code (C-Spec)
Not required (Blank)
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
7081
7082
Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.
The terms “Marked” and “Unmarked” pertain to laser marking option of capacitors. All packaging options labeled as “Unmarked” will contain
capacitors that have not been laser marked. The option to laser mark is not available on these devices. For more information see “Capacitor Marking”.
2
The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case
size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1026_C0G_COTS_SMD • 3/10/2022
2
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Packaging C-Spec Ordering Options Table (Gold Termination)
Termination Finish Options
Packaging Type/Options
Standard Packaging – Unmarked
3
Bulk Bag
Waffle Tray
2
7" Tape & Reel
13" Reel
F = Gold (Au) 30 – 50 µin
G = Gold (Au) 100 µin minimum
7” Tape & Reel/2 mm pitch
4
7" Tape & Reel – 50 pieces
7" Tape & Reel – 100 pieces
7" Tape & Reel – 250 pieces
7" Tape & Reel – 500 pieces
7" Tape & Reel – 1,000 pieces
Blank
1
7292
TU
7411 (EIA 0603 and smaller case sizes)
7210 (EIA 0805 and larger case sizes)
7081
T050
T100
T250
T500
T1K0
7282
7130
Packaging
Ordering Code (C-Spec)
Moisture Sensitive Packaging
5
– Unmarked
3
Waffle Tray
2
7" Tape & Reel
7" Tape & Reel – 50 pieces
7" Tape & Reel – 100 pieces
7" Tape & Reel – 250 pieces
7" Tape & Reel – 500 pieces
7" Tape & Reel – 1,000 pieces
E = Gold (Au) 1.97 – 11.8 µin
F = Gold (Au) 30 – 50 µin
G = Gold (Au) 100 µin minimum
Contact KEMET
6
Default packaging is “Bulk Bag”. An ordering code C-Spec is not required for “Bulk Bag” packaging.
“Bulk Bag” packaging option is not available for Gold (Au) termination finish options and case sizes larger than 2225 (5664 Metric).
2
“Waffle Tray” packaging option is not available for case sizes larger than 2225 (5664 Metric).
3
The terms “Marked” and “Unmarked” pertain to laser marking option of components. All packaging options labeled as “Unmarked” will contain
capacitors that have not been laser marked. The option to laser mark is not available on these devices.
3
Reeling quantities are dependent upon chip size and thickness dimension. When ordering using the “T1K0” packaging option, 1812 through 2225 case
size devices with chip thickness of ≥ 1.9 mm (nominal) may be shipped on multiple 7” reels or a single 13” reel. Additional reeling or packaging options
may be available. Contact KEMET for details.
4
The 2 mm pitch option allows for double the packaging quantity of capacitors on a given reel size. This option is limited to EIA 0603 (1608 metric) case
size devices. For more information regarding 2 mm pitch option see “Tape & Reel Packaging Information”.
5
Moisture sensitive packaging is required for Gold (Au) termination option “E” (1.97 – 11.8 µin)
6
Additional reeling or packaging options may be available. Contact KEMET for details.
1
1
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1026_C0G_COTS_SMD • 3/10/2022
3
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Dimensions – Millimeters (Inches)
W
L
T
B
S
EIA Size
Code
0402
0603
0805
1206
1210
1812
2220
Metric Size
Code
1005
1608
2012
3216
3225
4532
5650
L
Length
1.00 (0.040)
±0.05 (0.002)
1.60 (0.063)
±0.15 (0.006)
2.00 (0.079)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
3.20 (0.126)
±0.20 (0.008)
4.50 (0.177)
±0.30 (0.012)
5.70 (0.224)
±0.40 (0.016)
W
Width
0.50 (0.020)
±0.05 (0.002)
0.80 (0.032)
±0.15 (0.006)
1.25 (0.049)
±0.20 (0.008)
1.60 (0.063)
±0.20 (0.008)
2.50 (0.098)
±0.20 (0.008)
3.20 (0.126)
±0.30 (0.012)
5.00 (0.197)
±0.40 (0.016)
T
Thickness
B
Bandwidth
0.30 (0.012)
±0.10 (0.004)
0.35 (0.014)
±0.15 (0.006)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
0.50 (0.02)
±0.25 (0.010)
0.60 (0.024)
±0.35 (0.014)
0.60 (0.024)
±0.35 (0.014)
S
Separation
Minimum
0.30 (0.012)
0.70 (0.028)
0.75 (0.030)
Mounting
Technique
Solder Reflow
Only
Solder Wave or
Solder Reflow
See Table 2 for
Thickness
N/A
Solder Reflow
Only
Qualification/Certification
Commercial Grade products are subject to internal qualification. Details regarding test methods and conditions are
referenced in Table 4, Performance & Reliability.
Environmental Compliance
Lead (Pb)-free, RoHS, and REACH compliant without exemptions (excluding SnPb termination finish option).
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1026_C0G_COTS_SMD • 3/10/2022
4
Surface Mount Multilayer Ceramic Chip Capacitors (SMD MLCCs)
Commercial Off-The-Shelf (COTS) for Higher Reliability Applications, C0G Dielectric, 10 – 250 VDC
Electrical Parameters/Characteristics
Item
Operating Temperature Range
Capacitance Change with Reference to
+25°C and 0 VDC Applied (TCC)
Aging Rate (Maximum % Capacitance Loss/Decade Hour)
1
Parameters/Characteristics
−55°C to +125°C
±30 ppm/ºC
0%
250% of rated voltage
(5±1 seconds and charge/discharge not exceeding 50 mA)
0.1%
1,000 megohm microfarads or 100 GΩ
(Rated voltage applied for 120±5 seconds at 25°C)
Dielectric Withstanding Voltage (DWV)
2
Dissipation Factor (DF) Maximum Limit at 25ºC
3
Insulation Resistance (IR) Limit at 25°C
DWV is the voltage a capacitor can withstand (survive) for a short period of time. It exceeds the nominal and continuous working voltage of the
capacitor.
2
Capacitance and dissipation factor (DF) measured under the following conditions:
1 MHz ±100 kHz and 1.0 Vrms ±0.2 V if capacitance ≤ 1,000 pF
1 kHz ±50 Hz and 1.0 Vrms ±0.2 V if capacitance > 1,000 pF
3
To obtain IR limit, divide MΩ-µF value by the capacitance and compare to GΩ limit. Select the lower of the two limits.
Capacitance and Dissipation Factor (DF) measured under the following conditions:
Note: When measuring capacitance it is important to ensure the set voltage level is held constant. The HP4284 and Agilent E4980 have a feature known
as Automatic Level Control (ALC). The ALC feature should be switched to "ON."
1
Post Environmental Limits
High Temperature Life, Biased Humidity, Moisture Resistance
Dielectric
C0G
Rated DC
Voltage
All
Capacitance
Value
All
Dissipation Factor
(Maximum %)
0.5
Capacitance
Shift
0.3% or ±0.25 pF
Insulation
Resistance
10% of Initial
Limit
© KEMET Electronics Corporation • KEMET Tower • One East Broward Boulevard
Fort Lauderdale, FL 33301 USA • 954-766-2800 • www.kemet.com
C1026_C0G_COTS_SMD • 3/10/2022
5
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