C8051F330/1/2/3/4/5
Mixed Signal ISP Flash MCU Family
Analog Peripherals
-
10-Bit ADC (‘F330/2/4 only)
•
Up to 200 ksps
•
Up to 16 external single-ended or differential inputs
•
VREF from internal VREF, external pin or V
DD
•
Internal or external start of conversion source
•
Built-in temperature sensor
-
10-Bit Current Output DAC (‘F330 only)
-
Comparator
•
Programmable hysteresis and response time
•
Configurable as interrupt or reset source
•
Low current (0.4 µA)
On-Chip Debug
-
On-chip debug circuitry facilitates full speed, non-
-
-
intrusive in-system debug (no emulator required)
Provides breakpoints, single stepping,
inspect/modify memory and registers
Superior performance to emulation systems using
ICE-chips, target pods, and sockets
Low cost,
complete
development kit
High Speed 8051 µC Core
-
Pipelined instruction architecture; executes 70% of
-
-
Memory
-
768 bytes internal data RAM (256 + 512)
-
8 kB (‘F330/1), 4 kB (‘F332/3), or 2 kB (‘F334/5)
Flash; In-system programmable in 512-byte Sec-
tors—512 bytes are reserved in the 8 kB devices
instructions in 1 or 2 system clocks
Up to 25 MIPS throughput with 25 MHz clock
Expanded interrupt handler
Digital Peripherals
-
17 Port I/O; All 5 V tolerant with high sink current
-
Hardware enhanced UART, SMBus™, and
-
-
-
enhanced SPI™ serial ports
Four general purpose 16-bit counter/timers
16-Bit programmable counter array (PCA) with three
capture/compare modules
Real time clock mode using PCA or timer and exter-
nal clock source
-
Supply Voltage 2.7 to 3.6 V
-
Typical operating current: 6.4 mA at 25 MHz;
-
Temperature Range: –40 to +85 °C
9 µA at 32 kHz
Typical stop mode current: 0.1 µA
Clock Sources
-
Two internal oscillators:
•
24.5 MHz with ±2% accuracy supports crystal-less
-
-
•
UART operation
80/40/20/10 kHz low frequency, low power
External oscillator: Crystal, RC, C, or clock
(1 or 2 pin modes)
Can switch between clock sources on-the-fly; useful
in power saving modes
20-Pin QFN or 20-pin PDIP
CROSSBAR
ANALOG
PERIPHERALS
A
M
U
X
DIGITAL I/O
UART
SMBus
SPI
PCA
Timer 0
Timer 1
Timer 2
Timer 3
Port 0
Port 1
P2.0
10-bit
200 ksps
ADC
10-bit
Current
DAC
‘F330 only
TEMP
SENSOR
‘F330/2/4 only
+
-
VOLTAGE
COMPARATOR
24.5 MHz PRECISION
INTERNAL OSCILLATOR
LOW FREQUENCY INTERNAL
OSCILLATOR
HIGH-SPEED CONTROLLER CORE
2/4/8 kB
ISP FLASH
FLEXIBLE
INTERRUPTS
8051 CPU
(25 MIPS)
DEBUG
CIRCUITRY
768 B SRAM
POR
WDT
Rev. 1.4 7/05
Copyright © 2005 by Silicon Laboratories
C8051F33x
This information applies to a product under development. Its characteristics and specifications are subject to change without notice.
C8051F330/1/2/3/4/5
N
OTES
:
2
Rev. 1.4
C8051F330/1/2/3/4/5
Table of Contents
1. System Overview.................................................................................................... 17
1.1. CIP-51™ Microcontroller Core.......................................................................... 22
1.1.1. Fully 8051 Compatible.............................................................................. 22
1.1.2. Improved Throughput ............................................................................... 22
1.1.3. Additional Features .................................................................................. 23
1.2. On-Chip Memory............................................................................................... 24
1.3. On-Chip Debug Circuitry................................................................................... 25
1.4. Programmable Digital I/O and Crossbar ........................................................... 26
1.5. Serial Ports ....................................................................................................... 26
1.6. Programmable Counter Array ........................................................................... 27
1.7. 10-Bit Analog to Digital Converter..................................................................... 28
1.8. Comparators ..................................................................................................... 29
1.9. 10-bit Current Output DAC................................................................................ 30
2. Absolute Maximum Ratings .................................................................................. 31
3. Global DC Electrical Characteristics .................................................................... 32
4. Pinout and Package Definitions............................................................................ 34
5. 10-Bit ADC (ADC0, C8051F330/2/4 only) .............................................................. 43
5.1. Analog Multiplexer ............................................................................................ 43
5.2. Temperature Sensor ......................................................................................... 44
5.3. Modes of Operation .......................................................................................... 45
5.3.1. Starting a Conversion............................................................................... 46
5.3.2. Tracking Modes........................................................................................ 47
5.3.3. Settling Time Requirements ..................................................................... 48
5.4. Programmable Window Detector ...................................................................... 53
5.4.1. Window Detector In Single-Ended Mode ................................................. 55
5.4.2. Window Detector In Differential Mode...................................................... 56
6. 10-Bit Current Mode DAC (IDA0, C8051F330 only).............................................. 59
6.1. IDA0 Output Scheduling ................................................................................... 59
6.1.1. Update Output On-Demand ..................................................................... 59
6.1.2. Update Output Based on Timer Overflow ................................................ 60
6.1.3. Update Output Based on CNVSTR Edge................................................. 60
6.2. IDAC Output Mapping....................................................................................... 60
7. Voltage Reference (C8051F330/2/4 only).............................................................. 63
8. Comparator0 ......................................................................................................... 67
9. CIP-51 Microcontroller .......................................................................................... 73
9.1. Instruction Set ................................................................................................... 74
9.1.1. Instruction and CPU Timing ..................................................................... 74
9.1.2. MOVX Instruction and Program Memory ................................................. 74
9.2. Memory Organization........................................................................................ 78
9.2.1. Program Memory...................................................................................... 79
9.2.2. Data Memory............................................................................................ 80
9.2.3. General Purpose Registers ...................................................................... 80
9.2.4. Bit Addressable Locations........................................................................ 80
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C8051F330/1/2/3/4/5
9.2.5. Stack ....................................................................................................... 80
9.2.6. Special Function Registers....................................................................... 81
9.2.7. Register Descriptions ............................................................................... 85
9.3. Interrupt Handler ............................................................................................... 87
9.3.1. MCU Interrupt Sources and Vectors ........................................................ 88
9.3.2. External Interrupts .................................................................................... 89
9.3.3. Interrupt Priorities ..................................................................................... 89
9.3.4. Interrupt Latency ...................................................................................... 89
9.3.5. Interrupt Register Descriptions................................................................. 91
9.4. Power Management Modes .............................................................................. 96
9.4.1. Idle Mode.................................................................................................. 96
9.4.2. Stop Mode ................................................................................................ 97
10. Reset Sources......................................................................................................... 99
10.1.Power-On Reset ............................................................................................. 100
10.2.Power-Fail Reset/VDD Monitor ...................................................................... 100
10.3.External Reset ................................................................................................ 101
10.4.Missing Clock Detector Reset ........................................................................ 101
10.5.Comparator0 Reset ........................................................................................ 102
10.6.PCA Watchdog Timer Reset .......................................................................... 102
10.7.Flash Error Reset ........................................................................................... 102
10.8.Software Reset ............................................................................................... 102
11. Flash Memory ....................................................................................................... 105
11.1.Programming The Flash Memory ................................................................... 105
11.1.1.Flash Lock and Key Functions ............................................................... 105
11.1.2.Flash Erase Procedure .......................................................................... 105
11.1.3.Flash Write Procedure ........................................................................... 106
11.2.Non-volatile Data Storage .............................................................................. 106
11.3.Security Options ............................................................................................. 107
12. External RAM ........................................................................................................ 111
13. Oscillators ............................................................................................................. 113
13.1.Programmable Internal High-Frequency (H-F) Oscillator ............................... 113
13.2.Programmable Internal Low-Frequency (L-F) Oscillator ................................ 115
13.2.1.Calibrating the Internal L-F Oscillator..................................................... 115
13.3.External Oscillator Drive Circuit...................................................................... 116
13.3.1.External Crystal Example....................................................................... 118
13.3.2.External RC Example............................................................................. 120
13.3.3.External Capacitor Example................................................................... 120
13.4.System Clock Selection.................................................................................. 121
14. Port Input/Output ................................................................................................ 123
14.1.Priority Crossbar Decoder .............................................................................. 125
14.2.Port I/O Initialization ....................................................................................... 127
14.3.General Purpose Port I/O ............................................................................... 129
15. SMBus ................................................................................................................... 135
15.1.Supporting Documents ................................................................................... 136
15.2.SMBus Configuration...................................................................................... 136
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C8051F330/1/2/3/4/5
15.3.SMBus Operation ........................................................................................... 136
15.3.1.Arbitration............................................................................................... 137
15.3.2.Clock Low Extension.............................................................................. 138
15.3.3.SCL Low Timeout................................................................................... 138
15.3.4.SCL High (SMBus Free) Timeout .......................................................... 138
15.4.Using the SMBus............................................................................................ 138
15.4.1.SMBus Configuration Register............................................................... 140
15.4.2.SMB0CN Control Register ..................................................................... 143
15.4.3.Data Register ......................................................................................... 146
15.5.SMBus Transfer Modes.................................................................................. 146
15.5.1.Master Transmitter Mode ....................................................................... 146
15.5.2.Master Receiver Mode ........................................................................... 148
15.5.3.Slave Receiver Mode ............................................................................. 149
15.5.4.Slave Transmitter Mode ......................................................................... 150
15.6.SMBus Status Decoding................................................................................. 150
16. UART0.................................................................................................................... 153
16.1.Enhanced Baud Rate Generation................................................................... 154
16.2.Operational Modes ......................................................................................... 155
16.2.1.8-Bit UART ............................................................................................. 155
16.2.2.9-Bit UART ............................................................................................. 156
16.3.Multiprocessor Communications .................................................................... 156
17. Enhanced Serial Peripheral Interface (SPI0)...................................................... 163
17.1.Signal Descriptions......................................................................................... 163
17.1.1.Master Out, Slave In (MOSI).................................................................. 164
17.1.2.Master In, Slave Out (MISO).................................................................. 164
17.1.3.Serial Clock (SCK) ................................................................................. 164
17.1.4.Slave Select (NSS) ................................................................................ 164
17.2.SPI0 Master Mode Operation ......................................................................... 164
17.3.SPI0 Slave Mode Operation ........................................................................... 166
17.4.SPI0 Interrupt Sources ................................................................................... 167
17.5.Serial Clock Timing......................................................................................... 167
17.6.SPI Special Function Registers ...................................................................... 169
18. Timers ................................................................................................................... 177
18.1.Timer 0 and Timer 1 ....................................................................................... 177
18.1.1.Mode 0: 13-bit Counter/Timer ................................................................ 177
18.1.2.Mode 1: 16-bit Counter/Timer ................................................................ 178
18.1.3.Mode 2: 8-bit Counter/Timer with Auto-Reload...................................... 179
18.1.4.Mode 3: Two 8-bit Counter/Timers (Timer 0 Only)................................. 180
18.2.Timer 2 .......................................................................................................... 185
18.2.1.16-bit Timer with Auto-Reload................................................................ 185
18.2.2.8-bit Timers with Auto-Reload................................................................ 186
18.3.Timer 3 .......................................................................................................... 189
18.3.1.16-bit Timer with Auto-Reload................................................................ 189
18.3.2.8-bit Timers with Auto-Reload................................................................ 190
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