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CA5260E

DUAL OP-AMP, 20000uV OFFSET-MAX, 3MHz BAND WIDTH, PDIP8, PLASTIC, MS-001BA, DIP-8

器件类别:模拟混合信号IC    放大器电路   

厂商名称:Rochester Electronics

厂商官网:https://www.rocelec.com/

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Rochester Electronics
零件包装代码
DIP
包装说明
PLASTIC, MS-001BA, DIP-8
针数
8
Reach Compliance Code
unknown
放大器类型
OPERATIONAL AMPLIFIER
最大平均偏置电流 (IIB)
0.015 µA
标称共模抑制比
60 dB
最大输入失调电压
20000 µV
JESD-30 代码
R-PDIP-T8
JESD-609代码
e0
长度
9.585 mm
湿度敏感等级
NOT APPLICABLE
负供电电压上限
标称负供电电压 (Vsup)
功能数量
2
端子数量
8
最高工作温度
125 °C
最低工作温度
-55 °C
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装形状
RECTANGULAR
封装形式
IN-LINE
峰值回流温度(摄氏度)
NOT SPECIFIED
座面最大高度
5.33 mm
标称压摆率
5 V/us
供电电压上限
16 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
BIMOS
温度等级
MILITARY
端子面层
TIN LEAD
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
标称均一增益带宽
3000 kHz
宽度
7.62 mm
文档预览
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CA5260, CA5260A
Data Sheet
August 2003
FN1929.4
3MHz, BiMOS Microprocessor Operational
Amplifiers with MOSFET Input/CMOS
Output
The CA5260A and CA507.260 are integrated-circuit
operational amplifiers that combine the advantage of both
CMOS and bipolar transistors on a monolithic chip. The
CA5260 series circuits are dual versions of the popular
CA5160 series. They are designed and guaranteed to operate
in microprocessor or logic systems that use +5V supplies.
Gate-protected P-Channel MOSFET (PMOS) transistors are
used in the input circuit to provide very-high-input impedance,
very-low-input current, and exceptional speed performance.
The use of PMOS field-effect transistors in the input stage
results in common-mode input-voltage capability down to 0.5V
below the negative-supply terminal, an important attribute in
single-supply applications.
A complementary-symmetry MOS (CMOS) transistor-pair,
capable of swinging the output voltage to within 10mV of
either supply-voltage terminal (at very high values of load
impedance), is employed as the output circuit.
The CA5260 Series circuits operate at supply voltages
ranging from 4.5V to 16V, or
±2.25V
to
±8V
when using split
supplies.
The CA5260, CA5260A have guaranteed specifications for 5V
operation over the full military temperature range of -55
o
C to
125
o
C.
Features
• MOSFET Input Stage provides
- Very High Z
I
= 1.5TΩ (1.5 x 10
12
Ω)
(Typ)
- Very Low I
I
= 5pA (Typ) at 15V Operation
= 2pA (Typ) at 5V Operation
• Ideal for Single Supply Applications
• Common Mode Input Voltage Range Includes
Negative Supply Rail; Input Terminals Can be
Swung 0.5V Below Negative Supply Rail
• CMOS Output Stage Permits Signal Swing to Either (or
Both) Supply Rails
• CA5260A, CA5260 Have Full Military Temperature Range
Guaranteed Specifications for V+ = 5V
• CA5260A, CA5260 are Guaranteed to Operate Down to
4.5V for A
OL
• Fully Guaranteed to Operate from -55
o
C to 125
o
C at
V+ = 5V, V- = GND
Applications
• Ground Referenced Single Supply Amplifiers
• Fast Sample-Hold Amplifiers
• Long Duration Timers/Monostables
• Ideal Interface with Digital CMOS
• High Input Impedance Wideband Amplifiers
Ordering Information
PART NUMBER
(BRAND)
CA5260AM96
(5260A)
CA5260E
CA5260M
(5260)
CA5260M96
(5260)
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
8 Ld SOIC Tape
and Reel
8 Ld PDIP
8 Ld SOIC
8 Ld SOIC Tape
and Reel
PKG.
DWG. #
M8.15
E8.3
M8.15
M8.15
• Voltage Followers (e.g., Follower for Single Supply D/A
Converter)
• Voltage Regulators (Permits Control of Output Voltage
Down to 0V)
• Wien Bridge Oscillators
• Voltage Controlled Oscillators
• Photo Diode Sensor Amplifiers
• 5V Logic Systems
• Microprocessor Interface
Pinout
CA5260 (PDIP, SOIC)
TOP VIEW
OUTPUT (A)
INV. INPUT (A)
NON INV. INPUT (A)
V-
1
A
2
3
4
8
7
B
+
6
5
V+
OUTPUT (B)
INV. INPUT (B)
NON INV. INPUT (B)
-
+
-
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
CA5260, CA5260A
Absolute Maximum Ratings
Supply Voltage (Between V+ and V- Terminals) . . . . . . . . . . . . 16V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . (V+ +8V) to (V- -0.5V)
Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1mA
Output Short Circuit Duration (Note 1). . . . . . . . . . . . . . . . Indefinite
Thermal Information
Thermal Resistance (Typical, Note 2)
θ
JA
(
o
C/W)
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
105
SOIC Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
157
Maximum Junction Temperature (Die) . . . . . . . . . . . . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . -65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300
o
C
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. Short circuit may be applied to ground or to either supply.
2.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Typical Values Intended Only for Design Guidance, V+ = 5V, V- = 0V, T
A
= 25
ο
C,
Unless Otherwise Specified
TYPICAL VALUES
PARAMETER
Input Resistance
Input Capacitance
Unity Gain Crossover Frequency
Slew Rate
Transient Response
Rise Time
Overshoot
Settling Time (To <0.1%, V
IN
= 4V
P-P
)
SYMBOL
RI
C
I
f
T
SR
TEST CONDITIONS
CA5260
1.5
CA5260A
1.5
4.3
3
5
UNITS
TΩ
pF
MHz
V/µs
µs
%
µs
f = 1MHz
4.3
3
V
OUT
= 2.5V
P-P
C
L
= 25pF, R
L
= 2kΩ
(Voltage Follower)
5
t
r
OS
t
S
0.09
10
0.09
10
1.8
C
L
= 25pF, R
L
= 2kΩ
(Voltage Follower)
1.8
Electrical Specifications
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Common Mode Rejection
Ratio
Common Mode Input
Voltage Range
Power Supply Rejection
Ratio
Large Signal Voltage Gain
(Note 3)
T
A
= 25
o
C, V+ = 5V, V- = 0V
TEST
CONDITIONS
V
O
= 2.5V
V
O
= 2.5V
V
O
= 2.5V
V
CM
= 0 to 1V
V
CM
= 0 to 2.5V
V
lCR
+
V
lCR
-
PSRR
A
OL
∆V+
= 1V;
∆V-
= 1V
R
L
=
, V
O
= 0.5 to 4V
R
L
= 10kΩ,
V
O
= 0.5 to 3.6V
CA5260
MIN
-
-
-
70
50
2.5
-
70
105
80
1.75
1.70
4.99
-
TYP
2
1
2
85
55
3
-0.5
84
111
86
2.2
2
5
0
MAX
15
10
15
-
-
-
0
-
-
-
-
-
-
0.01
MIN
-
-
-
80
50
2.5
-
75
107
83
1.75
1.70
4.99
-
CA5260A
TYP
1.5
1
2
85
55
3
-0.5
84
113
86
2.2
2
5
0
MAX
4
10
15
-
-
-
0
-
-
-
-
-
-
0.01
UNITS
mV
pA
pA
dB
dB
V
V
dB
dB
dB
mA
mA
V
V
SYMBOL
V
IO
I
IO
I
I
CMRR
Source Current
Sink Current
Output Voltage
I
SOURCE
I
SINK
V
OM
+
V
OM
-
V
O
= 0V
V
O
= 5V
R
L
=
2
CA5260, CA5260A
Electrical Specifications
PARAMETER
T
A
= 25
o
C, V+ = 5V, V- = 0V
(Continued)
TEST
CONDITIONS
R
L
= 10kΩ
CA5260
MIN
4.4
-
R
L
= 2kΩ
3
-
V
O
= 0V
V
O
= 2.5V
NOTE:
3. For V+ = 4.5V and V- = GND; V
OUT
= 0.5V to 3.2V at R
L
= 10kΩ.
-
-
TYP
4.7
0
3.4
0
1.60
1.80
MAX
-
0.01
-
0.01
2.0
2.25
MIN
4.4
-
3
-
-
-
CA5260A
TYP
4.7
0
3.4
0
1.60
1.80
MAX
-
0.01
-
0.01
2.0
2.25
UNITS
V
V
V
V
mA
mA
SYMBOL
V
OM
+
V
OM
-
V
OM
+
V
OM
-
Supply Current
I
SUPPLY
Electrical Specifications
T
A
= -55
o
C to 125
o
C, V+ = 5V, V- = 0V
TEST
CONDITIONS
V
O
= 2.5V
V
O
= 2.5V
V
O
= 2.5V
V
CM
= 0 to 1V
V
CM
= 0 to 2.5V
CA5260
MIN
-
-
-
60
50
2.5
-
∆V+
= 1V;
∆V-
= 1V
R
L
=
,
V
O
= 0.5 to 4V
R
L
= 10kΩ,
V
O
= 0.5 to 3.6V
60
70
60
1.3
1.2
4.99
-
R
L
= 10kΩ
4.2
-
R
L
= 2kΩ
2.5
-
V
O
= 0V
V
O
= 2.5V
-
-
TYP
3
1
2
78
60
3
-0.5
65
78
65
1.6
1.4
5
0
4.4
0
2.7
0
1.65
1.95
MAX
20
10
15
-
-
-
0
-
-
-
-
-
-
0.01
-
0.01
-
0.01
2.2
2.35
MIN
-
-
-
65
50
2.5
-
62
70
60
1.3
1.2
4.99
-
4.2
-
2.5
-
-
-
CA5260A
TYP
2
1
2
78
60
3
-0.5
65
78
65
1.6
1.4
5
0
4.4
0
2.7
0
1.65
1.95
MAX
15
10
15
-
-
-
0
-
-
-
-
-
-
0.01
-
0.01
-
0.01
2.2
2.35
UNITS
mV
nA
nA
dB
dB
V
V
dB
dB
dB
mA
mA
V
V
V
V
V
V
mA
mA
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Common Mode Rejection Ratio
SYMBOL
V
IO
I
IO
I
I
CMRR
Common Mode Input Voltage
Range
Power Supply Rejection Ratio
Large Signal Voltage Gain (Note 4)
V
lCR
+
V
lCR
-
PSRR
A
OL
Source Current
Sink Current
Output Voltage
I
SOURCE
I
SINK
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
OM
+
V
OM
-
V
O
= 0V
V
O
= 5V
R
L
=
Supply Current
I
SUPPLY
NOTE:
4. For V+ = 4.5V and V- = GND; V
OUT
= 0.5V to 3.2V at R
L
= 10kΩ.
3
CA5260, CA5260A
Electrical Specifications
Each Amplifier at T
A
= 25
o
C, V+ = 15V, V- = 0V, Unless Otherwise Specified
TEST
CONDITIONS
V
S
=
±7.5
V
S
=
±7.5
V
S
=
±7.5
V
O
= 10V
P-P
,
R
L
= 10kΩ
CA5260
MIN
-
-
-
50
94
70
10
V
S
=
±7.5
R
L
= 10kΩ
R
L
=
-
11
-
14.99
-
V
O
= 7.5V
12
12
V
O
(Amp A) = 7.5V
V
O
(Amp B) = 7.5V
V
O
(Amp A) = 0V
V
O
(Amp B) = 0V
V
O
(Amp A) = 0V V
O
(Amp B) = 7.5V
Input Offset Voltage
Temperature Drift
Crosstalk
∆V
IO
/∆T
f = 1kHz
-
-
-
-
-
TYP
6
0.5
5
320
110
90
-0.5 to
12
32
13.3
0.002
15
0
22
20
9
1.2
5
8
120
MAX
15
30
50
-
-
-
0
320
-
0.01
-
0.01
45
45
16.5
4
9.5
-
-
MIN
-
-
-
50
94
80
10
-
11
-
14.99
-
12
12
-
-
-
-
-
CA5260A
TYP
2
0.5
5
320
110
95
-0.5 to
12
32
13.3
0.002
15
0
22
20
9
1.2
5
6
120
MAX
5
20
30
-
-
-
0
150
-
0.01
-
0.01
45
45
16.5
4
9.5
-
-
UNITS
mV
pA
pA
kV/V
dB
dB
V
µV/V
V
V
V
V
mA
mA
mA
mA
mA
µV/
o
C
dB
PARAMETER
Input Offset Voltage
Input Offset Current
Input Current
Large Signal Voltage Gain
SYMBOL
V
IO
I
IO
I
I
A
OL
Common Mode Rejection Ratio
Common Mode Input Voltage
Range
Power Supply Rejection Ratio,
∆V
IO
/
∆V±
Maximum Output Voltage
CMRR
V
lCR
PSRR
V
OM
+
V
OM
-
V
OM
+
V
OM
-
Maximum Output Current
I
OM
+
(Source)
I
OM
- (Sink)
Total Supply Current, R
L
=
I+
4
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