Soldering Profile for RoHS Compliant Chip Resistors and Arrays
275
<1>
Maximum of 20 seconds between
+255 °C and +260 °C
260 °C peak
<1>
255 °C
225
Temperature (°C)
220 °C
190 °C
175
150 °C
60 - 90
seconds
Ramp Down
6 °C/second
60 - 120 seconds
10 seconds minimum
75
Ramp Up
3 °C/second maximum
25
Chip Arrays
Type
• CAT16 = Concave Terminations
• CAY16 = Convex Terminations
Resistance Code
• For 1 % Tolerance:
<100 ohms - “R” represents decimal
point (example: 24R3 = 24.3 ohms)
≥100 ohms - First three digits are
significant, fourth digit represents
number of zeros to follow (example:
8252 = 82.5k ohms)
• For 5 % Tolerance:
<10 ohms - “R” represents decimal
point (example: 4R7 = 4.7 ohms)
≥10 ohms - First two digits are signifi-
cant, third digit represents number of
zeros to follow (example: 474 = 470k
ohms)
• 000 = Zero Ohm Jumper
Resistance Tolerance
• J = ±5 % (2, 4, 8 resistor pkg. and for
Zero Ohm Jumper)
• F = ±1 % (4 resistor pkg. and CAT16-F8)
Resistors
• 2 = 2 Isolated Resistors
• 4 = 4 Isolated Resistors
• 8 = 8 Isolated Resistors
Terminations
• LF = Tin-plated (RoHS compliant)
CA Y 16 - 103 J 4 LF
125
Packaging Size
J2 .......... 0606 Package Size
F4, J4 .... 1206 Package Size
F8 .......... 2406 Package Size for CAT16
J8 .......... 2406 Package Size for CAT16;
1506 Package Size for CAY16
0
50
100
150
200
250
300
Time (Seconds)
For Standard Values Used in Capacitors,
Inductors, and Resistors,
click here.
*RoHS Directive 2015/863, Mar 31, 2015 and Annex.
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
WARNING Cancer and Reproductive Harm -
www.P65Warnings.ca.gov
CAT/CAY 16 Series - Chip Resistor Arrays
Derating Curve
Rated power in percentage (%)
100
80
60
40
20
0
-55
0
70
125
CAT16-F8, -J8
CAY16-J8
R1
R2
R3
R4
R5
R6
R7
R8
Schematics
CAT16-J2
CAY16-J2
R1
R2
CAT16-F4, -J4
CAY16-F4, -J4
R1
R2
R3
R4
Ambient Temperature (˚C)
Dimensions
Model
CAT16-F4
CAT16-J4
CAY16-F4, -J4
CAT16-J2
CAY16-J2
CAT16-F8, -J8
CAY16-J8
A
0.40 ± 0.15
(.016 ± .006)
0.40 ± 0.15
(.016 ± .006)
0.50 ± 0.15
(.020 ± .006)
0.40 ± 0.15
(.016 ± .006)
—
0.40 ± 0.15
(.016 ± .006)
0.30 ± 0.15
(.012 ± .006)
A’
—
—
0.70 ± 0.10
(.027 ± .004)
—
0.60 ± 0.15
(.024 ± .006)
—
0.30 ± 0.15
(.012 ± .006)
B
3.20 ± 0.20
(.126 ± .008)
C
0.80 ± 0.10
(.032 ± .004)
D
1.60 ± 0.20
(.063 ± .008)
E
0.50 ± 0.10
(.020 ± .004)
0.50 ± 0.10
(.020 ± .004)
0.50 ± 0.10
(.020 ± .004)
0.60 ± 0.15
(.024 ± .006)
0.45 +0.15/-0.10
(.018 +0.006/-0.004)
0.60 ± 0.15
(.024 ± .006)
0.50 ± 0.10
(.020 ± .004)
F
0.30 ± 0.15
(.012 ± .006)
0.30 ± 0.20
(.012 ± .008)
0.30 ± 0.20
(.012 ± .008)
0.30 ± 0.20
(.012 ± .008)
0.30 ± 0.20
(.012 ± .008)
0.30 ± 0.20
(.012 ± .008)
0.30 ± 0.15
(.012 ± .006)
3.20 ± 0.20
0.80 ± 0.10
1.55 ± 0.25
(.126 ± .008) (.032 ± ± .004) (.061 ± .0098)
3.20 ± 0.20
(.126 ± .008)
1.60 ± 0.15
(.063 ± .006)
1.60 ± 0.15
(.063 ± .006)
6.40 ± 0.20
(.252 ± .008)
3.80 ± 0.20
(.15 ± .008)
0.80 ± 0.05
(.032 ± .002)
0.80 ± 0.05
(.032 ± .002)
0.76 ± 0.10
(.030 ± .004)
0.80 ± 0.15
(.032 ± .006)
0.50 ± 0.05
(.02 ± .002)
1.60 ± 0.20
(.063 ± .008)
1.60 ± 0.15
(.063 ± .006)
1.60 ± 0.15
(.063 ± .006)
1.60 ± 0.20
(.063 ± .008)
1.60 ± 0.20
(.063 ± .008)
Configurations
CAT16-F4, -J4
A
CAT16-F4, -J4
A
F
F
C
B
C
B
CAY16-F4, -J4
A'
CAY16-F4, -J4
A'
A
A
F
F
C
B
C
B
CAT16-J2
A
CAT16-J2
A
F
F
C
B
B
C
CAY16-J2
A'
CAY16-J2
A'
F
F
C
B
C
B
E
E
D
D
F
F
DIMENSIONS:
MM
(INCHES)
CAT16-F8, -J8
A
CAT16-F8, -J8
A
F
F
C
C
B
B
CAY16-J8
A'
CAY16-J8
A'
A
A
F
F
C
B
C
B
E
E
D
D
F
F
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
CAT/CAY 16 Series - Chip Resistor Arrays
Land Patterns
CAT16-F4, -J4, -F8, -J8
Solder
resist
f
Land
f
CAY16-F4, -J4, -J8
Solder
resist
Land
CAT16-J2
p
Solder
resist
Land
CAY16-J2
p
Solder
resist
Land
f
f
Chip
resistor
array
a
a
Chip
resistor
array
a
Chip
resistor
array
a
Chip
resistor
array
b
p
b
p
b
b
Model
CAT16-F4, -J4, -F8, -J8
CAY16-F4, -J4
CAY16-J8
CAT16-J2
CAY16-J2
Packaging Dimensions
1.0
MAX.
(.039)
1.5 + 0.1 - 0
(.059 + .004 - 0)
a
0.7 to 0.9
(.028 to .035)
0.7 to 0.9
(.028 to .035)
0.7 to 0.9
(.028 to .035)
0.7 to 0.9
(.028 to .035)
0.7 to 0.9
(.028 to .035)
b
0.4 to 0.45
(.016 to .0178)
0.4 to 0.45
(.016 to .0178)
0.3 to 0.35
(.012 to .014)
0.4 to 0.45
(.016 to .0178)
0.4 to 0.5
(.016 to .020)
p
0.80
(.032)
0.80
(.032)
0.50
(.020)
0.80
(.032)
0.80
(.032)
f
2.2 to 2.6
(.087 to .102)
2.4 to 2.8
(.094 to .11)
2.0 to 2.2
(.079 to .087)
2.2 to 2.6
(.087 to .102)
2.0 to 2.6
(.079 to .102)
4.0 ± 0.1
(.158 ± .004)
2.0 ± 0.5
(.079 ± .020)
13.0 ± 0.5
(.511 ± .020)
b
c
60
(2.362)
a
DIMENSIONS:
MM
(INCHES)
2.0 + 0.1/-0.2
(.08 + .004/-.008)
4.0 ± 0.1
(.157 ± .004)
180
(7.087)
21.0 ± 0.8
(.827 ± .031)
d
e
Model
CAT16-F4, -J4 & CAY16-F4, J4
CAT16-J2 & CAY16-J2
CAT16-F8, -J8
CAY16-J8
• 5,000 pcs. per reel (J2, J4, CAY16-J8)
4,000 pcs. per reel (CAT16-F8, -J8)
• Paper tape
a
3.60 ± 0.20
(.142 ± .008)
1.80 ± 0.10
(.070 ± .004)
6.90 ± 0.20
(.272 ± .008)
4.10 ± 0.15
(.161 ± .012)
b
3.50 ± .005
(.138 ± .004)
3.50 ± .005
(.138 ± .004)
5.50 ± 0.10
(.217 ± .004)
3.50 ± 0.05
(.138 ± .002)
c
8.0 ± 0.3
(.315 ± .012)
8.0 ± 0.3
(.315 ± .012)
12.0 ± 0.2
(.472 ± .008)
8.0 ± 0.3
(.315 ± .012)
d
9.0 ± 0.3
(.354 ± .012)
9.0 ± 0.3
(.354 ± .012)
13.0 ± 0.2
(.512 ± .008)
9.0 ± 0.3
(.354 ± .012)
e
11.4 ± 1.0
(.449 ± .040)
11.4 ± 1.0
(.449 ± .040)
15.4 ± 1.0
(.606 ± .040)
11.4 ± 1.0
(.449 ± .040)
REV. 12/20
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
Chip Resistor Arrays - Application Note
Component Placement
a. Reduce the mechanical stress to a minimum during and after placing of the unit in order not to damage the terminals and
protective coating.
b. Misplacement of components may cause solder bridges.
a. Reflow soldering: Recommendation is shown in the following chart.
b. Wave soldering: Recommendation according to IEC standards.
c. Hand soldering: Don’t touch the protective coating of the part. Solder within 3 seconds when the temperature is over 280 ºC.
Soldering
Temperature (°C)
250
200
150
100
50
0
Preheating
Soldering
Gradual Cooling
60 sec. min.
10-30 sec.
120 sec. min.
Specifications are subject to change without notice.
Users should verify actual device performance in their specific applications.
The products described herein and this document are subject to specific legal disclaimers as set forth on the last page of this document, and at www.bourns.com/docs/legal/disclaimer.pdf.
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关于激光雷达，业界最激烈的反对意见来自马斯克。早在5年前，马斯克就发表了他那个著名的观点，「Anyone relying on Lidar is doomed（靠LiDAR搞自动驾驶早晚完蛋）。」 5年之后，激光雷达在中国市场率先爆发，2023年中国市场的车载前装ADAS激光雷达出货量达到约80万台。 不过相比于激光雷达快速增长的应用规模，以及它本身不算便宜的成本，激光雷达的作用还没有完...[详细]
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