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CAT22C10LE-30

64X4 NON-VOLATILE SRAM, 300ns, PDIP18, ROHS COMPLIANT, PLASTIC, DIP-18

器件类别:存储    存储   

厂商名称:ON Semiconductor(安森美)

厂商官网:http://www.onsemi.cn

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
零件包装代码
DIP
包装说明
DIP, DIP18,.3
针数
18
Reach Compliance Code
compliant
最长访问时间
300 ns
JESD-30 代码
R-PDIP-T18
长度
21.97 mm
内存密度
256 bit
内存集成电路类型
NON-VOLATILE SRAM
内存宽度
4
功能数量
1
端子数量
18
字数
64 words
字数代码
64
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-40 °C
组织
64X4
封装主体材料
PLASTIC/EPOXY
封装代码
DIP
封装等效代码
DIP18,.3
封装形状
RECTANGULAR
封装形式
IN-LINE
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
5 V
认证状态
Not Qualified
座面最大高度
4.57 mm
最大待机电流
0.00003 A
最大压摆率
0.04 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
NO
技术
CMOS
温度等级
AUTOMOTIVE
端子形式
THROUGH-HOLE
端子节距
2.54 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.62 mm
Base Number Matches
1
文档预览
CAT22C10
256-Bit Nonvolatile CMOS Static RAM
FEATURES
s
Single 5V Supply
s
Fast RAM Access Times:
s
Low CMOS Power Consumption:
–200ns
–300ns
s
Infinite EEPROM to RAM Recall
s
CMOS and TTL Compatible I/O
s
Power Up/Down Protection
s
100,000 Program/Erase Cycles (E
2
PROM)
–Active: 40mA Max.
–Standby: 30
µ
A Max.
s
JEDEC Standard Pinouts:
–18-lead DIP
–16-lead SOIC
s
10 Year Data Retention
s
Commercial, Industrial and Automotive
Temperature Ranges
DESCRIPTION
The CAT22C10 NVRAM is a 256-bit nonvolatile memory
organized as 64 words x 4 bits. The high speed Static
RAM array is bit for bit backed up by a nonvolatile
EEPROM array which allows for easy transfer of data
from RAM array to EEPROM (STORE) and from
EEPROM to RAM (RECALL). STORE operations are
completed in 10ms max. and RECALL operations typi-
cally within 1.5µs. The CAT22C10 features unlimited
RAM write operations either through external RAM
writes or internal recalls from EEPROM. Internal false
store protection circuitry prohibits STORE operations
when V
CC
is less than 3.0V.
The CAT22C10 is manufactured using Catalyst’s ad-
vanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles (EEPROM)
and has a data retention of 10 years. The device is
available in JEDEC approved 18-lead plastic DIP and
16-lead SOIC packages.
PIN CONFIGURATION
DIP Package (L)
SOIC Package (W)
A4
A3
A2
A1
A0
CS
Vss
STORE
PIN FUNCTIONS
Pin Name
A
0
–A
5
Function
Address
Data In/Out
Write Enable
Chip Select
Recall
Store
+5V
Ground
No Connect
NC
A4
A3
A2
A1
A0
CS
Vss
STORE
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
Vcc
NC
A5
I/O3
I/O2
I/O1
I/O0
WE
RECALL
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Vcc
A5
I/O4
I/O3
I/O2
I/O1
WE
RECALL
I/O
0
–I/O
3
WE
CS
RECALL
STORE
V
CC
V
SS
NC
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
1
Doc. No. MD-1082, Rev. R
CAT22C10
BLOCK DIAGRAM
EEPROM ARRAY
A0
A1
A2
A3
A4
A5
STORE
RECALL
ROW
STATIC RAM
STORE
SELECT
ARRAY
RECALL
COLUMN SELECT
CONTROL
LOGIC
READ/WRITE
CIRCUITS
CS
WE
I/O0 I/O1 I/O2 I/O3
MODE SELECTION
(1)(2)(3)
Input
Mode
Standby
RAM Read
RAM Write
(EEPROM→RAM)
(EEPROM→RAM)
(RAM→EEPROM)
(RAM→EEPROM)
POWER-UP TIMING
(4)
Symbol
VCCSR
Parameter
V
CC
Slew Rate
Min.
0.5
Max.
0.005
Units
V/ms
CS
H
L
L
X
H
X
H
WE
X
H
L
H
X
H
X
RECALL
H
H
H
L
L
H
H
STORE
H
H
H
H
H
L
L
I/O
Output High-Z
Output Data
Input Data
Output High-Z RECALL
Output High-Z RECALL
Output High-Z STORE
Output High-Z STORE
Note:
(1)
RECALL
signal has priority over
STORE
signal when both are applied at the same time.
(2)
STORE
is inhibited when
RECALL
is active.
(3) The store operation is inhibited when V
CC
is below
3.0V.
(4) This parameter is tested initially and after a design or process change that affects the parameter.
Doc. No. MD-1082, Rev. R
2
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
CAT22C10
ABSOLUTE MAXIMUM RATINGS*
Temperature Under Bias ................. –55°C to +125°C
Storage Temperature ....................... –65°C to +150°C
Voltage on Any Pin with
Respect to Ground
(2)
.............. -2.0 to +VCC +2.0V
V
CC
with Respect to Ground ................ -2.0V to +7.0V
Package Power Dissipation
Capability (Ta = 25°C) ................................... 1.0W
Lead Soldering Temperature (10 secs) ............ 300°C
Output Short Circuit Current
(3)
........................ 100 mA
RELIABILITY CHARACTERISTICS
Symbol
N
END(1)
T
DR(1)
V
ZAP(1)
I
LTH(1)(4)
Parameter
Endurance
Data Retention
ESD Susceptibility
Latch-Up
Min.
100,000
10
2000
100
Max.
*COMMENT
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation
of the device at these or any other conditions outside of
those listed in the operational sections of this specifica-
tion is not implied. Exposure to any absolute maximum
rating for extended periods may affect device perfor-
mance and reliability.
Units
Cycles/Byte
Years
Volts
mA
Reference Test Method
MIL-STD-883, Test Method 1033
MIL-STD-883, Test Method 1008
MIL-STD-883, Test Method 3015
JEDEC Standard 17
D.C. OPERATING CHARACTERISTICS
V
CC
= +5V
±10%,
unless otherwise specified.
Limits
Symbol
I
CC
Parameter
Current Consumption
(Operating)
Current Consumption
(Standby)
Input Current
Output Leakage Current
High Level Input Voltage
Low Level Input Voltage
High Level Output Voltage
Low Level Output Voltage
RAM Data Holding Voltage
1.5
2
0
2.4
0.4
5.5
Min.
Typ.
Max.
40
Unit
mA
Conditions
All Inputs = 5.5V
T
A
= 0°C
All I/O’s Open
CS = V
CC
All I/O’s Open
0
V
IN
5.5V
0
V
OUT
5.5V
I
SB
I
LI
I
LO
V
IH
V
IL
V
OH
V
OL
V
DH
30
10
10
V
CC
0.8
µA
µA
µA
V
V
V
V
V
I
OH
= –2mA
I
OL
= 4.2mA
V
CC
CAPACITANCE
T
A
= 25°C, f = 1.0 MHz, V
CC
= 5V
Symbol
C
I/O(1)
C
IN(1)
Parameter
Input/Output Capacitance
Input Capacitance
Max.
10
6
Unit
pF
pF
Conditions
V
I/O
= 0V
V
IN
= 0V
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
(2) The minimum DC input voltage is -0.5V. During transitions, inputs may undershoot to -2.0V for periods of less than 20 ns. Maximum DC
voltage on output pins is V
CC
+0.5V, which may overshoot to V
CC
+2.0V for periods of less than 20 ns.
(3) Output shorted for no more than one second. No more than one output shorted at a time.
(4) Latch-up protection is provided for stresses up to 100 mA on address and data pins from -1V to V
CC
+1V.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
3
Doc No. MD-1082, Rev. R
CAT22C10
A.C. CHARACTERISTICS, Write Cycle
V
CC
= +5V
±10%,
unless otherwise specified.
22C10-20
Symbol
t
WC
t
CW
t
AS
t
WP
t
WR
t
DW
t
DH
t
WZ(1)
t
OW
Parameter
Write Cycle Time
CS Write Pulse Width
Address Setup Time
Write Pulse Width
Write Recovery Time
Data Valid Time
Data Hold Time
Output Disable Time
Output Enable Time
0
Min.
200
150
50
150
25
100
0
100
0
Max.
22C10-30
Min.
300
150
50
150
25
100
0
100
Max.
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
L
= 100pF
+1TTL gate
V
OH
= 2.2V
V
OL
= 0.65V
V
IH
= 2.2V
V
IL
= 0.65V
Conditions
A.C. CHARACTERISTICS, Read Cycle
V
CC
= +5V
±10%,
unless otherwise specified.
22C10-20
Symbol
t
RC
t
AA
t
CO
t
OH
t
LZ(1)
t
HZ(1)
Parameter
Read Cycle Time
Address Access Time
CS Access Time
Output Data Hold Time
CS Enable Time
CS Disable Time
0
0
100
Min.
200
200
200
0
0
100
Max.
22C10-30
Min.
300
300
300
Max.
Unit
ns
ns
ns
ns
ns
ns
Conditions
C
L
= 100pF
+1TTL gate
V
OH
= 2.2V
V
OL
= 0.65V
V
IH
= 2.2V
V
IL
= 0.65V
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
Doc. No. MD-1082, Rev. R
4
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
CAT22C10
A.C. CHARACTERISTICS, Store Cycle
V
CC
= +5V
±10%,
unless otherwise specified.
Limits
Symbol
t
STC
t
STP
t
STZ(1)
t
OST(1)
Parameter
Store Time
Store Pulse Width
Store Disable Time
Store Enable Time
0
200
100
Min.
Max.
10
Units
ms
ns
ns
ns
C
L
= 100pF + 1TTL gate
V
OH
= 2.2V, V
OL
= 0.65V
V
IH
= 2.2V, V
IL
= 0.65V
Conditions
A.C. CHARACTERISTICS, Recall Cycle
V
CC
= +5V
±10%,
unless otherwise specified.
Limits
Symbol
t
RCC
t
RCP
t
RCZ
t
ORC
t
ARC
Parameter
Recall Cycle Time
Recall Pulse Width
Recall Disable Time
Recall Enable Time
Recall Data Access Time
0
1.1
Min.
1.4
300
100
Max.
Units
µs
ns
ns
ns
µs
C
L
= 100pF + 1TTL gate
V
OH
= 2.2V, V
OL
= 0.65V
V
IH
= 2.2V, V
IL
= 0.65V
Conditions
Note:
(1) This parameter is tested initially and after a design or process change that affects the parameter.
© 2009 SCILLC. All rights reserved.
Characteristics subject to change without notice.
5
Doc No. MD-1082, Rev. R
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