w
DESCRIPTION
The WM8737L is a low power stereo audio ADC designed
specifically for portable applications such as minidisc and
memory audio / voice recorders.
The device offers three sets of stereo inputs, which can be
configured for line-level signals, for internal or table-top
microphones, or for DC measurement (battery monitor). A
programmable gain amplifier can be used for automatic level
control (ALC) with user programmable hold, attack and
decay times. The device also has a selectable high pass
filter to remove residual DC offsets.
If the signal source is mono, the WM8737L can run in mono
mode, saving power. It can also mix two channels to mono,
either in the analogue or the digital domain.
Master or slave mode clocking schemes are offered. Stereo
24-bit multi-bit sigma-delta ADCs are used with digital audio
output word lengths from 16-32 bits, and sampling rates
from 16kHz to 96kHz supported.
The device is controlled via a 2 or 3 wire serial interface.
The interface provides access to all features including gain
controls, analogue or digital mono mixing, and power
management facilities. The device is supplied in a leadless
5x5mm QFN package.
WM8737L
Stereo ADC with Microphone Preamplifier
FEATURES
SNR 97dB (‘A’ weighted @ 3.3V, 48kHz, normal power
mode)
THD –84dB (at –1dB, 3.3V, normal power mode)
Complete Stereo / Mono Microphone Interface
- Programmable microphone preamp
- Automatic Level Control
- Low-noise microphone bias voltage
Configurable Power / Performance
Low Power Mode
- 8.5mW at AVDD = 1.8V (stereo, mic preamps off)
- 20mW at AVDD = 3.3V (stereo, mic preamps off)
Low Supply Voltages
- Analogue 1.8V to 3.6V
- Digital core: 1.42V to 3.6V
- Digital I/O: 1.8V to 3.6V
256fs / 384fs or USB master clock rates: 12MHz, 24MHz
Audio sample rates: 16, 22.05, 24, 32, 44.1, 48, 88.2, 96kHz
generated internally from master clock
32-pin QFN package, 5 x 5 x 0.9mm
APPLICATIONS
Memory Audio / Voice Recorders
Minidisc Recorders
Portable Digital Music Systems
BLOCK DIAGRAM
LINSEL
RINSEL
VREFP
VREFN
AVDD
VREF
50K
SDI N
CSB
VMID
MODE
VREFP
VREFN
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up
at
http://www.wolfsonmicro.com/enews
Production Data, January 2012, Rev 4.4
Copyright
2012
Wolfson Microelectronics plc
AGND
SCLK
AUDIO
INTERFACE
WM8737L
TABLE OF CONTENTS
Production Data
DESCRIPTION ....................................................................................................... 1
FEATURES ............................................................................................................ 1
APPLICATIONS..................................................................................................... 1
BLOCK DIAGRAM ................................................................................................ 1
TABLE OF CONTENTS ......................................................................................... 2
PIN CONFIGURATION .......................................................................................... 3
ORDERING INFORMATION .................................................................................. 3
PIN DESCRIPTION ................................................................................................ 4
ABSOLUTE MAXIMUM RATINGS ........................................................................ 5
RECOMMENDED OPERATING CONDITIONS ..................................................... 5
ELECTRICAL CHARACTERISTICS ..................................................................... 6
TERMINOLOGY ............................................................................................................... 8
POWER CONSUMPTION ...................................................................................... 9
SIGNAL TIMING REQUIREMENTS .................................................................... 11
DEVICE DESCRIPTION ...................................................................................... 14
INTRODUCTION ............................................................................................................ 14
INPUT SIGNAL PATH .................................................................................................... 14
ANALOGUE TO DIGITAL CONVERTER (ADC) ............................................................ 19
3D STEREO ENHANCEMENT ...................................................................................... 20
AUTOMATIC LEVEL CONTROL (ALC) ......................................................................... 21
DIGITAL AUDIO INTERFACE ........................................................................................ 24
MASTER CLOCK AND AUDIO SAMPLE RATES .......................................................... 28
CONTROL INTERFACE................................................................................................. 30
POWER SUPPLIES ....................................................................................................... 31
POWER MANAGEMENT ............................................................................................... 31
REGISTER MAP .................................................................................................. 32
DIGITAL FILTER CHARACTERISTICS .............................................................. 33
TERMINOLOGY ............................................................................................................. 33
DIGITAL FILTER RESPONSES ..................................................................................... 34
APPLICATIONS INFORMATION ........................................................................ 36
LINE INPUT CONFIGURATION..................................................................................... 36
MICROPHONE INPUT CONFIGURATION .................................................................... 36
RECOMMENDED EXTERNAL COMPONENTS.................................................. 37
PACKAGE DIMENSIONS .................................................................................... 38
IMPORTANT NOTICE ......................................................................................... 39
ADDRESS: ..................................................................................................................... 39
REVISION HISTORY ........................................................................................... 40
w
PD, Rev 4.4, January 2012
2
Production Data
WM8737L
PIN CONFIGURATION
ORDERING INFORMATION
ORDER CODE
WM8737CLGEFL
TEMPERATURE
RANGE
-25C to +85C
PACKAGE
32-pin QFN (5x5x0.9mm)
lead free
32-pin QFN (5x5x0.9mm)
lead free, tape
and reel
MOISTURE SENSITIVITY
LEVEL
MSL1
PEAK SOLDERING
TEMPERATURE
260°C
WM8737CLGEFL/R
-25C to +85C
MSL1
260°C
Note:
Reel Quantity = 3,500
w
PD, Rev 4.4, January 2012
3
WM8737L
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
NAME
NC
SCLK
DBVDD
DCVDD
DGND
NC
MCLK
BCLK
ADCDAT
ADCLRC
MODE
AGND
MICBIAS
MVDD
AVDD
RACIN
RACOUT
RINPUT3
RINPUT2
RINPUT1
LINPUT1
LINPUT2
LINPUT3
LACOUT
LACIN
VMID
VREF
VREFP
VREFN
AGND
CSB
SDIN
TYPE
No Connect
Digital Input
Supply
Supply
Supply
No Connect
Digital Input
Digital Input / Output
Digital Output
Digital Input / Output
Digital Input
Supply
Analogue Output
Supply
Supply
Analogue Input
Analogue Output
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Input
Analogue Output
Analogue Input
Analogue Output
Analogue Output
Analogue Output
Analogue Output
Supply
Digital Input
Digital Input / Output
No Internal Connection
Control Interface Clock Input
Digital Buffer (I/O) Supply
Digital Core Supply
DESCRIPTION
Production Data
Digital Ground (return path for both DCVDD and DBVDD)
No Internal Connection
Master Clock
Audio Interface Bit Clock
ADC Digital Audio Data
Audio Interface Left / Right Clock
Control Interface Selection
Analogue Ground (return path for both AVDD and MVDD)
Microphone Bias
Microphone Bias and Microphone Pre-amplifier Positive Supply
Analogue Positive Supply
Right Channel DC Blocking Capacitor
Right Channel DC Blocking Capacitor
Right Channel Input 3
Right Channel Input 2
Right Channel Input 1
Left Channel Input 1
Left Channel Input 2
Left Channel Input 3
Left Channel DC Blocking Capacitor
Left Channel DC Blocking Capacitor
Midrail Voltage Decoupling Capacitor
Reference Voltage Decoupling Capacitor
Positive Reference Decoupling Connection
Negative Reference Decoupling Connection
Analogue Ground (return path for both AVDD and MVDD)
Chip Select / Device Address Selection
Control Interface Data Port
w
PD, Rev 4.4, January 2012
4
Production Data
WM8737L
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously
operating at or beyond these limits. Device functional operating limits and guaranteed performance specifications are given
under Electrical Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30C / 60% Relative Humidity. Supplied in moisture barrier bag.
CONDITION
Supply voltages
Voltage range digital inputs
Voltage range analogue inputs
Voltage range LACIN, RACIN, LACOUT, RACOUT, MICBIAS
Master Clock Frequency
Operating temperature range, T
A
Storage temperature after soldering
Notes:
1.
2.
Analogue and digital grounds must always be within 0.3V of each other.
All digital and analogue supplies are completely independent from each other.
-25C
-65C
MIN
-0.3V
DGND -0.3V
AGND -0.3V
AGND -0.3V
MAX
+3.63V
DBVDD +0.3V
AVDD +0.3V
MVDD +0.3V
40MHz
+85C
+150C
RECOMMENDED OPERATING CONDITIONS
PARAMETER
Digital supply range (Core)
Digital supply range (I/O Buffers)
Analogue supplies range
Ground
SYMBOL
DCVDD
DBVDD
AVDD, MVDD
DGND, AGND
TEST CONDITIONS
MIN
1.42
1.8
1.8
0
TYP
MAX
3.6
3.6
3.6
UNIT
V
V
V
V
Notes:
1.
DBVDD must be greater than or equal to DCVDD.
w
PD, Rev 4.4, January 2012
5
