Cal-Chip
C
ONSTRUCTION
F
EATURES
• High Density
• Automatic Placement
•
Convex
Electronics, Incorporated
CN S
ERIES
Thick Film Chip Resistor Arrays
CONVEX TERMINATION
D
IMENSIONS
IN MM
Unit: mm
TYPE
CN34
CN24
CN22
L
3.2±0.1
2.0±0.1
1.0±0.1
W
1.6±0.15
1.0±0.1
1.0±0.1
t
0.55±0.1
0.4±0.1
0.35±0.1
P
0.8±0.5
0.5±0.05
0.65±0.05
a
0.45±0.1
0.3±0.1
0.3±0.1
b
0.3±0.2
0.15±0.1
0.15±0.1
c
0.3±0.2
0.25±0.2
0.25±0.2
R
ATING
TYPE
Power
Rating
at 70°C
1/16W
Max
Working
Voltage
50V
Max
Overload
Voltage
100
100V
Operating
Temp. (°C)
-55~+125°C
Resistance
Tolerance
F±1%
Resistance
Range (Ω)
0Ω~1MΩ
Temp
Coefficient
ppm/°C
±200ppm/°C
CN34
CN24
J±5%
F±1%
1/16W
CN22
50V
50V
100V
-55~+125°C
J±5%
0Ω~1MΩ
±250ppm/°C
Ordering Information
CN
Chip Resistor
Networks/Arrays
Series
220402x2 4P2R
240402x4 8P4R
340603x4 8P4R
34
J
103
CT
Packaging
Nominal Resistance
Resistance Tolerance
J = ±5%
F = 1%
5% = 3 Digit designation is first two
digits are significant, 3rd is multiplier (10x)
1% = 4 Digit designation is first three
digits are significant, 4th is multiplier (10x)
Note: Calchip has completed the Lead-Free transition. All parts shipped will be Lead-Free. The customer designator of "LF" is no longer avaiable.
Lead-Free material will continue to have an LF at the end of the Lot Code and a green RoHS symbol on the label.
CN22 series is available upon request. Please consult factor
Cal-Chip
Electronics, Incorporated
CN S
ERIES
Thick Film Chip Resistor Arrays
1.0 Number of Element
Depend on its element’s number. (2-2 element. 4-4 element)
2.0 Resistance Tolerance
F: ±1%
J: ±5%
3.0 Nominal Resistance
Example: 103, 10 is effective digit, 3 is a multiple which represents the cube of 10, zero number is three.
4.0 Schematics
8
7
6
5
R
1
1
2
R
2
3
R
3
4
R
4
R
1
= R
2
= R
3
= R
4
5.0 Power Derating Curve
The resistors operated in ambient temperatures above 70°C, power rating must be derated in accordance
with the curve in Figure 1.
100
80
60
40
20
0 -60
-40
-2 0
0
20
40
60
80 100 120 140
5.1 Rated Voltage
The value of rated voltage shall be determined from formula (1).
E=
P x R........(1)
E = Rated Voltage (V)
P = Power Rating (W)
R = Nominal Resistance (Ω)
√
6.0 Electrical / Machine Characteristics and Test Methods
Item
Temperature Coefficient
Short Time Overload
Specifications
TCR: ±200 ppm
±(2%+0.05Ω)
±(3%+0.05Ω)
Inspection Temp.
Test Methods
Cold: +25°C~-55°C
Hot: +25°C~+125°C
1. Apply 2.5 x rated voltage for 5 sec.
2. Wait 30 minutes
3. Measure resistance value
1. Dwell in chamber at 70±2°C for ON: 90 min. at
rated voltage; then OFF: 30 min.
2. Perform 1,000 hours cyclically
1. Dwell in humidity chamber at 40 ±2°C and 95% RH for
ON: 90 min. at rated voltage; then OFF: 30 min.
2. Perform 1.,000 hours cyclically
1. -55±3°C~125±3°C, make 5 cycles.
2. Released 1 hour in room temp., then measure value.
1. Immersed in molten solder at 270±5°C for 10±.01 sec.
2.Released 1 hour in room temp., then measure value.
1. Immersed in rosin solution for 5~10 seconds.
2. Re-immersed in solder pot at 230±5°C for 3±0.5 sec
1. Perform 10,000 voltage cycles as follows: ON (2.5 x rated
voltage or current) 1 sec. and OFF 25 sec.
2. Released 30 min. without loading.
3. Measure resistance.
Apply 300VAC for 1 second
Apply 100VDC.
Load Life
Load Life in Humidity
Temperature Cycling
Effect of Soldering
Solderability
Intermittent Overload
±(3%+0.05Ω)
±(1%+0.05Ω)
±(2.5%+0.05Ω)
Non-damage by machinery
95% coverage min.
±(5%+0.1Ω)
Dielectric Withstanding Voltage
Insulation Resistance
No evidence of mechanical damage
108
Ω
min
Cal-Chip
Electronics, Incorporated
CN S
ERIES
Thick Film Chip Resistor Arrays
Taping Specification
Carrier Tape
Unit in mm
Paper Tape
Type
CN34
5,000
A
2.0±0.2
B
3.6±0.2
C
8.0±0.1
D
E
F
4.0±0.1
G
2.0±0.05
H
4.0±0.1
J
1.5±0.1
t
1.0
3.5±0.05 1.75±0.1
CN24
10,000
2.0±0.15
2.4±0.2
8.0±0.2
3.5±0.05 1.75±0.1
4.0±0.1
2.0±0.05
4.0±0.1 1.5±0.1/-.0 .84±.01
Cal-Chip
Electronics, Incorporated
CN S
ERIES
Thick Film Chip Resistor Arrays
The top fixed tape for each carrier shall have an adhesion peel strength of 10 to 50g, measure methods is
shown below to peel away.
Type
CN34
CN24
CN22
A
φ178±2.0
φ178±2.0
φ178±2.0
B
φ80±2.0
φ80±2.0
φ80±2.0
C
φ13±0.5
φ13±0.5
φ13±0.5
D
φ21.0
φ21.0
φ21.0
E
2.0±0.5
2.0±0.5
2.0±0.5
W1
10.0±1.0
10.0±1.0
9.0±1.0
W2
12.5±1.0
12.5±1.0
11.4±2.0
FPGA/CPLD
