CS8406
192 kHz Digital Audio Interface Transmitter
Features
Complete EIAJ CP1201, IEC-60958, AES3,
General Description
The CS8406 is a monolithic CMOS device which en-
codes and transmits audio data according to the AES3,
IEC60958, S/PDIF, o r EIAJ CP1201 standards. The
CS8406 accepts aud io and digital data, which is then
multiplexed, encoded, and driven onto a cable.
The audio data is input through a configurable, 3-wire
input port. The channel status and user bit data are in-
put through an SPI™ or I²C
®
microcontroller port, and
may be assembled in block-sized buffers. For systems
with no microcontroller, a Stand-Alone Mode allows di-
rect access to channel status and user bit data pins.
The CS8406 is available in a 28-pin TSSOP and SOIC
package for both Co mmercial (-10º to +70ºC) and
Automotive grade (-40º to +85ºC). The CDB8416
Demonstration board is also available for device
evaluation and implementation suggestions. Please
refer to
“Ordering Information” on page 34
for complete
details.
Target applications include A/V Receivers, CD-R, DVD
receivers, digital mixin g consoles, effects processors,
set-top boxes, and computer and automotive audio
systems.
S/PDIF-compatible Transmitter
+3.3 V or 5.0 V Digital Supply (VD)
+3.3 V or 5.0 V Digital Interface (VL)
On-Chip Channel Status and User Bit Buffer
Memories Allow Block-Sized Updates
Flexible 3-Wire Serial Digital Audio Input Port
Up to 192-kHz Frame Rate
Microcontroller Write Access to Channe Status
l
and User Bit Data
On-Chip Differential Line Driver
Generates CRC Codes and Parity Bits
Stand-Alone Mode Allows Use without a
Microcontroller
VD
VL
GND
RXP
C or U Data Buffer
AES3
S/PDIF
Encoder
TXP
Driver
ILRCK
ISCLK
SDIN
Serial
Audio
Input
Misc.
Control
Control Port &
Registers
TXN
TCBL
Output Clock
Generator
H/S
RST
U
SDA/
SCL/ AD1/ AD0/ AD2 INT
CDOUT CCLK CDIN CS
OMCK
http://www.cirrus.com
Copyright
Cirrus Logic, Inc. 2012
(All Rights Reserved)
AUG '12
DS580F6
CS8406
TABLE OF CONTENTS
1. CHARACTERISTICS AND SPECIFICATIONS ..................................................................................... 4
SPECIFIED OPERATING CONDITIONS .............................................................................................. 4
ABSOLUTE MAXIMUM RATINGS ........................................................................................................ 4
DC ELECTRICAL CHARACTERISTICS ............................................................................................... 4
DIGITAL INPUT CHARACTERISTICS .................................................................................................. 5
DIGITAL INTERFACE SPECIFICATIONS ............................................................................................ 5
TRANSMITTER CHARACTERISTICS .................................................................................................. 5
SWITCHING CHARACTERISTICS ....................................................................................................... 5
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORTS ............................................................. 6
SWITCHING CHARACTERISTICS - CONTROL PORT - SPI MODE................................................... 7
SWITCHING CHARACTERISTICS - CONTROL PORT - I²C MODE.................................................... 8
2. TYPICAL CONNECTION DIAGRAMS .................................................................................................. 9
3. GENERAL DESCRIPTION .................................................................................................................. 11
3.1 AES3 and S/PDIF Standards Documents .................................................................................... 11
4. THREE-WIRE SERIAL INPUT AUDIO PORT ..................................................................................... 12
5. AES3 TRANSMITTER ......................................................................................................................... 13
5.1 TXN and TXP Drivers ................................................................................................................... 13
5.2 Mono Mode Operation .................................................................................................................. 13
5.3 Transmitted Frame and Channel Status Boundary Timing ........................................................... 13
6. CONTROL PORT DESCRIPTION ....................................................................................................... 16
6.1 SPI Mode ...................................................................................................................................... 16
6.2 I²C Mode ....................................................................................................................................... 17
7. CONTROL PORT REGISTER SUMMARY ......................................................................................... 18
8. CONTROL PORT REGISTER BIT DEFINITIONS .............................................................................. 19
8.1 Memory Address Pointer (MAP) ................................................................................................... 19
8.2 Default = ‘000000’Control 1 (01h) ................................................................................................. 19
8.3 Control 2 (02h) .............................................................................................................................. 19
8.4 Data Flow Control (03h) ............................................................................................................... 20
8.5 Clock Source Control (04h) .......................................................................................................... 20
8.6 Serial Audio Input Port Data Format (05h) ................................................................................... 21
8.7 Interrupt 1 Status (07h) (Read Only) ............................................................................................ 22
8.8 Interrupt 2 Status (08h) (Read Only) ............................................................................................ 22
8.9 Interrupt 1 Mask (09h) .................................................................................................................. 22
8.10 Interrupt 1 Mode MSB (0Ah) and Interrupt 1 Mode LSB (0Bh) ................................................... 23
8.11 Interrupt 2 Mask (0Ch) ................................................................................................................ 23
8.12 Interrupt 2 Mode MSB (0Dh) and Interrupt Mode 2 LSB (0Eh) .................................................. 23
8.13 Channel Status Data Buffer Control (12h) .................................................................................. 23
8.14 User Data Buffer Control (13h) ................................................................................................... 24
8.15 Channel Status Bit or User Bit Data Buffer (20h - 37h) .............................................................. 24
8.16 CS8406 I.D. and Version Register (7Fh) (Read Only) ................................................................ 24
9. PIN DESCRIPTION - SOFTWARE MODE ....................................................................................... 25
10. HARDWARE MODE .......................................................................................................................... 27
10.1 Channel Status, User and Validity Data ..................................................................................... 27
10.2 Serial Audio Port ......................................................................................................................... 28
11. PIN DESCRIPTION - HARDWARE MODE ....................................................................................... 29
12. APPLICATIONS ................................................................................................................................ 31
12.1 Reset, Power Down and Start-Up .............................................................................................. 31
12.2 ID Code and Revision Code ....................................................................................................... 31
12.3 Power Supply, Grounding, and PCB layout ................................................................................ 31
12.4 Synchronization of Multiple CS8406s ......................................................................................... 31
13. PACKAGE DIMENSIONS ................................................................................................................ 32
14. ORDERING INFORMATION ............................................................................................................. 34
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DS580F6
CS8406
15. APPENDIX A: EXTERNAL AES3/SPDIF/IEC60958 TRANSMITTER COMPONENTS ................... 35
15.1 AES3 Transmitter External Components .................................................................................... 35
15.2 Isolating Transformer Requirements .......................................................................................... 35
16. APPENDIX B: CHANNEL STATUS AND USER DATA BUFFER MANAGEMENT ........................ 36
16.1 AES3 Channel Status(C) Bit Management ................................................................................. 36
16.1.1 Accessing the E buffer ................................................................................................... 36
16.1.2 Serial Copy Management System (SCMS) .................................................................... 37
16.1.3 Channel Status Data E Buffer Access ........................................................................... 37
16.2 AES3 User (U) Bit Management ................................................................................................. 38
16.2.1 Mode 1: Transmit All Zeros ............................................................................................ 38
16.2.2 Mode 2: Block Mode ...................................................................................................... 38
17. REVISION HISTORY ......................................................................................................................... 39
LIST OF FIGURES
Figure 1. Audio Port Master Mode Timing ................................................................................................... 6
Figure 2. Audio Port Slave Mode and Data Input Timing............................................................................. 6
Figure 3. SPI Mode Timing .......................................................................................................................... 7
Figure 4. I²C Mode Timing ........................................................................................................................... 8
Figure 5. Recommended Connection Diagram for Software Mode ............................................................. 9
Figure 6. Recommended Connection Diagram for Hardware Mode .......................................................... 10
Figure 7. Serial Audio Input Example Formats .......................................................................................... 12
Figure 8. AES3 Transmitter Timing for C, U, and V Pin Input Data, Stereo Mode..................................... 14
Figure 9. AES3 Transmitter Timing for C, U, and V Pin Input Data, Mono Mode ...................................... 15
Figure 10. Control Port Timing in SPI Mode .............................................................................................. 16
Figure 11. Control Port Timing, I²C Slave Mode Write............................................................................... 17
Figure 12. Control Port Timing, I²C Slave Mode Read............................................................................... 17
Figure 13. Hardware Mode Data Flow ....................................................................................................... 27
Figure 14. Professional Output Circuit ....................................................................................................... 35
Figure 15. Consumer Output Circuit (VL = 5.0 V) ...................................................................................... 35
Figure 16. TTL/CMOS Output Circuit......................................................................................................... 35
Figure 17. Channel Status Data Buffer Structure....................................................................................... 36
Figure 18. Flowchart for Writing the E Buffer ............................................................................................. 37
LIST OF TABLES
Table 1. Control Register Map Summary................................................................................................... 18
Table 2. Hardware Mode COPY/C and ORIG Pin Functions..................................................................... 28
Table 3. Hardware Mode Serial Audio Port Format Selection ................................................................... 28
Table 4. Hardware Mode OMCK Clock Ratio Selection............................................................................. 28
Table 5. Equivalent Register Settings of Serial Audio Input Formats in Hardware Mode .......................... 28
DS580F6
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CS8406
1. CHARACTERISTICS AND SPECIFICATIONS
(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical
performance characteristics and specifications are derived from measurements taken at nominal supply voltages
and T
A
= 25°C.)
SPECIFIED OPERATING CONDITIONS
(GND = 0 V, all voltages with respect to 0 V)
Parameter
Power Supply Voltage
Ambient Operating Temperature:
Commercial Grade
Automotive Grade
Symbol
VD
VL
T
A
T
A
Min
3.14
3.14
-10
-40
Typ
3.3 or 5.0
3.3 or 5.0
-
-
Max
5.25
5.25
+70
+85
Units
V
V
°C
°C
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Input Current, Any Pin Except Supplies
Input Voltage
Ambient Operating Temperature (power applied)
Storage Temperature
(GND = 0 V; all voltages with respect to 0 V. Operation beyond these limits may result in permanent damage to the
device. Normal operation is not guaranteed at these extremes.)
Symbol
VD, VL
(Note 1)
I
in
V
in
T
A
T
stg
Min
-
-
-0.3
-55
-65
Max
6.0
±10
VL + 0.3
125
150
Units
V
mA
V
°C
°C
Notes:
1. Transient currents of up to 100 mA will not cause SCR latch-up.
DC ELECTRICAL CHARACTERISTICS
(GND = 0 V; all voltages with respect to 0 V.)
Parameters
Power-Down Mode
(Note 2)
Supply Current in power down
VD = 3.3 V
VD = 5.0 V
VL = 3.3 V
VL = 5.0 V
VD = 3.3 V
VD = 5.0 V
VL = 3.3 V
VL = 5.0 V
VD = 3.3 V
VD = 5.0 V
VL = 3.3 V
VL = 5.0 V
ID
ID
IL
IL
ID
ID
IL
IL
ID
ID
IL
IL
-
-
-
-
-
-
-
-
-
-
-
-
20
40
0
0
1.9
3.5
6.5
10.6
7.6
12.7
7.2
12
-
-
-
-
-
-
-
-
-
-
-
-
A
A
A
A
mA
mA
mA
mA
mA
mA
mA
mA
Symbol
Min
Typ
Max
Units
Normal Operation
(Note 3)
Supply Current at 48 kHz frame rate
(Note 4)
Supply Current at 192 kHz frame rate
(Note 4)
2. Power Down Mode is defined as RST = LO with all clocks and data lines held static.
3. Normal operation is defined as RST = HI.
4. Assumes that no inputs are left floating. It is recommended that all digital inputs be driven high or low
at all times.
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DS580F6
CS8406
DIGITAL INPUT CHARACTERISTICS
Parameters
Input Leakage Current
Input Hysteresis (all inputs except OMCK)
Symbol
I
in
Min
-
-
Typ
-
0.25
Max
±0.5
-
Units
A
V
DIGITAL INTERFACE SPECIFICATIONS
(GND = 0 V; all voltages with respect to 0 V.)
Parameters
High-Level Output Voltage (I
OH
= -3.2 mA), except TXP/TXN
Low-Level Output Voltage (I
OH
= 3.2 mA), except TXP/TXN
High-Level Output Voltage, TXP, TXN
Low-Level Output Voltage, TXP, TXN
High-Level Input Voltage
Low-Level Input Voltage
(21 mA at VL = 5.0 V)
(15 mA at VL = 3.3 V)
(21 mA at VL = 5.0 V)
(16 mA at VL = 3.3 V)
VD = 5.0 V
VD = 3.3 V
VD = 5.0 V
VD = 3.3 V
V
IH
V
IL
Symbol
V
OH
V
OL
Min
VL - 1.0
-
VL - 0.7
VL - 0.7
-
-
2.75
2.0
-0.3
-0.3
Max
-
0.4
VL
VL
0.7
0.7
VL + 0.3
VL + 0.3
0.8
0.8
Units
V
V
V
V
V
V
V
V
V
V
TRANSMITTER CHARACTERISTICS
Parameters
TXP Output Resistance
TXN Output Resistance
VL = 5.0 V
VL = 3.3 V
VL = 5.0 V
VL = 3.3 V
Symbol
R
TXP
R
TXN
Typ
26.5
33.5
26.5
33.5
Units
SWITCHING CHARACTERISTICS
(Inputs: Logic 0 = 0 V, Logic 1 = VL; C
L
= 20 pF)
Parameter
RST pin Low Pulse Width
OMCK Frequency for OMCK = 512*Fs
OMCK Low and High Width for OMCK = 512*Fs
OMCK Frequency for OMCK = 384*Fs
OMCK Low and High Width for OMCK = 384*Fs
OMCK Frequency for OMCK = 256*Fs
OMCK Low and High Width for OMCK = 256*Fs
OMCK Frequency for OMCK = 128*Fs
OMCK Low and High Width for OMCK = 128*Fs
Frame Rate
AES3 Transmitter Output Jitter
Symbol
Min
200
4.1
4.1
3.1
6.1
2.0
8.1
1.0
18.3
8
-
Typ
-
-
-
-
-
-
-
-
-
-
200
Max
-
98.4
-
73.8
-
49.2
-
24.6
-
192
-
Units
s
MHz
ns
MHz
ns
MHz
ns
MHz
ns
kHz
ps RMS
DS580F6
5
