DC Input Voltage.................................................
−0.5V
to +7.0V
DC Output Voltage..............................................
−0.5V
to +7.0V
DC Output Current
(Maximum Sink Current/Pin)............................−60 to +120 mA
Power Dissipation ..........................................................1.0W
Static Discharge Voltage ........................................... >2001V
(per MIL-STD-883, Method 3015)
Operating Range
Function
OEAB
L
H
H
H
H
H
H
Table
[2, 3]
Inputs
LEAB
X
H
H
L
L
L
L
L
H
CLKAB
X
X
X
A
X
L
H
L
H
X
X
Outputs
B
Z
L
H
L
H
B
[4]
B
[5]
Range
Commercial
Ambient
Temperature
−40°C
to +85°C
V
CC
5V
±
10%
Notes:
1. On the 74FCT162H501T these pins have bus hold.
2. A-to-B data flow is shown. B-to-A data flow is similar but uses OEBA, LEBA, and CLKBA.
3. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
Z = High-impedance
= LOW-to-HIGH Transition
4. Output level before the indicated steady-state input conditions were established.
5. Output level before the indicated steady-state input conditions were established, provided that CLKAB was HIGH before LEAB went LOW.
6. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
7. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
2
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Electrical Characteristics
Over the Operating Range
Parameter
V
IH
V
IL
V
H
V
IK
I
IH
I
IL
I
BBH
I
BBL
I
BHHO
I
BHLO
I
OZH
I
OZL
I
OS
I
O
I
OFF
Description
Input HIGH Voltage
Input LOW Voltage
Input Hysteresis
[9]
Input Clamp Diode Voltage
Input HIGH Current
Input LOW Current
Standard
Bus Hold
Standard
Bus Hold
Bus Hold Sustain Current on Bus Hold Input
[10]
Bus Hold Overdrive Current on Bus Hold In-
put
[10]
High Impedance Output Current
(Three-State Output pins)
High Impedance Output Current
(Three-State Output pins)
Short Circuit Current
[11]
Output Drive Current
[11]
Power-Off Disable
V
CC
=Min.,
V
I
=2.0V
V
I
=0.8V
V
CC
=Max., V
I
=1.5V
V
CC
=Max., V
OUT
=2.7V
V
CC
=Max., V
OUT
=0.5V
V
CC
=Max., V
OUT
=GND
V
CC
=Max., V
OUT
=2.5V
V
CC
=0V, V
OUT
≤4.5V
[12]
−80
−50
−140
−50
+50
TBD
±1
±1
−200
−180
±1
V
CC
=Max., V
I
=GND
V
CC
=Min., I
IN
=−18 mA
V
CC
=Max., V
I
=V
CC
100
−0.7
−1.2
±1
±100
±1
±100
µA
µA
µA
µA
mA
µA
µA
mA
mA
µA
Test Conditions
Min.
2.0
0.8
Typ.
[8]
Max.
Unit
V
V
mV
V
µA
Output Drive Characteristics for CY74FCT16501T
Parame-
ter
V
OH
Description
Output HIGH Voltage
Test Conditions
V
CC
=Min., I
OH
=−3 mA
V
CC
=Min., I
OH
=−15 mA
V
CC
=Min., I
OH
=−32 mA
V
OL
Output LOW Voltage
V
CC
=Min., I
OL
=64 mA
Min.
2.5
2.4
2.0
Typ.
[8]
3.5
3.5
3.0
0.2
0.55
V
Max.
Unit
V
Output Drive Characteristics for CY74FCT162501T, CY74FCT162H501T
Parame-
ter
I
ODL
I
ODH
V
OH
V
OL
Description
Output LOW Current
[11]
Output HIGH Current
[11]
Output HIGH Voltage
Output LOW Voltage
Test Conditions
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
V
CC
=5V, V
IN
=V
IH
or V
IL
, V
OUT
=1.5V
V
CC
=Min., I
OH
=−24 mA
V
CC
=Min., I
OL
=24 mA
Min.
60
−60
2.4
Typ.
[8]
115
−115
3.3
0.3
0.55
Max.
150
−150
Unit
mA
mA
V
V
Notes:
8. Typical values are at V
CC
= 5.0V, T
A
= +25°C ambient.
9. This parameter is guaranteed but not tested.
10. Pins with bus hold are described in Pin Description.
11. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, I
OS
tests should be performed last.
12. Tested at +25°C.
3
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Capacitance
[9]
(T
A
= +25°C, f = 1.0 MHz)
Parameter
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
V
IN
= 0V
V
OUT
= 0V
Test Conditions
Typ.
[8]
4.5
5.5
Max.
6.0
8.0
Unit
pF
pF
Power Supply Characteristics
Sym.
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply
Current
Quiescent Power Supply
Current TTL inputs HIGH
Dynamic Power Supply
Current
[15]
V
CC
=Max.
V
CC
= Max., V
IN =
3.4V
[14]
V
CC
=Max., Outputs Open
OEAB=OEBA=V
CC
or GND
One Input Toggling,
50% Duty Cycle
V
CC
=Max., Outputs Open
f
0
=10MHz (CLKAB)
50% Duty Cycle
OEAB=OEBA=V
CC
LEAB = GND, One Bit Toggling
f
1
= 5MHz, 50% Duty Cycle
V
CC
=Max., Outputs Open
f
0
= 10MHz (CLKAB)
50% Duty Cycle
OEAB=OEBA=V
CC
LEAB=GND
Eighteen Bits Toggling
f
1
=2.5MHz, 50% Duty Cycle
V
IN
=V
CC
or
V
IN
=GND
Test Conditions
[13]
V
IN
<0.2V
V
IN
>V
CC
−0.2V
Min.
—
—
—
Typ.
[8]
5
0.5
75
Max.
500
1.5
120
Unit
µA
mA
µA/
MHz
I
C
Total Power Supply
Current
[16]
V
IN
=V
CC
or
V
IN
=GND
V
IN
=3.4V or
V
IN
=GND
V
IN
=V
CC
or
V
IN
=GND
V
IN
=3.4V or
V
IN
=GND
—
—
0.8
1.3
1.7
3.2
mA
—
—
3.8
8.5
6.5
[17]
20.8
[17]
Notes:
13. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
14. Per TTL driven input (V
IN
=3.4V); all other inputs at V
CC
or GND.
15. This parameter is not directly testable, but is derived for use in Total Power Supply.
16. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+∆I
CC
D
H
N
T
+I
CCD
(f
0
/2 + f
1
N
1
)
I
CC
= Quiescent Current with CMOS input levels
∆I
CC
= Power Supply Current for a TTL HIGH input (V
IN
=3.4V)
= Duty Cycle for TTL inputs HIGH
D
H
= Number of TTL inputs at D
H
N
T
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f
0
= Input signal frequency
f
1
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
17. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
4
CY74FCT16501T
CY74FCT162501T
CY74FCT162H501T
Switching Characteristics
Over the Operating Range
[18]
CY74FCT16501AT
CY74FCT16501CT
CY74FCT162501AT
CY74FCT162501CT
CY74FCT162H501AT CY74FCT162H501CT
Parameter
f
MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
SU
Description
CLKAB or CLKBA
frequency
[20]
Propagation Delay
A to B or B to A
Propagation Delay
LEBA to A, LEAB to B
Propagation Delay
CLKBA to A,
CLKAB to B
Output Enable Time
OEBA to A, OEAB to B
Output Disable Time
OEBA to A, OEAB to B
Set-Up Time,
HIGH or LOW
A to CLKAB,
B to CLKBA
Hold Time
HIGH or LOW
A to CLKAB,
B to CLKBA
Set-Up Time, Clock
HIGH or LOW LOW
A to LEAB,
Clock
B to LEBA
HIGH
Hold Time, HIGH or
LOW, A to LEAB,
B to LEBA
LEAB or LEBA Pulse
Width HIGH
[20]
CLKAB or CLKBA
Pulse Width HIGH or
LOW
[20]
Output Skew
[21]
Min.
—
1.5
1.5
1.5
Max.
150
5.1
5.6
5.6
Min.
—
1.5
1.5
1.5
Max.
150
4.6
5.3
5.3
CY74FCT16501ET
CY74FCT162501ET
CY74FCT162H501ET
Min.
—
1.5
1.5
1.5
Max.
150
3.8
4.2
4.2
Unit
MHz
ns
ns
ns
Fig.
No.
[19]
—
1,3
1,5
1,5
1.5
1.5
3.0
6.0
5.6
—
1.5
1.5
3.0
5.6
5.2
—
1.5
1.5
2.4
4.8
5.2
—
ns
ns
ns
1,7,8
1,7,8
4
t
H
0
—
0
—
0
—
ns
4
t
SU
3.0
1.5
1.5
—
—
—
3.0
1.5
1.5
—
—
—
2.0
1.5
0.5
—
—
—
ns
ns
ns
4
4
4
t
H
t
W
t
W
3.0
3.0
—
—
3.0
3.0
—
—
3.0
3.0
—
—
ns
ns
5
5
t
SK(O)
—
0.5
—
0.5
—
0.5
ns
—
Notes:
18. Minimum limits are guaranteed, but not tested, on propagation delays.
19. See “Parameter Measurement Information” in the General Information section.
20. This parameter is guaranteed but not tested.
21. Skew between any two outputs of the same package switching in the same direction. This parameter guaranteed by design.
