D ts e t
aa h e
R c e t r lc r nc
o h se Ee to is
Ma u a t r dCo o e t
n fc u e
mp n n s
R c e tr b a d d c mp n ns ae
o h se rn e
o oet r
ma ua trd u ig ete dewaes
n fcue sn i r i/ fr
h
p rh s d f m te oiia s p l r
uc a e r
o h r n l u pi s
g
e
o R c e tr waes rce td f m
r o h se
fr e rae r
o
te oiia I. Al rce t n ae
h
r nl P
g
l e rai s r
o
d n wi tea p o a o teOC
o e t h p rv l f h
h
M.
P r aetse u igoiia fcoy
at r e td sn r n la tr
s
g
ts p o rmso R c e tr e eo e
e t rga
r o h se d v lp d
ts s lt n t g aa te p o u t
e t oui s o u rne
o
rd c
me t o e c e teOC d t s e t
es r x e d h
M aa h e.
Qu l yOv riw
ai
t
e ve
• IO- 0 1
S 90
•A 92 cr ct n
S 1 0 et ai
i
o
• Qu l e Ma ua trr Ls (
ai d
n fcues it QML MI- R -
) LP F
385
53
•C a sQ Mitr
ls
lay
i
•C a sVS a eL v l
ls
p c ee
• Qu l e S p l r Ls o D sr uos( L )
ai d u pi s it f it b tr QS D
e
i
•R c e trsacic l u pir oD A a d
o h se i
r ia s p l t L n
t
e
me t aln u t a dD A sa d r s
es lid sr n L tn ad .
y
R c e tr lcrnc , L i c mmi e t
o h se Ee t is L C s o
o
tdo
t
s p ligp o u t ta s t f c so r x e t-
u pyn rd cs h t ai y u tme e p ca
s
t n fr u lya daee u loto eoiial
i s o q ai n r q a t h s r n l
o
t
g
y
s p l db id sr ma ua trr.
u pi
e yn ut
y n fcues
T eoiia ma ua trr d ts e t c o a yn ti d c me t e e t tep r r n e
h r n l n fcue’ aa h e a c mp n ig hs o u n r cs h ef ma c
g
s
o
a ds e ic t n o teR c e tr n fcue v rino ti d vc . o h se Ee t n
n p c ai s f h o h se ma ua trd eso f hs e ie R c e tr lcr -
o
o
isg aa te tep r r n eo i s mio d co p o u t t teoiia OE s e ic -
c u rne s h ef ma c ft e c n u tr rd cs o h r n l M p c a
o
s
g
t n .T pc lv le aefr eee c p r o e o l. eti mii m o ma i m rt g
i s ‘y ia’ au s r o rfrn e up s s ny C r n nmu
o
a
r xmu ai s
n
ma b b s do p o u t h rceiain d sg , i lt n o s mpetsig
y e a e n rd c c aa tr t , e in smuai , r a l e t .
z o
o
n
© 2 1 R cetr l t n s LC Al i t R sre 0 1 2 1
0 3 ohs E cr i , L . lRg s eevd 7 1 0 3
e e oc
h
T l r m r, l s v iw wrcl . m
o e n oe p ae it w . e c o
a
e
s
o ec
CY7C656xx
EZ-USB HX2LP™
Low Power USB 2.0 Hub Controller Family
Features
■
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Integrated Upstream and Downstream Termination Resistors
Integrated Port Status Indicator Control
24 MHz External Crystal (Integrated PLL)
In-System EEPROM Programming
Configurable with External SPI EEPROM:
❐
Vendor ID, Product ID, Device ID (VID/PID/DID)
❐
Number of active ports
❐
Number of removable ports
❐
Maximum power setting for high speed and full speed
❐
Hub controller power setting
❐
Power on timer
❐
Overcurrent detection mode
❐
Enabled and disabled overcurrent timer
❐
Overcurrent pin polarity
❐
Indicator pin polarity
❐
Compound device
❐
Enable full speed only
❐
Disable port indicators
❐
Ganged power switching
❐
Self and bus powered compatibility
❐
Fully configurable string descriptors for multiple language
support
USB 2.0 Hub Controller
Automotive AEC Grade Option (–40°C to 85°C)
Compliant with USB 2.0 Specification
USB-IF Certified: TID# 30000009
Windows Hardware Quality Lab (WHQL) Compliant
Up to Four Downstream Ports Supported
Supports Bus Powered and Self Powered Modes
Single Transaction Translator (TT)
Bus Power Configurations
Fit, Form, and Function Compatible with CY7C65640 and
CY7C65640A (TetraHub™)
Space Saving 56-Pin QFN
Single Power Supply Requirement
❐
Internal regulator for reduced cost
Integrated Upstream Pull Up Resistor
Integrated Pull Down Resistors for All Downstream Ports
■
■
■
■
Block Diagram CY7C65630
D+
D-
High-Speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
USB 2.0 PHY
24 MHz
Crystal
PLL
USB Upstream Port
Serial
Interface
Engine
Transaction Translator
Hub Repeater
TT RAM
Routing Logic
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 3
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 4
USB 2.0
PHY
Port Power
Control
Port
Status
D+
D- PWR#[1]
LED D+
OVR#[1]
D- PWR#[2]
OVR#[2]
LED
D+
D-
PWR#[3]
LED D+
OVR#[3]
D-
PWR#[4]
LED
OVR#[4]
Cypress Semiconductor Corporation
Document Number: 38-08037 Rev. *N
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised August 18, 2009
[+] Feedback
CY7C656xx
Block Diagram CY7C65620
D+
D-
High-Speed
USB Control Logic
SPI Communication
Block
SPI_SCK
SPI_SD
SPI_CS
USB 2.0 PHY
24 MHz
Crystal
PLL
USB Upstream Port
Serial
Interface
Engine
Transaction Translator (X1)
Hub Repeater
TT RAM
Routing Logic
USB Downstream Port 1
USB 2.0
PHY
Port Power
Control
Port
Status
USB Downstream Port 2
USB 2.0
PHY
Port Power
Control
Port
Status
D+
D- PWR#[1]
OVR#[1]
LED
D+
D-
PWR#[2]
LED
OVR#[2]
Document Number: 38-08037 Rev. *N
Page 2 of 25
[+] Feedback
CY7C656xx
Introduction
EZ-USB HX2LP™ is Cypress’s next generation family of high
performance, low power USB 2.0 hub controllers. HX2LP is an
ultra low power single chip USB 2.0 hub controller with integrated
upstream and downstream transceivers, a USB Serial Interface
Engine (SIE), USB Hub Control and Repeater logic, and Trans-
action Translator (TT) logic. Cypress has also integrated many
of the external passive components, such as pull up and pull
down resistors, reducing the overall bill of materials required to
implement a hub design. The HX2LP portfolio consists of:
■
Transaction Translator
The Transaction Translator translates data from one speed to
another. A TT takes high speed split transactions and translates
them to full or low speed transactions when the hub is operating
at high speed (the upstream port is connected to a high speed
host controller) and has full or low speed devices attached. The
operating speed of a device attached on a downstream facing
port determines whether the Routing Logic connects a port to the
TT or Hub Repeater. If a full or low speed device is connected to
the hub operating at high speed, the data transfer route includes
the TT. If a high speed device is connected to this high speed
hub, the route only includes the repeater and no TT, because the
device and the hub are operating at the same speed. When the
hub is operating at full speed (the upstream port is connected to
a full speed host controller), a high speed peripheral does not
operate at its full capability. These devices only work at full
speed. Full and low speed devices connected to this hub operate
at their normal speed.
CY7C65630: 4-port/single transaction translator
This device option is for ultra low power applications that require
four downstream ports. All four ports share a single transaction
translator. The CY7C65630 is available in 56 QFN and is also
pin-for-pin compatible with the CY7C65640.
■
CY7C65620:
This device option is for a 2-port bus powered application. Both
ports share a single transaction translator. The CY7C65620 is
available in a 56 QFN.
All device options are supported by Cypress’s world class
reference design kits, which include board schematics, bill of
materials, Gerber files, Orcad files, and thorough design
documentation.
Applications
Typical applications for the HX2LP device family are:
■
■
■
■
■
■
■
■
Standalone hubs
Motherboard hubs
Monitor hubs
Advanced port replicators
Docking stations
Split-PC designs
External personal storage drives
Keyboard hubs
USB Serial Interface Engine
The Serial Interface Engine (SIE) allows the CY7C656xx to
communicate with the USB host. The SIE handles the following
USB activities independently of the Hub Control Block.
■
■
■
■
Bit stuffing and unstuffing
Checksum generation and checking
TOKEN type identification
Address checking.
Hub Repeater
The Hub Repeater manages the connectivity between upstream
and downstream facing ports that are operating at the same
speed. It supports full or low speed connectivity and high speed
connectivity. According to the USB 2.0 specification, the HUB
Repeater provides the following functions:
■
■
Sets up and tears down connectivity on packet boundaries
Ensures orderly entry into and out of the Suspend state,
including proper handling of remote wakeups.
Document Number: 38-08037 Rev. *N
Page 3 of 25
[+] Feedback
CY7C656xx
Functional Overview
The Cypress CY7C656xx USB 2.0 Hubs are high performance,
low system cost solutions for USB. The CY7C656xx USB 2.0
Hubs integrate 1.5 kΩ upstream pull up resistors for full speed
operation and all downstream 15 kΩ pull down resistors and
series termination resistors on all upstream and downstream D+
and D– pins. This results in optimization of system costs by
providing built-in support for the USB 2.0 specification.
Babble consists of a non idle condition on the port after EOF2. If
babble is detected on an enabled port, that port is disabled. A
ClearPortEnable request from the host also disables the
specified port.
Downstream ports can be individually suspended by the host
with the SetPortSuspend request. If the hub is not suspended, a
remote wakeup event on that port is reflected to the host through
a port change indication in the Hub Status Change Endpoint. If
the hub is suspended, a remote wakeup event on this port is
forwarded to the host. The host may resume the port by sending
a ClearPortSuspend command.
System Initialization
On power up, the CY7C656xx reads an external SPI EEPROM
for configuration information. At the most basic level, this
EEPROM has the Vendor ID (VID), Product ID (PID), and Device
ID (DID) for the customer's application. For more specialized
applications, other configuration options can be specified. See
Configuration Options
on page 12 for more details.
After reading the EEPROM, if VBUSPOWER (connected to
up-stream V
BUS
) is high, CY7C656xx enables the pull up resistor
on D+ to indicate its presence to the upstream hub, after which
a USB Bus Reset is expected. During this reset, CY7C656xx
initiates a chirp to indicate that it is a high speed peripheral. In a
USB 2.0 system, the upstream hub responds with a chirp
sequence, and CY7C656xx is in a high speed mode, with the
upstream D+ pull up resistor turned off. In USB 1.x systems, no
such chirp sequence from the upstream hub is seen, and
CY7C656xx operates as a normal 1.x hub (operating at full
speed).
Upstream Port
The upstream port includes the transmitter and the receiver state
machine. The transmitter and receiver operate in high speed and
full speed depending on the current hub configuration.
The transmitter state machine monitors the upstream facing port
while the Hub Repeater has connectivity in the upstream
direction. This machine prevents babble and disconnect events
on the downstream facing ports of this hub from propagating and
causing the hub to be disabled or disconnected by the hub to
which it is attached.
Power Switching
The CY7C656xx includes interface signals for external port
power switches. Both ganged and individual (per-port) configu-
rations are supported, with individual switching being the default.
Initially all ports are unpowered. After enumerating, the host may
power each port by sending a SetPortPower request for that port.
The power switching and overcurrent detection of downstream
ports is managed by control pins connected to an external power
switch device. PWR [n]# output pins of the CY7C656xx series
are connected to the respective external power switch's port
power enable signals. Note that each port power output pin of
the external power switch must be bypassed with an electrolytic
or tantalum capacitor as required by the USB specification.
These capacitors supply the inrush currents, which occur during
downstream device hot-attach events. The polarity of this pin is
configured through the EEPROM; see
Configuration Options
on
page 12.
Enumeration
After a USB Bus Reset, CY7C656xx is in an unaddressed,
unconfigured state (configuration value set to ’0’). During the
enumeration process, the host sets the hub's address and
configuration.
After the hub is configured, the full hub functionality is available.
Downstream Ports
The CY7C656xx supports a maximum of four downstream ports,
each of which may be marked as usable or removable in the
extended configuration (0xD2 EEPROM load or 0xD4 EEPROM
load, see
Configuration Options
on page 12. Downstream D+
and D– pull down resistors are incorporated in CY7C656xx for
each port. Before the hubs are configured, the ports are driven
SE0 (Single Ended Zero, where both D+ and D– are driven low)
and are set to the unpowered state. When the hub is configured,
the ports are not driven and the host may power the ports by
sending a SetPortPower command for each port. After a port is
powered, any connect or disconnect event is detected by the
hub. Any change in the port state is reported by the hubs back
to the host through the Status Change Endpoint (endpoint 1). On
receipt of SetPortReset request for a port with a device
connected, the hub does as follows:
■
■
■
Overcurrent Detection
Overcurrent detection includes 8 ms of timed filtering by default.
This parameter is configured from the external EEPROM in a
range of 0 ms to 15 ms for both enabled ports and disabled ports
individually. Detection of overcurrent on downstream ports is
managed by control pins connected to an external power switch
device.
The OVR[n]# pins of the CY7C656xx series are connected to the
respective external power switch's port overcurrent indication
(output) signals. After detecting an overcurrent condition, hub
reports overcurrent condition to the host and disables the PWR#
output to the external power device. The polarity of the OVR pins
can be configured through the EEPROM; see
Configuration
Options
on page 12.
Page 4 of 25
Performs a USB Reset on the corresponding port
Puts the port in an enabled state
Enables the green port indicator for that port (if not previously
overridden by the host)
Enables babble detection after the port is enabled.
■
Document Number: 38-08037 Rev. *N
[+] Feedback
模拟与混合信号
