Automotive PSoC
Programmable System-on-Chip™
Automotive PSoC
®
Programmable System-on-Chip™
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
®
Features
Automotive Electronics Council (AEC) Q100 qualified
■
Powerful Harvard-architecture processor
❐
M8C processor speeds up to 24 MHz
❐
8 × 8 multiply, 32-bit accumulate
❐
Low power at high speed
❐
Automotive A-grade: 3.0 V to 5.25 V operation at –40 °C to
+85 °C temperature range
❐
Automotive E-grade: 4.75 V to 5.25 V operation at –40 °C to
+125 °C temperature range
®
■
Advanced peripherals (PSoC blocks)
❐
Six analog Type ‘E’ PSoC blocks provide:
• Up to four comparators with digital-to-analog converters
(DAC) references
• Up to 10-bit single or dual analog-to-digital converters
(ADCs)
❐
Up to eight digital PSoC blocks provide:
• 8 to 32-bit timers, counters, and pulse width modulators
(PWMs)
• One-shot, multi-shot mode in timers and PWMs
• PWM with deadband in one digital block
• Shift register, cyclical redundancy check (CRC), and
pseudo random sequence (PRS) modules
• Full- or half-duplex UARTs
• SPI masters or slaves, 8- to 16-bit variable data length
• Connectable to all general-purpose I/O (GPIO) pins
❐
Complex peripherals by combining blocks
❐
Powerful synchronization support, analog module operations
can be synchronized by digital blocks or external signals.
■
High-speed 10-bit successive approximation register (SAR)
ADC with sample and hold optimized for embedded control
®
TouchSense
®
■
CY8C22345H devices Integrate Immersion
Haptics Technology for ERM drive control
■
Precision, programmable clocking
❐
Internal oscillator up to 24 MHz
❐
High accuracy 24 MHz with optional 32-kHz crystal and
phase locked loop (PLL)
❐
Optional external oscillator, up to 24 MHz
❐
Internal low speed, low-power oscillator for watchdog and
sleep functionality
■
Flexible on-chip memory
❐
Up to 16 KB flash program storage, 1000 erase/write cycles
❐
Up to 1 KB SRAM data storage
❐
In-System Serial Programming (ISSP)
❐
Partial flash updates
❐
Flexible protection modes
❐
EEPROM emulation in flash
®
■
Optimized CapSense resource
❐
Supports two CapSense channels with simultaneous
scanning
■
■
■
■
Two current DACs provide programmable sensor tuning in
firmware
❐
Two dedicated clock resources for CapSense
❐
Two dedicated 16-bit timers/counters for CapSense
scanning
Versatile analog mux
❐
Common internal analog bus
❐
Simultaneous connection of I/O combinations
Programmable pin configurations
❐
25 mA sink, 10 mA drive on all GPIOs
❐
Pull-up, pull-down, high Z, strong, or open-drain drive modes
on all GPIOs
❐
Analog input on all GPIOs
❐
Configurable interrupt on all GPIOs
Additional system resources:
2
❐
I C master, slave, or multi-master
• Operation up to 400 kHz
• Hardware address detection feature
❐
Watchdog and sleep timers
❐
User-configurable low voltage detection
❐
Integrated supervisory circuit
❐
On-chip precision voltage reference
❐
Hardware real time clock (RTC) block
❐
Block Diagram
Port 4
Port 3
Port 2
Port 1
Port 0
PSoC CORE
System Bus
Global Digital
Interconnect
SRAM
1KB/512B
Interrupt
Controller
SROM
Global Analog Interconnect
Flash 16K/8K
Sleep and
Watchdog
CPU Core (M8C)
Multiple Clock Sources
(Includes IMO, ILO, PLL, and ECO)
DIGITAL SYSTEM
ANALOG SYSTEM
10-bit SAR
ADC
Analog
Ref
Analog
Input
Muxing
Digital Block
Array
CapSense Digital
Resources
Analog
Block
Array
Digital
Clocks
Multiply
Accum.
I
2
C
POR and LVD
RTC
System Resets
Internal
Voltage
Ref.
SYSTEM RESOURCES
Cypress Semiconductor Corporation
Document Number: 001-55397 Rev. *O
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised January 5, 2018
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
Contents
PSoC Functional Overview .............................................. 3
PSoC Core .................................................................. 3
Digital System ............................................................. 3
Analog System ............................................................ 4
Haptics TS2000 Controller .......................................... 4
Additional System Resources ..................................... 5
PSoC Device Characteristics ...................................... 5
Getting Started .................................................................. 6
Application Notes ........................................................ 6
Development Kits ........................................................ 6
Training ....................................................................... 6
CYPros Consultants .................................................... 6
Solutions Library .......................................................... 6
Technical Support ....................................................... 6
Development Tools .......................................................... 6
PSoC Designer Software Subsystems ........................ 6
Designing with PSoC Designer ....................................... 7
Select User Modules ................................................... 7
Configure User Modules .............................................. 7
Organize and Connect ................................................ 7
Generate, Verify, and Debug ....................................... 7
Pinouts .............................................................................. 8
28-pin Part Pinout ........................................................ 8
48-pin Part Pinout ........................................................ 9
Registers ......................................................................... 10
Register Conventions ................................................ 10
Register Mapping Tables .......................................... 10
Absolute Maximum Ratings .......................................... 13
Operating Temperature .................................................. 13
Electrical Specifications ................................................ 14
DC Electrical Characteristics ..................................... 15
AC Electrical Characteristics ..................................... 21
Development Tool Selection ......................................... 29
Software .................................................................... 29
Development Kits ...................................................... 29
Evaluation Tools ........................................................ 29
Device Programmers ................................................. 30
Accessories (Emulation and Programming) .............. 30
Ordering Information ...................................................... 31
Ordering Code Definitions ......................................... 32
Packaging Information ................................................... 33
Package Dimensions ................................................. 33
Thermal Impedances ................................................. 34
Capacitance on Crystal Pins ..................................... 34
Solder Reflow Specifications ..................................... 34
Tape and Reel Information ........................................ 35
Tube Information ....................................................... 37
Acronyms ........................................................................ 39
Reference Documents .................................................... 39
Document Conventions ................................................. 40
Units of Measure ....................................................... 40
Numeric Conventions ................................................ 40
Glossary .......................................................................... 40
Errata ............................................................................... 45
Part Numbers Affected .............................................. 45
CY8C21x45, CY8C22x45 Qualification Status .......... 45
Errata Summary ........................................................ 45
Document History Page ................................................. 47
Sales, Solutions, and Legal Information ...................... 49
Worldwide Sales and Design Support ....................... 49
Products .................................................................... 49
PSoC® Solutions ...................................................... 49
Cypress Developer Community ................................. 49
Technical Support ..................................................... 49
Document Number: 001-55397 Rev. *O
Page 2 of 49
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
PSoC Functional Overview
The PSoC programmable system-on-chip series of products
consists of many devices. These devices are designed to
replace multiple traditional MCU-based system components with
one low cost single-chip programmable device. PSoC devices
include configurable blocks of analog and digital logic, as well as
programmable interconnects. This architecture enables the user
to create customized peripheral configurations that match the
requirements of each individual application. Additionally, a fast
CPU, flash program memory, SRAM data memory, and
configurable I/O are included in a range of convenient pinouts
and packages.
The PSoC architecture, shown in the
Block Diagram on page 1,
consists of four main areas: PSoC core, digital system, analog
system, and system resources. Configurable global busing
allows the combining of all the device resources into a complete
custom system. The PSoC family can have up to five I/O ports
connecting to the global digital and analog interconnects,
providing access to eight digital blocks
[1]
and six analog blocks.
Digital System
The digital system is composed of eight digital PSoC blocks.
Each block is an 8-bit resource that may be used alone or
combined with other blocks to form 8-, 16-, 24-, and 32-bit
peripherals, which are called user modules.
Figure 1. Digital System Block Diagram
[1]
Port 3
Port 4
Port 2
Port 1
Port 0
Digital Clocks
From Core
To System Bus
To Analog
System
DIGITAL SYSTEM
Digital PSoC Block Array
Row Input
Configuration
Row 0
DBC00
DBC01
DCC02
4
DCC03
4
Row Output
Configuration
PSoC Core
The PSoC core is a powerful engine that supports a rich feature
set. The core includes a CPU, memory, clocks, and configurable
GPIO.
The M8C CPU core is a powerful processor with speeds up to
24 MHz (up to 12 MHz for E-grade devices), providing four MIPS
(two MIPS for E-grade devices) 8-bit Harvard architecture
microprocessor. The CPU uses an interrupt controller to simplify
the programming of real time embedded events.
Program execution is timed and protected using the included
Sleep Timer and watchdog timer (WDT).
Memory encompasses 16 KB of flash (8 KB for CY8C21x45
devices) for program storage, 1 KB of SRAM (512 bytes for
CY8C21x45 devices) for data storage, and EEPROM emulation
using the flash. Program flash uses four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The PSoC device incorporates flexible internal clock generators,
including a 24-MHz internal main oscillator (IMO). For A-grade
devices the 24-MHz IMO can also be doubled to 48 MHz for use
by the digital system. A low-power 32-kHz internal low-speed
oscillator (ILO) is provided for the Sleep Timer and WDT. If
crystal accuracy is required, the 32.768 kHz external crystal
oscillator (ECO) is available for use as a RTC, and can optionally
generate a crystal-accurate 24-MHz system clock using a PLL.
The clocks, together with programmable clock dividers (as a
system resource), provide the flexibility to integrate almost any
timing requirement into the PSoC device.
PSoC GPIOs provide connection to the CPU, digital, and analog
resources of the device. Each pin’s drive mode may be selected
from eight options, allowing great flexibility in external
interfacing. Each pin can also generate a system interrupt.
8
8
Row Input
Configuration
8
8
Row 1
DBC00
DBC01
DCC02
DCC03
Row Output
Configuration
GIE[7:0]
GIO[7:0]
Global Digital
Interconnect
GOE[7:0]
GOO[7:0]
Digital peripheral configurations are:
■
■
■
■
■
■
■
■
■
■
■
■
PWMs (8- to 16-bit)
PWMs with deadband (8- to 32-bit)
Counters (8- to 32-bit)
Timers (8- to 32-bit)
One-shot and multi-shot modules
Full or half-duplex 8-bit UART with selectable parity (up to two
full-duplex or four half-duplex)
SPI master and slave (up to four total) with programmable data
length from 8 to 16 bits.
Shift register (1- to 32-bit)
I
2
C master, slave, or multi-master (one available)
CRC/generator (16-bit)
IrDA (up to two)
PRS generators (8- to 32-bit)
Note
1. CY8C22x45 devices have 2 digital rows with 8 digital blocks. CY8C21x45 devices only have 1 digital row with 4 digital blocks.
Document Number: 001-55397 Rev. *O
Page 3 of 49
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
The digital blocks may be connected to any GPIO through a
series of global buses that can route any signal to any pin. The
buses also allow for signal multiplexing and performing logic
operations. This configurability frees your designs from the
constraints of a fixed peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies by PSoC device family. This provides a choice of
system resources for your application. Family resources are
shown in
Table 1 on page 5.
Figure 2. Analog System Block Diagram
Array Input Configuration
ACI0[1:0]
ACI1[1:0]
ACI1[1:0]
ACI1[1:0]
Analog System
The Analog System of CY8C21x45 and CY8C22x45 PSoC
devices consists of a 10-bit SAR ADC and six configurable
analog blocks.
The programmable 10-bit SAR ADC is an optimized ADC with a
fast maximum sample rate. External filters are required on ADC
input channels for antialiasing. This ensures that any out-of-band
content is not folded into the input signal band.
Reconfigurable analog resources allow creating complex analog
signal flows. Analog peripherals are very flexible and may be
customized to support specific application requirements. Some
of the more common PSoC analog functions (most available as
user modules) are:
■
■
■
■
ACE00
ASE10
ACE01
ASE11
ACE10
ACE11
Block Array
AmuxL
AmuxR
P0[0:7]
ACI2[3:0]
10 bit SAR ADC
Analog Reference
Interface to
Digital System
Reference
Generators
Analog-to-digital converters (single or dual, with up to 10-bit
resolution)
Pin-to-pin comparator
Single-ended comparators (up to four) with absolute (1.3 V)
reference or DAC reference
Precision voltage reference (1.3 V nominal)
AGND
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
CY8C21x45
and
CY8C22x45
devices
have
six
limited-functionality Type 'E' analog blocks. These analog blocks
are arranged in four columns. Each column contains one
continuous time (CT) Type E block. The first two columns also
have a switched capacitor (SC) type E block. Refer to the
PSoC
Technical Reference Manual
for CY8C21x45 and CY8C22x45
devices for detailed information on the Type E analog blocks.
Haptics TS2000 Controller
The CY8C22x45H family of devices features an easy-to-use
Haptics controller resource with up to 14 different effects. These
effects are available for use with three different, selectable ERM
modules.
Document Number: 001-55397 Rev. *O
Page 4 of 49
CY8C21345/CY8C21645
CY8C22345/CY8C22345H/CY8C22645
Additional System Resources
System Resources, some of which are listed in the previous
sections, provide additional capability useful for complete
systems. Additional resources include a MAC, low voltage
detection, and power on reset. The merits of each system
resource are:
■
■
A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate, to assist in both general math and
digital filters.
The I
2
C module provides 0 to 400 kHz communication over two
wires. Slave, master, and multi-master modes are all
supported.
Low voltage detection (LVD) interrupts can signal the
application of falling voltage levels, while the advanced power
on reset (POR) circuit eliminates the need for a system
supervisor.
An internal voltage reference provides an absolute reference
for the analog system, including ADCs and DACs.
■
Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks may be routed
to both the digital and analog systems. Additional clocks can
be generated using digital PSoC blocks as clock dividers.
Additional digital resources and clocks dedicated to and
optimized for CapSense.
RTC hardware block.
■
■
■
■
PSoC Device Characteristics
Depending on your PSoC device characteristics, the digital and analog systems can have varying numbers of digital and analog
blocks. The following table lists the resources available for specific PSoC device groups. The PSoC families covered by this datasheet
are highlighted in the table.
Table 1. PSoC Device Characteristics
PSoC Part Number Digital I/O
CY8C29x66
[2]
CY8C28xxx
CY8C27x43
CY8C24x94
[2]
CY8C24x23A
[2]
CY8C23x33
CY8C22x45
[2]
CY8C21x45
CY8C21x34
[2]
[2]
Digital
Rows
4
up to 3
2
1
1
1
2
1
1
1
0
0
Digital
Blocks
16
up to 12
8
4
4
4
8
4
4
4
0
0
Analog
Inputs
up to 12
up to 44
up to 12
up to 48
up to 12
up to 12
up to 38
up to 24
up to 28
up to 8
up to 28
up to 36
Analog
Analog
Outputs Columns
4
up to 4
4
2
2
2
0
0
0
0
0
0
4
up to 6
4
2
2
2
4
4
2
2
0
0
Analog
Blocks
12
up to
12 + 4
[3]
12
6
6
4
6
[3]
6
4
[3]
[3]
SRAM Size
2K
1K
256
1K
256
256
1K
512
512
256
512
up to 2 K
Flash Size
32 K
16 K
16 K
16 K
4K
8K
16 K
8K
8K
4K
8K
up to 32 K
up to 64
up to 44
up to 44
up to 56
up to 24
up to 26
up to 38
up to 24
up to 28
up to 16
up to 28
up to 36
CY8C21x23
CY8C20x34
[2]
CY8C20xx6
4
[3]
3
[3, 4]
3
[3, 4]
Notes
2. Automotive qualified devices available in this group.
3. Limited analog functionality.
4. Two analog blocks and one CapSense
®
block.
Document Number: 001-55397 Rev. *O
Page 5 of 49
