CY8CTST120
TrueTouch™ Single-Touch
Touchscreen Controller
Features
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TrueTouch™ Capacitive Touchscreen Controller
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Supports Single-Touch Touchscreen Applications
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Supports up to 44 X/Y Sensor Inputs
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Supports Screen Sizes 7.3” and below (Typical)
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Fast Scan Rates: Typical 0.5 ms per Sensor
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High Resolution: Typical 480 x 360 for 3.5-inch screen
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Available in 56-Pin QFN Package
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Seamless Transition up to Higher Function Multi-Touch Ges-
ture and Multi-Touch All-Points-Addressable Devices
Lowest Noise TrueTouch Device
Highly Configurable Sensing Circuitry
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Allows Maximum Design Flexibility
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Allows Trade-Off Between Scan Time and Noise Perfor-
mance
Provides Maximum EMI Immunity
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Selectable Spread-Spectrum Clock Source
Powerful Harvard Architecture Processor
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M8C Processor Speeds to 24 MHz
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Two 8x8 Multiply, 32-Bit Accumulate
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Low Power at High Speed
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3V to 5.25V Operating Voltage
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Industrial Temperature Range: –40°C to +85°C
❐
USB Temperature Range: –10°C to +85°C
Full-Speed USB (12 Mbps)
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Four Uni-Directional Endpoints
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One Bi-Directional Control Endpoint
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USB 2.0 Compliant
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Dedicated 256 Byte Buffer
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No External Crystal Required
Flexible On-Chip Memory
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16K Flash Program Storage, 50000 Erase/Write Cycles
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1K SRAM Data Storage
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In-System Serial Programming (ISSP)
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Partial Flash Updates
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Flexible Protection Modes
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EEPROM Emulation in Flash
Precision, Programmable Clocking
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Internal ±4 percent 24 and 48 MHz Oscillator
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Internal Oscillator for Watchdog and Sleep
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0.25 percent Accuracy for USB with no External Components
Additional System Resources
2
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I C™ Slave, Master, and Multi-Master to 400 kHz
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Watchdog and Sleep Timers
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User-Configurable Low Voltage Detection
❐
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Integrated Supervisory Circuit
❐
On-Chip Precision Voltage Reference
Complete Development Tools
❐
Free Development Software (PSoC Designer™)
❐
TrueTouch Touchscreen Tuner
❐
Full-Featured, In-Circuit Emulator and Programmer
❐
Full Speed Emulation
❐
Complex Breakpoint Structure
❐
128K Bytes Trace Memory
Programmable Pin Configurations
❐
25 mA Sink, 10 mA Drive on All GPIO
❐
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on All GPIO
❐
Configurable Interrupt on All GPIO
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Logic Block Diagram
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Cypress Semiconductor Corporation
Document Number: 001-46932 Rev. *B
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised July 31, 2008
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CY8CTST120
TrueTouch Functional Overview
The TrueTouch family provides the fastest and most efficient way
to develop and tune a capacitive touchscreen application. A
TrueTouch device includes the configurable TrueTouch block,
configurable analog and digital logic, programmable inter-
connect, and an 8-bit CPU to run custom firmware. This archi-
tecture enables the user to create flexible, customized
single-touch touchscreen configurations to match the require-
ments of each individual touchscreen application. Various
configurations of Flash program memory, SRAM data memory,
and configurable IO are included in a range of convenient
pinouts.
The TrueTouch architecture is comprised of four main areas: the
Core, Digital System, the TrueTouch Analog System, and
System Resources including a full speed USB port. Configurable
global busing allows all the device resources to be combined into
a complete custom touchscreen system. The CY8CTST120
device can have up to seven IO ports that connect to the global
digital and analog interconnects, providing access to four digital
blocks and six analog blocks. Implementation of touchscreen
applications allows additional digital and analog resources to be
used depending on the touchscreen design. The CY8CTST120
is offered in a 56-pin QFN package with up to 48 general purpose
IO (GPIO), and support of up to 44 X/Y sensors.
When designing touchscreen applications, refer to the UM data
sheet for performance requirements to meet and detailed design
process explanation.
from eight options, allowing great flexibility in external inter-
facing. Every pin is capable of generating a system interrupt on
high level, low level, and change from last read.
The Digital System
The Digital System is composed of four digital PSoC blocks.
Each block is an 8-bit resource that is used alone or combined
with other blocks to form 8, 16, 24, and 32-bit peripherals, which
are called user module references.
Figure 1. Digital System Block Diagram
Port 7
Port 5
Port 4
Port 3
Port 2
Port 1
Port 0
Digital Clocks
FromCore
To System Bus
ToAnalog
System
DIGITAL SYSTEM
Digital PSoC Block Array
Row Input
Configuration
8
8
Row 0
DBB00
DBB01
DCB02
4
DCB03
4
8
8
Row Output
Configuration
GIE[7:0]
GIO[7:0]
GlobalDigital
Interconnect
GOE[7:0]
GOO[7:0]
The TrueTouch Core
The core includes a CPU, memory, clocks, and configurable
GPIO (General Purpose IO).
The M8C CPU core is a powerful processor with speeds up to 24
MHz, providing a four MIPS 8-bit Harvard architecture micropro-
cessor. The CPU uses an interrupt controller with up to 20
vectors, to simplify programming of real time embedded events.
Program execution is timed and protected using the included
Sleep and Watch Dog Timers (WDT).
Memory encompasses 16K of Flash for program storage, 1K of
SRAM for data storage, and up to 2K of EEPROM emulated
using the Flash. Program Flash uses four protection levels on
blocks of 64 bytes, allowing customized software IP protection.
The TrueTouch device incorporates flexible internal clock gener-
ators, including a 24 MHz IMO (internal main oscillator) accurate
to 8% over temperature and voltage. The 24 MHz IMO can also
be doubled to 48 MHz for use by the digital system. A low power
32 kHz ILO (internal low speed oscillator) is provided for the
sleep timer and WDT. The clocks, together with programmable
clock dividers (as a System Resource), provide the flexibility to
integrate almost any timing requirement into the TrueTouch
device. In USB systems, the IMO self-tunes to ± 0.25% accuracy
for USB communication.
The GPIOs provide connection to the CPU, digital and analog
resources of the device. Each pin’s drive mode may be selected
Digital peripheral configurations include those listed below.
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Full-Speed USB (12 Mbps)
PWMs (8 to 32 bit)
PWMs with dead band (8 to 24 bit)
Counters (8 to 32 bit)
Timers (8 to 32 bit)
UART 8 bit with selectable parity
SPI master and slave
I2C slave and multi-master
Pseudo Random Sequence Generators (8 to 32 bit)
The digital blocks can be connected to any GPIO through a
series of global buses that can route any signal to any pin. The
buses also allow signal multiplexing and for performing logic
operations. This configurability frees your designs from the
constraints of a fixed peripheral controller.
Digital blocks are provided in rows of four, where the number of
blocks varies by PSoC device family. This allows you the
optimum choice of system resources for your application. Family
characteristics are shown in
Table 1
on page 4.
Document Number: 001-46932 Rev. *B
Page 2 of 32
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CY8CTST120
The Analog System
The Analog System is composed of 6 configurable blocks, each
comprised of an opamp circuit allowing the creation of complex
analog signal flows. Analog peripherals are very flexible and can
be customized to support specific application requirements.
Some of the more common PSoC analog functions (most
available as user modules) are listed below.
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Analog-to-digital converters (up to 2, with 6 to 14-bit resolu-
tion, selectable as Incremental, Delta Sigma, and SAR)
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Figure 2. Analog System Block Diagram
All IO
(Except Port 7)
P0[7]
P0[5]
P0[3]
P0[1]
AGNDIn RefIn
Analog
Mux Bus
P0[6]
P0[4]
P0[2]
P0[0]
P2[6]
Filters (2 and 4 pole band-pass, low-pass, and notch)
Amplifiers (up to 2, with selectable gain to 48x)
Instrumentation amplifiers (1 with selectable gain to 93x)
Comparators (up to 2, with 16 selectable thresholds)
DACs (up to 2, with 6- to 9-bit resolution)
Multiplying DACs (up to 2, with 6- to 9-bit resolution)
High current output drivers (two with 30 mA drive as a PSoC
Core Resource)
1.3V reference (as a System Resource)
Modulators
Correlators
Peak Detectors
Many other topologies possible
Block
Array
ACB00
ASC10
ACB01
ASD11
ASC21
ACI0[1:0]
ACI1[1:0]
P2[3]
P2[4]
P2[2]
P2[0]
P2[1]
Array Input
Configuration
Analog blocks are arranged in a column of three, which includes
one CT (Continuous Time) and two SC (Switched Capacitor)
blocks, as shown in
Figure 2.
The Analog Multiplexer System
The Analog Mux Bus connects to every GPIO pin in ports 0-5.
Pins are connected to the bus individually or in any combination.
The bus also connects to the analog system for capacitive
sensing with the TrueTouch block comparator. It can be split into
two sections for simultaneous dual-channel processing. An
additional 8:1 analog input multiplexer provides a second path to
bring Port 0 pins to the analog array.
Switch control logic enables selected pins to switch dynamically
under hardware control. This enables capacitive measurement
for the touchscreen application. Other multiplexer applications
include:
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ASD20
AnalogReference
Interface to
Digital System
RefHi
RefLo
AGND
Reference
Generators
AGNDIn
RefIn
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
Chip-wide mux that allows analog input from up to 48 IO pins.
Electrical connection between any IO pin combinations.
Additional System Resources
System Resources, provide additional capability useful to
complete systems. Additional resources include a multiplier,
decimator, low voltage detection, and power on reset. Brief state-
ments describing the merits of each resource follow.
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Full-Speed USB (12 Mbps) with five configurable endpoints and
256 bytes of RAM. No external components required except
two series resistors. Wider than commercial temperature USB
operation (-10°C to +85°C).
Digital clock dividers provide three customizable clock
frequencies for use in applications. The clocks can be routed
to both the digital and analog systems. Additional clocks can
be generated using digital PSoC blocks as clock dividers.
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Document Number: 001-46932 Rev. *B
Page 3 of 32
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CY8CTST120
■
Two multiply accumulates (MACs) provide fast 8-bit multipliers
with 32-bit accumulate, to assist in both general math and
digital filters.
Decimator provides a custom hardware filter for digital signal
processing applications including creation of Delta Sigma
ADCs.
The I2C module provides 100 and 400 kHz communication over
two wires. Slave, master, multi-master modes are supported.
Low Voltage Detection (LVD) interrupts signal the application
of falling voltage levels, while the advanced POR (Power On
Reset) circuit eliminates the need for a system supervisor.
An internal 1.3V reference provides an absolute reference for
the analog system, including ADCs and DACs.
Versatile analog multiplexer system.
■
contains development kits,
C
compilers, and all accessories for
PSoC development. Go to the Cypress Online Store web site at
http://www.cypress.com,
click the Online Store shopping cart
icon at the bottom of the web page, and click
PSoC (Program-
mable System-on-Chip)
to view a current list of available items.
Technical Training Modules
Free PSoC technical training modules are available for users
new to PSoC. Training modules cover designing, debugging,
advanced
analog
and
CapSense.
Go
to
http://www.cypress.com/training.
■
■
Consultants
Certified PSoC Consultants offer everything from technical
assistance to completed PSoC designs. To contact or become a
PSoC Consultant go to
http://www.cypress.com,
click on Design
Support located on the left side of the web page, and select
CYPros Consultants.
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Getting Started
To understand the TrueTouch device, read this data sheet and
use the PSoC Designer Integrated Development Environment
(IDE). This data sheet is an overview of the PSoC integrated
circuit and presents general silicon and electrical specifications.
For in depth touchscreen application information, including
touchscreen specific specifications, read the touchscreen user
module data sheet that is supported by this specific device.
Technical Support
PSoC application engineers take pride in fast and accurate
response. They are available with a four hour guaranteed
response at
http://www.cypress.com/support.
Application Notes
A long list of application notes assist you in every aspect of your
design effort. To view the PSoC application notes, go to the
http://www.cypress.com
web site and select Application Notes
under the Design Resources list located in the center of the web
page. Application notes are listed by date as default.
TrueTouch Device Characteristics
Depending on the TrueTouch device selected for a touchscreen
application, characteristics and capabilities of each device
change.
Table 1
lists the touchscreen sensing capabilities
available for specific TrueTouch devices. The TrueTouch device
covered by this data sheet is highlighted in this table.
Table 1. TrueTouch Device Characteristics
Current
Consumption
[2]
Scan
Speed (ms)
[1]
Single-Touch
Max Screen
Size (Inches)
Multi-Touch
Gesture
Multi-Touch
All-Point
Flash Size
Development Tools
PSoC Designer is a Microsoft
®
Windows based, integrated
development
environment
for
the
Programmable
System-on-Chip™ (PSoC) devices. The PSoC Designer IDE
and application runs on Windows NT 4.0, Windows 2000,
Windows Millennium (Me), or Windows XP (see
Figure 3
on page
5)
PSoC Designer helps the customer to select an operating config-
uration for the PSoC, write application code that uses the PSoC,
and debug the application. This system provides design
database management by project, an integrated debugger with
In-Circuit Emulator, in-system programming support, and the
CYASM macro assembler for the CPUs.
PSoC Designer also supports a high level C language compiler
developed specifically for the devices in the family.
Sensor
Inputs
TrueTouch Part
Number
CY8CTST110
CY8CTST120
CY8CTMG110
CY8CTMG120
CY8CTMA120
up to 4.3” Y
24
up to 8.4” Y
44
up to 4.3” Y
24
up to 8.4
44
Y
N
N
Y
Y
Y
N
N
N
N
Y
0.5
0.5
0.5
0.5
3
16
3
16
8K
512
Bytes
16K 1K
8K
512
Bytes
16K 1K
16K 1K
up to 7.3” Y
37
0.12 16
Development Kits
Development Kits are available from the following distributors:
Digi-Key, Avnet, Arrow, and Future. The Cypress Online Store
Notes
1. Per Sensor Typical. Depends on touchscreen panel. For MA120 per X/Y crossing Vcc = 3.3V.
2. Average mA Supply Curernt. Based on 8ms Report Rate, except for MA120.
Document Number: 001-46932 Rev. *B
SRAM
Size
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CY8CTST120
Figure 3. PSoC Designer Subsystems
Examples provided in the tools include a 300-baud modem, LIN
Bus master and slave, fan controller, and magnetic card reader.
Context
Sensitive
Help
PSoC
Designer
Graphical Designer
Interface
Application Editor
In the Application Editor you can edit your C language and
Assembly language source code. You can also assemble,
compile, link, and build.
Assembler.
The macro assembler allows the assembly code to
be merged seamlessly with C code. The link libraries automati-
cally use absolute addressing or can be compiled in relative
mode, and linked with other software modules to get absolute
addressing.
Commands
Results
Importable
Design
Database
Device
Database
Application
Database
Project
Database
User
Modules
Library
PSoC
Configuration
Sheet
PSoC
Designer
Core
Engine
C Language Compiler.
A C language compiler is available that
supports the PSoC family of devices. Even if you have never
worked in the C language before, the product quickly allows you
to create complete C programs for the PSoC family devices.
The embedded, optimizing C compiler provides all the features
of C tailored to the PSoC architecture. It comes complete with
embedded libraries providing port and bus operations, standard
keypad and display support, and extended math functionality.
Debugger
The PSoC Designer Debugger subsystem provides hardware
in-circuit emulation, allowing the designer to test the program in
a physical system while providing an internal view of the PSoC
device. Debugger commands allow the designer to read and
program and read and write data memory, read and write IO
registers, read and write CPU registers, set and clear break-
points, and provide program run, halt, and step control. The
debugger also allows the designer to create a trace buffer of
registers and memory locations of interest.
Online Help System
The online help system displays online, context-sensitive help
for the user. Designed for procedural and quick reference, each
functional subsystem has its own context-sensitive help. This
system also provides tutorials and links to FAQs and an Online
Support Forum to aid the designer in getting started.
Manufacturing
Information
File
Emulation
Pod
In-Circuit
Emulator
Device
Programmer
PSoC Designer Software Subsystems
Device Editor
The Device Editor subsystem allows the user to select different
onboard analog and digital components called user modules
using the PSoC blocks. Examples of user modules are ADCs,
DACs, amplifiers, and filters.
The device editor also supports easy development of multiple
configurations and dynamic reconfiguration. Dynamic configu-
ration allows changing configurations at run time.
PSoC Designer sets up power-on initialization tables for selected
PSoC block configurations and creates source code for an appli-
cation framework. The framework contains software to operate
the selected components. If the project uses more than one
operating configuration, it contains routines to switch between
different sets of PSoC block configurations at run time. PSoC
Designer prints out a configuration sheet for a given project
configuration for use during application programming in
conjunction with the device data sheet. After the framework is
generated, the user can add application specific code to flesh out
the framework. It’s also possible to change the selected compo-
nents and regenerate the framework.
Design Browser
The Design Browser allows users to select and import precon-
figured designs into the project. Users can easily browse a
catalog of preconfigured designs to facilitate time-to-design.
Document Number: 001-46932 Rev. *B
Hardware Tools
In-Circuit Emulator
A low cost, high functionality ICE (In-Circuit Emulator) is
available for development support. This hardware has the
capability to program single devices.
The emulator consists of a base unit that connects to the PC by
way of a USB port. The base unit is universal and operates with
all PSoC devices. Emulation pods for each device family are
available separately. The emulation pod takes the place of the
PSoC device in the target board and performs full speed (24
MHz) operation.
TrueTouch Touchscreen Tuner
The TrueTouch tuner is a Microsoft
®
Windows based graphical
user interface allowing developers to set critical parameters and
observe changes to the touchscreen application in real time.
Optimal configuration from the tuner are immediately applied to
the TrueTouch user module settings.
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