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DAC8248BIHS

PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, PDSO24, SOL-24

器件类别：模拟混合信号IC    转换器   

厂商名称：ADI(亚德诺半导体)

厂商官网：https://www.analog.com

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参数 预览 参数对比
器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
ADI(亚德诺半导体)
零件包装代码
SOIC
包装说明
SOL-24
针数
24
Reach Compliance Code
compliant
转换器类型
D/A CONVERTER
输入位码
BINARY, OFFSET BINARY
输入格式
PARALLEL, 8 BITS
JESD-30 代码
R-PDSO-G24
JESD-609代码
e0
长度
15.4 mm
最大线性误差 (EL)
0.0244%
位数
12
功能数量
1
端子数量
24
最高工作温度
70 °C
最低工作温度
封装主体材料
PLASTIC/EPOXY
封装代码
SOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE
峰值回流温度（摄氏度）
NOT SPECIFIED
认证状态
Not Qualified
座面最大高度
2.65 mm
标称供电电压
5 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
TIN LEAD
端子形式
GULL WING
端子节距
1.27 mm
端子位置
DUAL
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
7.5 mm
文档预览
a
Dual 12-Bit (8-Bit Byte)
Double-Buffered CMOS D/A Converter
DAC8248
PIN CONNECTIONS
24-Pin 0.3" Cerdip (W Suffix),
24-Pin Epoxy DIP (P Suffix),
24-Pin SOL (S Suffix)
FEATURES
Two Matched 12-Bit DACs on One Chip
12-Bit Resolution with an 8-Bit Data Bus
Direct Interface with 8-Bit Microprocessors
Double-Buffered Digital Inputs
RESET
to Zero Pin
12-Bit Endpoint Linearity ( 1/2 LSB) Over Temperature
5 V to 15 V Single Supply Operation
Latch-Up Resistant
Improved ESD Resistance
Packaged in a Narrow 0.3" 24-Pin DIP and 0.3" 24-Pin
SOL Package
Available in Die Form
APPLICATIONS
Multichannel Microprocessor-Controlled Systems
Robotics/Process Control/Automation
Automatic Test Equipment
Programmable Attenuator, Power Supplies, Window
Comparators
Instrumentation Equipment
Battery Operated Equipment
GENERAL DESCRIPTION
The DAC8248’s double-buffered digital inputs allow both
DAC’s analog output to be updated simultaneously. This is par-
ticularly useful in multiple DAC systems where a common
LDAC
signal updates all DACs at the same time. A single
RESET
pin resets both outputs to zero.
The DAC8248’s monolithic construction offers excellent DAC-
to-DAC matching and tracking over the full operating tempera-
ture range. The DAC consists of two thin-film R-2R resistor
ladder networks, two 12-bit, two 8-bit, and two 4-bit data regis-
ters, and control logic circuitry. Separate reference input and
feedback resistors are provided for each DAC. The DAC8248
(continued on page 4)
The DAC8248 is a dual 12-bit, double-buffered, CMOS digital-
to-analog converter. It has an 8-bit wide input data port that inter-
faces directly with 8-bit microprocessors. It loads a 12-bit word in
two bytes using a single control; it can accept either a least signifi-
cant byte or most significant byte first. For designs with a 12-bit or
16-bit wide data path, choose the DAC8222 or DAC8221.
FUNCTIONAL BLOCK DIAGRAM
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
DAC8248–SPECIFICATIONS
ELECTRICAL CHARACTERlSTICS
(@ V
Parameter
STATIC ACCURACY
Resolution
Relative Accuracy
Differential Nonlinearity
Full-Scale Gain Error
1
Symbol
N
INL
DNL
G
FSE
= +5 V or +15 V; V
REF A
= V
REF B
= +10 V; V
OUTA
= V
OUT B
= 0 V; AGND = DGND = 0 V;
T
A
= Full Temp Range specified in Absolute Maximum Ratings; unless otherwise noted. Specifications apply for DAC A and DAC B.)
DD
Conditions
Min
12
DAC8248
Typ
Max
Units
Bits
LSB
LSB
LSB
LSB
LSB
LSB
ppm/°C
DAC8248A/E/G
DAC8248F/H
All Grades are Guaranteed Monotonic
DAC8248A/E
DAC8248G
DAC8248F/H
(Notes 2, 3)
All Digital Inputs = 0s
T
A
= +25°C
T
A
= Full Temperature Range
(Note 4)
±
2
±
5
8
11
±
0.2
V
DD
= +5 V
V
DD
= +15 V
V
DD
= +5 V
V
DD
= +15 V
T
A
= +25°C
T
A
= Full Temperature Range
DB0–DB11
WR, LDAC, DAC A/DAC
B,
LSB/MSB, RESET
Digital Inputs = V
INL
or V
INH
Digital Inputs = 0 V or V
DD
∆V
DD
=
±
5%
2.4
13.5
±
1/2
±
1
±1
±
1
±
2
±
4
±
5
±
10
±
50
15
±
1
Gain Temperature Coefficient
(∆Gain/∆Temperature)
Output Leakage Current
I
OUT A
(Pin 2), I
OUT B
(Pin 24)
Input Resistance (V
REF A
,
REF B
)
Input Resistance Match
DIGITAL INPUTS
Digital Input High
Digital Input Low
Input Current (V
IN
= 0 V
or V
DD
and V
INL
or V
INH
)
Input Capacitance
(Note 2)
POWER SUPPLY
Supply Current
DC Power Supply Rejection Ratio
(∆Gain/∆V
DD
)
TCG
FS
I
LKG
R
REF
∆R
REF
R
REF
nA
kΩ
%
V
INH
V
INL
I
IN
C
IN
0.8
1.5
±
0.001
±
1
±
10
10
15
2
100
0.002
V
V
V
V
µA
µA
pF
pF
mA
µA
%/%
ns
µs
pF
pF
dB
dB
I
DD
PSRR
10
AC PERFORMANCE CHARACTERISTICS
2
Propagation Delay
5, 6
t
PD
Output Current Setting Time
6, 7
t
S
Output Capacitance
C
O
AC Feedthrough at
I
OUT A
or I
OUT B
FT
A
FT
B
T
A
= +25°C
T
A
= +25°C
Digital Inputs = All 0s
C
OUT A
, C
OUT B
Digital Inputs = All 1s
C
OUT A
, C
OUT B
V
REF A
to I
OUT A
; V
REF A
= 20 V p-p
f = 100 kHz; T
A
= +25°C
V
REF B
to I
OUT B
; V
REF B
= 20 V p-p
f = 100 kHz; T
A
= +25°C
350
1
90
120
–70
–70
–2–
REV. B
DAC8248
Parameter
Switching Characteristics
(Notes 2, 8)
LSB/MSB
Select to
Write Set-Up Time
LSB/MSB
Select to
Write Hold Time
DAC Select to
Write Set-Up Time
DAC Select to
Write Hold Time
LDAC to
Write Set-Up Time
LDAC to
Write Hold Time
Data Valid to
Write Set-Up Time
Data Valid to
Write Hold Time
Write Pulse Width
LDAC Pulse Width
Reset Pulse Width
t
CBS
t
CBH
t
AS
t
AH
t
LS
t
LH
t
DS
t
DH
t
WR
t
LWD
t
RWD
Symbol
Conditions
V
DD
= +5 V
+25 C –40 C to +85 C
(Note 9)
130
0
180
0
120
0
160
0
130
100
80
170
0
210
0
150
0
210
0
150
110
90
DAC8248
V
DD
= +15 V
–55 C to +125 C All Temps
(Note 10)
180
0
220
0
160
0
220
0
170
130
90
80
0
80
0
80
0
70
10
90
60
60
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
ns min
Units
NOTES
11
Measured using internal R
FB A
and R
FB B
. Both DAC digital inputs = 1111 1111 1111.
12
Guaranteed and not tested.
13
Gain TC is measured from +25°C to T
MIN
or from +25°C to T
MAX
.
14
Absolute Temperature Coefficient is approximately +50 ppm/°C.
15
From 50% of digital input to 90% of final analog output current. V
REF A
= V
REF B
= +10 V; OUT A, OUT B load = 100
Ω,
C
EXT
= 13 pF.
16
WR, LDAC
= 0 V; DB0–DB7 = 0 V to V
DD
or V
DD
to 0 V.
17
Settling time is measured from 50% of the digital input change to where the output settles within 1/2 LSB of full scale.
18
See Timing Diagram.
19
These limits apply for the commercial and industrial grade products.
10
These limits also apply as typical values for V
DD
= +12 V with +5 V CMOS logic levels and T
A
= +25°C.
Specifications subject to change without notice.
Burn-In Circuit
REV. B
–3–
DAC8248
(continued from page 1)
operates on a single supply from +5 V to +15 V, and it dissi-
pates less than 0.5 mW at +5 V (using zero or V
DD
logic levels).
The device is packaged in a space-saving 0.3", 24-pin DIP.
The DAC8248 is manufactured with PMI’s highly stable thin-
film resistors on an advanced oxide-isolated, silicon-gate,
CMOS technology. PMI’s improved latch-up resistant design
eliminates the need for external protective Schottky diodes.
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C, unless otherwise noted.)
Package Type
24-Pin Hermetic DIP (W)
24-Pin Plastic DIP (P)
24-Pin SOL (S)
JA
1
JC
Units
°C/W
°C/W
°C/W
69
62
72
10
32
24
NOTE
1
JA
specified for worst case mounting conditions, i.e.,
JA
is specified for device in
socket for cerdip and P-DIP packages;
JA
is specified for device soldered to printed
circuit board for SOL package.
CAUTION
V
DD
to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V
V
DD
to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, +17 V
AGND to DGND . . . . . . . . . . . . . . . . . . –0.3 V, V
DD
+0.3 V
Digital Input Voltage to DGND . . . . . . . –0.3 V, V
DD
+0.3 V
I
OUT A
, I
OUT B
to AGND . . . . . . . . . . . . . . –0.3 V, V
DD
+0.3 V
V
REF A
, V
REF B
to AGND . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
V
RFB A
, V
RFB B
to AGND . . . . . . . . . . . . . . . . . . . . . . . .
±
25 V
Operating Temperature Range
AW Version . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
EW, FW, FP Versions . . . . . . . . . . . . . . . . –40°C to +85°C
GP, HP, HS Versions . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . +300°C
1. Do not apply voltages higher than V
DD
or less than GND
potential on any terminal except V
REF
and R
FB
.
2. The digital control inputs are Zener-protected; however,
permanent damage may occur on unprotected units from
high energy electrostatic fields. Keep units in conductive
foam at all times until ready to use.
3. Do not insert this device into powered sockets; remove
power before insertion or removal.
4. Use proper antistatic handling procedures.
5. Devices can suffer permanent damage and/or reliability deg-
radation if stressed above the limits listed under Absolute
Maximum Ratings for extended periods. This is a stress rat-
ing only and functional operation at or above this specifica-
tion is not implied.
ORDERING GUIDE
1
Model
DAC8248AW
2
DAC8248EW
DAC8248GP
DAC8248FW
DAC8248HP
DAC8248FP
DAC8248HS
3
Relative
Accuracy
(+5 V or +15 V)
±
1/2 LSB
±
1/2 LSB
±
1/2 LSB
±
1 LSB
±
1 LSB
±
1 LSB
±
1 LSB
Gain Error
(+5 V or +15 V)
±
1 LSB
±
1 LSB
±
2 LSB
±
4 LSB
±
4 LSB
±
4 LSB
±
4 LSB
Temperature
Range
–55°C to +125°C
–40°C to +85°C
0°C to +70°C
–40°C to +85°C
0°C to +70°C
–40°C to +85°C
0°C to +70°C
Package
Description
24-Pin Cerdip
24-Pin Cerdip
24-Pin Plastic DIP
24-Pin Cerdip
24-Pin Plastic DIP
24-Pin Plastic DIP
24-Pin SOL
NOTES
1
Burn-in is available on commercial and industrial temperature range parts in cerdip, plastic DIP, and TO-can packages.
2
For devices processed in total compliance to MIL-STD-883, add/883 after part number. Consult factory for 883 data sheet.
3
For availability and burn-in information on SO and PLCC packages, contact your local sales office.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8248 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
–4–
REV. B
DAC8248
DICE CHARACTERISTICS
11.
12.
13.
14.
15.
16.
17.
18.
19.
10.
11.
12.
AGND
I
OUTA
R
FB A
V
REF A
DGND
DB7(MSB)
DB6
DB5
DB4
DB3
DB2
NC
13.
14.
15.
16.
17.
18.
19.
20.
21.
22.
23.
24.
NC
DB1
DB0(LSB)
RESET
LSB/MSB
DAC A/DAC
B
LDAC
WR
V
DD
V
REF B
R
FB B
I
OUT B
SUBSTRATE (DIE BACKSIDE) IS INTERNALLY
CONNECTED TO V
DD
.
Die Size 0.124
×
0.132 inch, 16,368 sq. mils
(3.15
×
3.55 mm, 10.56 sq. mm)
WAFER TEST LIMITS
@ V
Parameter
Relative Accuracy
Differential Nonlinearity
Full-Scale Gain Error
1
Output Leakage
(I
OUT A
, I
OUT B
)
Input Resistance
(V
REF A
, V
REF B
)
V
REF A
, V
REF B
Input
Resistance Match
Digital Input High
Digital Input Low
Digital Input Current
Supply Current
DC Supply Rejection
(∆Gain/∆V
DD
)
DD
= +5 V or +15 V, V
REF A
= V
REF B
= +10 V, V
OUT A
= V
OUT B
= 0 V; AGND = DGND = 0 V; T
A
= 25 C.
Conditions
Endpoint Linearity Error
All Grades are Guaranteed Monotonic
Digital Inputs = 1111 1111 1111
Digital Inputs = 0000 0000 0000
Pads 2 and 24
Pads 4 and 22
DAC8248G
Limit
±
1
±
1
±
4
±
50
8/15
±
1
2.4
13.5
0.8
1.5
±
1
2
0.1
0.002
Units
LSB max
LSB max
LSB max
nA max
kΩ min/kΩ max
% max
V min
V min
V max
V max
µA
max
mA max
mA max
%/% max
Symbol
INL
DNL
G
FSE
I
LKG
R
REF
∆R
REF
R
REF
V
INH
V
INL
I
IN
I
DD
PSR
V
DD
= +5 V
V
DD
= +15 V
V
DD
= +5 V
V
DD
= +15 V
V
IN
= 0 V or V
DD
; V
INL
or V
INH
All Digital Inputs V
INL
or V
INH
All Digital Inputs 0 V or V
DD
∆V
DD
=
±
5%
NOTES
1
Measured using internal R
FB A
and R
FB B
.
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualification through sample lot assembly and testing.
REV. B
–5–
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参数对比
与DAC8248BIHS相近的元器件有：DAC8248AW/883、DAC8248AW/883B、DAC8248GBC、DAC8248G、DAC8248BIFP、DAC8248BIGP。描述及对比如下：
型号 DAC8248BIHS DAC8248AW/883 DAC8248AW/883B DAC8248GBC DAC8248G DAC8248BIFP DAC8248BIGP
描述 PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, PDSO24, SOL-24 PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, CDIP24, CERDIP-24 IC DUAL, PARALLEL, WORD INPUT LOADING, 12-BIT DAC, CDIP24, 0.300 INCH, CERDIP-24, Digital to Analog Converter IC DUAL, PARALLEL, WORD INPUT LOADING, 12-BIT DAC, UUC24, 0.124 X 0.132 INCH, DIE-22, Digital to Analog Converter PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, UUC24, 0.124 X 0.132 INCH, DIE-24 IC PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, PDIP24, PLASTIC, DIP-24, Digital to Analog Converter IC PARALLEL, 8 BITS INPUT LOADING, 12-BIT DAC, PDIP24, PLASTIC, DIP-24, Digital to Analog Converter
是否Rohs认证 不符合 不符合 不符合 不符合 不符合 不符合 不符合
零件包装代码 SOIC DIP DIP DIE DIE DIP DIP
包装说明 SOL-24 DIP, DIP24,.3 DIP, 0.124 X 0.132 INCH, DIE-22 0.124 X 0.132 INCH, DIE-24 PLASTIC, DIP-24 PLASTIC, DIP-24
针数 24 24 24 22 24 24 24
Reach Compliance Code compliant not_compliant not_compliant not_compliant compliant compliant compliant
转换器类型 D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER D/A CONVERTER
输入位码 BINARY, OFFSET BINARY BINARY, OFFSET BINARY BINARY BINARY, OFFSET BINARY BINARY, OFFSET BINARY BINARY, OFFSET BINARY BINARY, OFFSET BINARY
输入格式 PARALLEL, 8 BITS PARALLEL, 8 BITS PARALLEL, WORD PARALLEL, WORD PARALLEL, 8 BITS PARALLEL, 8 BITS PARALLEL, 8 BITS
JESD-30 代码 R-PDSO-G24 R-GDIP-T24 R-GDIP-T24 R-XUUC-N24 R-XUUC-N24 R-PDIP-T24 R-PDIP-T24
最大线性误差 (EL) 0.0244% 0.0122% 0.0122% 0.0122% 0.0244% 0.0244% 0.0122%
位数 12 12 12 12 12 12 12
功能数量 1 1 2 2 1 1 1
端子数量 24 24 24 24 24 24 24
封装主体材料 PLASTIC/EPOXY CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED UNSPECIFIED UNSPECIFIED PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 SOP DIP DIP DIE DIE DIP DIP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE IN-LINE IN-LINE UNCASED CHIP UNCASED CHIP IN-LINE IN-LINE
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
标称供电电压 5 V 5 V 5 V 5 V 5 V 5 V 5 V
表面贴装 YES NO NO YES YES NO NO
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS
端子形式 GULL WING THROUGH-HOLE THROUGH-HOLE NO LEAD NO LEAD THROUGH-HOLE THROUGH-HOLE
端子位置 DUAL DUAL DUAL UPPER UPPER DUAL DUAL
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
是否无铅 含铅 含铅 含铅 - 含铅 - -
JESD-609代码 e0 e0 e0 e0 - e0 e0
最高工作温度 70 °C 125 °C 125 °C 25 °C - 85 °C 70 °C
最低工作温度 - -55 °C -55 °C 25 °C - -40 °C -
座面最大高度 2.65 mm 5.08 mm 5.08 mm - - 5.33 mm 5.33 mm
温度等级 COMMERCIAL MILITARY MILITARY OTHER - INDUSTRIAL COMMERCIAL
端子面层 TIN LEAD Tin/Lead (Sn63Pb37) Tin/Lead (Sn63Pb37) TIN LEAD - TIN LEAD TIN LEAD
端子节距 1.27 mm 2.54 mm 2.54 mm - - 2.54 mm 2.54 mm
宽度 7.5 mm 7.62 mm 7.62 mm - - 7.62 mm 7.62 mm
ECCN代码 - 3A001.A.2.C 3A001.A.2.C EAR99 3A001.A.5.B - -
最大稳定时间 - 1 µs 1 µs 1 µs 1 µs - -
Base Number Matches - 1 1 1 1 1 1
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